Searched refs:SHRD (Results 1 – 23 of 23) sorted by relevance
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/ |
| D | shift-double-x86_64.ll | 4 ; SHLD/SHRD manual shifts
|
| D | shift-double.ll | 148 ; Combine 2xi32/2xi16 shifts into SHRD
272 ; SHLD/SHRD manual shifts
|
| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| D | X86ISelLowering.h | 42 SHRD, enumerator
|
| D | X86GenFastISel.inc | 3884 // FastEmit functions for X86ISD::SHRD.
4081 …case X86ISD::SHRD: return FastEmit_X86ISD_SHRD_rri(VT, RetVT, Op0, Op0IsKill, Op1, Op1IsKill, imm2…
|
| D | X86InstrInfo.td | 124 def X86shrd : SDNode<"X86ISD::SHRD", SDTIntShiftDOp>;
|
| D | X86ISelLowering.cpp | 7563 Tmp2 = DAG.getNode(X86ISD::SHRD, dl, VT, ShOpLo, ShOpHi, ShAmt); in LowerShiftParts()
10624 case X86ISD::SHRD: return "X86ISD::SHRD"; in getTargetNodeName()
13500 Opc = X86ISD::SHRD; in PerformOrCombine()
|
| D | X86GenDAGISel.inc | 4017 /*SwitchOpcode*/ 33|128,2/*289*/, TARGET_VAL(X86ISD::SHRD),// ->9192
35979 /*SwitchOpcode*/ 111, TARGET_VAL(X86ISD::SHRD),// ->74747
|
| /external/llvm/lib/Target/X86/ |
| D | X86ISelLowering.h | 41 SHRD, enumerator
|
| D | X86SchedHaswell.td | 794 // SHRD SHLD.
819 def : InstRW<[WriteShrDCL], (instregex "SHRD(16|32|64)rrCL")>;
|
| D | X86InstrInfo.td | 134 def X86shrd : SDNode<"X86ISD::SHRD", SDTIntShiftDOp>;
|
| D | X86ISelLowering.cpp | 13306 Tmp2 = DAG.getNode(X86ISD::SHRD, dl, VT, ShOpLo, ShOpHi, ShAmt); in LowerShiftParts()
22081 case X86ISD::SHRD: return "X86ISD::SHRD"; in getTargetNodeName()
28471 Opc = X86ISD::SHRD; in combineOr()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
| D | X86ISelLowering.h | 41 SHRD, enumerator
|
| D | X86ScheduleBtVer2.td | 213 // SHLD/SHRD.
|
| D | X86SchedSandyBridge.td | 129 // SHLD/SHRD.
|
| D | X86ScheduleZnver1.td | 742 // SHRD SHLD.
|
| D | X86SchedSkylakeClient.td | 151 // SHLD/SHRD.
|
| D | X86SchedBroadwell.td | 152 // SHLD/SHRD.
|
| D | X86SchedHaswell.td | 135 // SHLD/SHRD.
|
| D | X86SchedSkylakeServer.td | 144 // SHLD/SHRD.
|
| D | X86InstrCompiler.td | 1745 defm : MaskedDoubleShiftAmountPats<X86shrd, "SHRD">;
|
| D | X86InstrInfo.td | 140 def X86shrd : SDNode<"X86ISD::SHRD", SDTIntShiftDOp>;
|
| D | X86ISelLowering.cpp | 16199 Tmp2 = DAG.getNode(X86ISD::SHRD, dl, VT, ShOpLo, ShOpHi, ShAmt); in LowerShiftParts()
25899 case X86ISD::SHRD: return "X86ISD::SHRD"; in getTargetNodeName()
35163 Opc = X86ISD::SHRD; in combineOr()
|
| /external/syzkaller/pkg/ifuzz/gen/ |
| D | all-enc-instructions.txt | 12489 ICLASS : SHRD
12502 ICLASS : SHRD
|