/external/icu/icu4c/source/test/testdata/ |
D | IdnaTestV2.txt | 120 ̈.א; ; [B1, B3, B6, V5]; xn--ssa.xn--4db; ; ; # ̈.א 121 xn--ssa.xn--4db; ̈.א; [B1, B3, B6, V5]; xn--ssa.xn--4db; ; ; # ̈.א 153 ̈̈بb; ; [B1, C1, V5]; xn--b-bcba413a2w8b; ; xn--b-bcba413a; [B1, V5] # ̈̈بb 154 ̈̈بB; ̈̈بb; [B1, C1, V5]; xn--b-bcba413a2w8b; ; xn--b-bcba413a; [B1, V5] # ̈̈بb 155 xn--b-bcba413a; ̈̈بb; [B1, V5]; xn--b-bcba413a; ; ; # ̈̈بb 156 xn--b-bcba413a2w8b; ̈̈بb; [B1, C1, V5]; xn--b-bcba413a2w8b; ; ; # ̈̈بb 174 ̈̈بb; ; [B1, C2, V5]; xn--b-bcba413a7w8b; ; xn--b-bcba413a; [B1, V5] # ̈̈بb 175 ̈̈بB; ̈̈بb; [B1, C2, V5]; xn--b-bcba413a7w8b; ; xn--b-bcba413a; [B1, V5] # ̈̈بb 176 xn--b-bcba413a7w8b; ̈̈بb; [B1, C2, V5]; xn--b-bcba413a7w8b; ; ; # ̈̈بb 428 a.b.̈c.d; ; [V5]; a.b.xn--c-bcb.d; ; ; # a.b.̈c.d [all …]
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/external/icu/icu4j/main/tests/core/src/com/ibm/icu/dev/data/unicode/ |
D | IdnaTestV2.txt | 120 ̈.א; ; [B1, B3, B6, V5]; xn--ssa.xn--4db; ; ; # ̈.א 121 xn--ssa.xn--4db; ̈.א; [B1, B3, B6, V5]; xn--ssa.xn--4db; ; ; # ̈.א 153 ̈̈بb; ; [B1, C1, V5]; xn--b-bcba413a2w8b; ; xn--b-bcba413a; [B1, V5] # ̈̈بb 154 ̈̈بB; ̈̈بb; [B1, C1, V5]; xn--b-bcba413a2w8b; ; xn--b-bcba413a; [B1, V5] # ̈̈بb 155 xn--b-bcba413a; ̈̈بb; [B1, V5]; xn--b-bcba413a; ; ; # ̈̈بb 156 xn--b-bcba413a2w8b; ̈̈بb; [B1, C1, V5]; xn--b-bcba413a2w8b; ; ; # ̈̈بb 174 ̈̈بb; ; [B1, C2, V5]; xn--b-bcba413a7w8b; ; xn--b-bcba413a; [B1, V5] # ̈̈بb 175 ̈̈بB; ̈̈بb; [B1, C2, V5]; xn--b-bcba413a7w8b; ; xn--b-bcba413a; [B1, V5] # ̈̈بb 176 xn--b-bcba413a7w8b; ̈̈بb; [B1, C2, V5]; xn--b-bcba413a7w8b; ; ; # ̈̈بb 428 a.b.̈c.d; ; [V5]; a.b.xn--c-bcb.d; ; ; # a.b.̈c.d [all …]
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/external/icu/android_icu4j/src/main/tests/android/icu/dev/data/unicode/ |
D | IdnaTestV2.txt | 120 ̈.א; ; [B1, B3, B6, V5]; xn--ssa.xn--4db; ; ; # ̈.א 121 xn--ssa.xn--4db; ̈.א; [B1, B3, B6, V5]; xn--ssa.xn--4db; ; ; # ̈.א 153 ̈̈بb; ; [B1, C1, V5]; xn--b-bcba413a2w8b; ; xn--b-bcba413a; [B1, V5] # ̈̈بb 154 ̈̈بB; ̈̈بb; [B1, C1, V5]; xn--b-bcba413a2w8b; ; xn--b-bcba413a; [B1, V5] # ̈̈بb 155 xn--b-bcba413a; ̈̈بb; [B1, V5]; xn--b-bcba413a; ; ; # ̈̈بb 156 xn--b-bcba413a2w8b; ̈̈بb; [B1, C1, V5]; xn--b-bcba413a2w8b; ; ; # ̈̈بb 174 ̈̈بb; ; [B1, C2, V5]; xn--b-bcba413a7w8b; ; xn--b-bcba413a; [B1, V5] # ̈̈بb 175 ̈̈بB; ̈̈بb; [B1, C2, V5]; xn--b-bcba413a7w8b; ; xn--b-bcba413a; [B1, V5] # ̈̈بb 176 xn--b-bcba413a7w8b; ̈̈بb; [B1, C2, V5]; xn--b-bcba413a7w8b; ; ; # ̈̈بb 428 a.b.̈c.d; ; [V5]; a.b.xn--c-bcb.d; ; ; # a.b.̈c.d [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Thumb/ |
D | ldr_ext.ll | 1 ; RUN: llc -mtriple=thumb-eabi %s -o - | FileCheck %s -check-prefix=V5 7 ; V5: ldrb 16 ; V5: ldrh 25 ; V5: ldrb 26 ; V5: lsls 27 ; V5: asrs 37 ; V5: ldrh 38 ; V5: lsls 39 ; V5: asrs 49 ; V5: movs r0, #0 [all …]
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/external/swiftshader/third_party/LLVM/test/CodeGen/Thumb/ |
D | ldr_ext.ll | 1 ; RUN: llc < %s -march=thumb | FileCheck %s -check-prefix=V5 7 ; V5: ldrb 16 ; V5: ldrh 25 ; V5: ldrb 26 ; V5: lsls 27 ; V5: asrs 37 ; V5: ldrh 38 ; V5: lsls 39 ; V5: asrs 49 ; V5: movs r0, #0 [all …]
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/external/llvm/test/CodeGen/Thumb/ |
D | ldr_ext.ll | 1 ; RUN: llc -mtriple=thumb-eabi %s -o - | FileCheck %s -check-prefix=V5 7 ; V5: ldrb 16 ; V5: ldrh 25 ; V5: ldrb 26 ; V5: lsls 27 ; V5: asrs 37 ; V5: ldrh 38 ; V5: lsls 39 ; V5: asrs 49 ; V5: movs r0, #0 [all …]
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/external/libxaac/decoder/armv8/ |
D | ixheaacd_sbr_imdct_using_fft.s | 108 LD2 {V4.S, V5.S}[0], [X5], X1 119 LD2 {V4.S, V5.S}[1], [X6] , X1 131 LD2 {V4.S, V5.S}[2], [X7] , X1 138 LD2 {V4.S, V5.S}[3], [X11] , X1 152 ADD V0.4S, V1.4S, V5.4S 156 SUB V4.4S, V1.4S, V5.4S 172 SUB V5.4S, V2.4S, V6.4S 189 SUB V6.4S, V4.4S, V5.4S 192 ADD V9.4S, V4.4S, V5.4S 198 SUB V5.4S, V8.4S, V1.4S [all …]
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D | ixheaacd_overlap_add2.s | 72 REV64 V5.4H, V7.4H 84 SMLSL V23.4S, V5.4H, V3.4H 103 REV64 V5.4H, V7.4H 114 SMLSL V23.4S, V5.4H, V3.4H 196 LD2 {V4.4H, V5.4H}, [X1], #16 202 SMLSL V23.4S, V5.4H, V2.4H 217 SMLSL V23.4S, V5.4H, V2.4H 245 LD2 {V4.4H, V5.4H}, [X1], #16 260 SMLSL V23.4S, V5.4H, V2.4H
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/external/eigen/unsupported/Eigen/CXX11/src/Tensor/ |
D | TensorDimensions.h | 154 template <std::size_t V1=0, std::size_t V2=0, std::size_t V3=0, std::size_t V4=0, std::size_t V5=0>… 155 …ro_size<V3>::type, typename non_zero_size<V4>::type, typename non_zero_size<V5>::type >::type Base; 224 template <std::size_t V1, std::size_t V2, std::size_t V3, std::size_t V4, std::size_t V5> 225 EIGEN_DEVICE_FUNC EIGEN_STRONG_INLINE std::size_t array_prod(const Sizes<V1, V2, V3, V4, V5>&) { 226 return Sizes<V1, V2, V3, V4, V5>::total_size; 385 …e_t V2, std::size_t V3, std::size_t V4, std::size_t V5> struct array_size<const Sizes<V1,V2,V3,V4,… 386 static const size_t value = Sizes<V1,V2,V3,V4,V5>::count; 388 …size_t V2, std::size_t V3, std::size_t V4, std::size_t V5> struct array_size<Sizes<V1,V2,V3,V4,V5>… 389 static const size_t value = Sizes<V1,V2,V3,V4,V5>::count; 391 …3, std::size_t V4, std::size_t V5> EIGEN_DEVICE_FUNC EIGEN_STRONG_INLINE std::size_t array_get(con… [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/unittests/Support/ |
D | AlignOfTest.cpp | 70 struct V5 : V4, V3 { double z; argument 71 ~V5() override; 77 struct V8 : V5, virtual V6, V7 { double zz; 87 V5::~V5() {} in ~V5() 163 EXPECT_EQ(alignof(V5), alignof(AlignedCharArrayUnion<V5>)); in TEST() 228 EXPECT_EQ(sizeof(V5), sizeof(AlignedCharArrayUnion<V5>)); in TEST()
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/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/SimplifyCFG/ |
D | PhiEliminate2.ll | 13 %V5 = sext i16 %V3 to i32 16 %V6 = phi i32 [ %V5, %else ], [ %V4, %then ] 22 ; CHECK-NEXT: %V5 = sext i16 %V3 to i32 24 ; CHECK-NEXT: %V6 = select i1 %C, i32 %V4, i32 %V5, !prof !0, !unpredictable !1
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/external/llvm/test/Transforms/SimplifyCFG/ |
D | PhiEliminate2.ll | 13 %V5 = sext i16 %V3 to i32 16 %V6 = phi i32 [ %V5, %else ], [ %V4, %then ] 22 ; CHECK-NEXT: %V5 = sext i16 %V3 to i32 24 ; CHECK-NEXT: %V6 = select i1 %C, i32 %V4, i32 %V5, !prof !0, !unpredictable !1
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/external/llvm/unittests/Support/ |
D | AlignOfTest.cpp | 70 struct V5 : V4, V3 { double z; argument 71 ~V5() override; 77 struct V8 : V5, virtual V6, V7 { double zz; 87 V5::~V5() {} in ~V5() 149 [AlignOf<V5>::Alignment > 0] 189 EXPECT_LE(alignOf<V1>(), alignOf<V5>()); in TEST() 271 EXPECT_EQ(alignOf<V5>(), alignOf<AlignedCharArrayUnion<V5> >()); in TEST() 336 EXPECT_EQ(sizeof(V5), sizeof(AlignedCharArrayUnion<V5>)); in TEST()
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/external/swiftshader/third_party/LLVM/test/CodeGen/ARM/ |
D | ldrd.ll | 2 ; RUN: llc < %s -mtriple=armv5-apple-darwin -regalloc=linearscan | FileCheck %s -check-prefix=V5 14 ;V5: ldr r{{[0-9]+}}, [r2] 15 ;V5: ldr r{{[0-9]+}}, [r2, #4]
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/ |
D | MachO-subtypes.ll | 7 ; RUN: | llvm-readobj -file-headers | FileCheck %s --check-prefix=CHECK-V5 9 ; RUN: | llvm-readobj -file-headers | FileCheck %s --check-prefix=CHECK-V5 11 ; RUN: | llvm-readobj -file-headers | FileCheck %s --check-prefix=CHECK-V5 13 ; RUN: | llvm-readobj -file-headers | FileCheck %s --check-prefix=CHECK-V5 15 ; RUN: | llvm-readobj -file-headers | FileCheck %s --check-prefix=CHECK-V5 61 ; CHECK-V5: CpuSubType: CPU_SUBTYPE_ARM_V5 (0x7)
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D | pr18364-movw.ll | 1 ; RUN: llc < %s -mtriple=armv5te | FileCheck %s --check-prefix=V5 9 ; V5-NOT: movw 25 ; V5-NOT: movw
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/external/llvm/test/CodeGen/ARM/ |
D | MachO-subtypes.ll | 7 ; RUN: | llvm-readobj -file-headers | FileCheck %s --check-prefix=CHECK-V5 9 ; RUN: | llvm-readobj -file-headers | FileCheck %s --check-prefix=CHECK-V5 11 ; RUN: | llvm-readobj -file-headers | FileCheck %s --check-prefix=CHECK-V5 13 ; RUN: | llvm-readobj -file-headers | FileCheck %s --check-prefix=CHECK-V5 15 ; RUN: | llvm-readobj -file-headers | FileCheck %s --check-prefix=CHECK-V5 61 ; CHECK-V5: CpuSubType: CPU_SUBTYPE_ARM_V5 (0x7)
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D | pr18364-movw.ll | 1 ; RUN: llc < %s -mtriple=armv5te | FileCheck %s --check-prefix=V5 9 ; V5-NOT: movw 25 ; V5-NOT: movw
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/external/llvm/lib/Target/Hexagon/ |
D | HexagonSubtarget.h | 42 V4, V5, V55, V60 enumerator 90 bool hasV5TOps() const { return getHexagonArchVersion() >= V5; } in hasV5TOps() 91 bool hasV5TOpsOnly() const { return getHexagonArchVersion() == V5; } in hasV5TOpsOnly()
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/external/llvm/test/MC/AArch64/ |
D | case-insen-reg-names.s | 4 fadd V0.2d, V5.2d, V6.2d 5 fadd v0.2d, V5.2d, v6.2d
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/ |
D | case-insen-reg-names.s | 4 fadd V0.2d, V5.2d, V6.2d 5 fadd v0.2d, V5.2d, v6.2d
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/external/swiftshader/third_party/LLVM/test/Transforms/SimplifyCFG/ |
D | PhiEliminate2.ll | 10 %V5 = sext i16 %V3 to i32 ; <i32> [#uses=1] 13 %V6 = phi i32 [ %V5, %else ], [ %V4, %then ] ; <i32> [#uses=0]
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/external/llvm/test/MC/Hexagon/ |
D | elf-flags.s | 2 …j %s -o - | llvm-readobj -file-headers -elf-output-style=GNU | FileCheck --check-prefix=CHECK-V5 %s 7 # CHECK-V5: Flags: 0x4
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/external/swiftshader/third_party/LLVM/test/MC/ARM/ |
D | thumb-diagnostics.s | 4 @ RUN: FileCheck --check-prefix=CHECK-ERRORS-V5 < %t %s 20 @ CHECK-ERRORS-V5: error: instruction variant requires ARMv6 or later 21 @ CHECK-ERRORS-V5: mov r2, r3 22 @ CHECK-ERRORS-V5: ^
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/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/InstCombine/ |
D | pr34349.ll | 9 ; CHECK-NEXT: [[V5:%.*]] = lshr i16 [[V4]], 8 10 ; CHECK-NEXT: [[V6:%.*]] = trunc i16 [[V5]] to i8
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