1; RUN: llc < %s -mtriple=armv5te | FileCheck %s --check-prefix=V5 2; RUN: llc < %s -mtriple=armv6 | FileCheck %s --check-prefix=V6 3; RUN: llc < %s -mtriple=armv6t2 | FileCheck %s --check-prefix=V6T2 4; RUN: llc < %s -mtriple=armv7 | FileCheck %s --check-prefix=V7 5; PR18364 6 7define i64 @f() #0 { 8entry: 9; V5-NOT: movw 10; V6-NOT: movw 11; V6T2: movw 12; V7: movw 13 %y = alloca i64, align 8 14 %z = alloca i64, align 8 15 store i64 1, i64* %y, align 8 16 store i64 11579764786944, i64* %z, align 8 17 %0 = load i64, i64* %y, align 8 18 %1 = load i64, i64* %z, align 8 19 %sub = sub i64 %0, %1 20 ret i64 %sub 21} 22 23define i64 @g(i64 %a, i32 %b) #0 { 24entry: 25; V5-NOT: movw 26; V6-NOT: movw 27; V6T2: movw 28; V7: movw 29 %0 = mul i64 %a, 86400000 30 %mul = add i64 %0, -210866803200000 31 %conv = sext i32 %b to i64 32 %add = add nsw i64 %mul, %conv 33 ret i64 %add 34} 35