| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
| D | MIRCanonicalizerPass.cpp | 396 static void doCandidateWalk(std::vector<TypedVReg> &VRegs, in doCandidateWalk() argument
411 VRegs.push_back(TypedVReg(RSE_FrameIndex)); in doCandidateWalk()
425 if (!llvm::any_of(VRegs, [&](const TypedVReg &TR) { in doCandidateWalk()
428 VRegs.push_back(TypedVReg(Reg)); in doCandidateWalk()
432 VRegs.push_back(TypedVReg(Reg)); in doCandidateWalk()
517 GetVRegRenameMap(const std::vector<TypedVReg> &VRegs, in GetVRegRenameMap() argument
523 for (auto &vreg : VRegs) { in GetVRegRenameMap()
683 std::vector<TypedVReg> VRegs; in runOnBasicBlock() local
685 VRegs.push_back(TypedVReg(RSE_NewCandidate)); in runOnBasicBlock()
724 doCandidateWalk(VRegs, RegQueue, VisitedMIs, MBB); in runOnBasicBlock()
[all …]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUCallLowering.cpp | 91 ArrayRef<unsigned> VRegs) const { in lowerFormalArguments()
171 lowerParameter(MIRBuilder, ArgTy, ArgOffset, Align, VRegs[i]); in lowerFormalArguments()
188 ArgInfo OrigArg{VRegs[i], CurOrigArg->getType()}; in lowerFormalArguments()
242 MRI.addLiveIn(VA.getLocReg(), VRegs[OrigArgIdx]); in lowerFormalArguments()
244 MIRBuilder.buildCopy(VRegs[OrigArgIdx], VA.getLocReg()); in lowerFormalArguments()
|
| D | AMDGPUCallLowering.h | 41 ArrayRef<unsigned> VRegs) const override;
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
| D | AArch64CallLowering.cpp | 267 ArrayRef<unsigned> VRegs) const { in lowerFormalArguments()
278 ArgInfo OrigArg{VRegs[i], Arg.getType()}; in lowerFormalArguments()
281 LLT Ty = MRI.getType(VRegs[i]); in lowerFormalArguments()
282 unsigned Dst = VRegs[i]; in lowerFormalArguments()
296 if (Dst != VRegs[i]) in lowerFormalArguments()
297 MIRBuilder.buildCopy(VRegs[i], Dst); in lowerFormalArguments()
|
| D | AArch64CallLowering.h | 41 ArrayRef<unsigned> VRegs) const override;
|
| /external/llvm/lib/Target/AArch64/ |
| D | AArch64CallLowering.cpp | 58 const SmallVectorImpl<unsigned> &VRegs) const { in lowerFormalArguments()
85 MIRBuilder.buildInstr(TargetOpcode::COPY, VRegs[i], VA.getLocReg()); in lowerFormalArguments()
|
| D | AArch64CallLowering.h | 33 const SmallVectorImpl<unsigned> &VRegs) const override;
|
| /external/swiftshader/third_party/LLVM/lib/CodeGen/ |
| D | RegAllocBasic.cpp | 191 LiveVirtRegBitSet &VRegs = unionVRegs[PhysReg]; in verify() local
192 PhysReg2LiveUnion[PhysReg].verify(VRegs); in verify()
195 assert(!VisitedVRegs.intersects(VRegs) && "vreg in multiple unions"); in verify()
196 VisitedVRegs |= VRegs; in verify()
|
| /external/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUCallLowering.cpp | 39 const SmallVectorImpl<unsigned> &VRegs) const { in lowerFormalArguments()
|
| D | AMDGPUCallLowering.h | 33 const SmallVectorImpl<unsigned> &VRegs) const override;
|
| /external/llvm/include/llvm/CodeGen/GlobalISel/ |
| D | CallLowering.h | 66 const SmallVectorImpl<unsigned> &VRegs) const { in lowerFormalArguments() argument
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
| D | X86CallLowering.h | 36 ArrayRef<unsigned> VRegs) const override;
|
| D | X86CallLowering.cpp | 318 ArrayRef<unsigned> VRegs) const { in lowerFormalArguments()
343 ArgInfo OrigArg(VRegs[Idx], Arg.getType()); in lowerFormalArguments()
347 MIRBuilder.buildMerge(VRegs[Idx], Regs); in lowerFormalArguments()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/GlobalISel/ |
| D | IRTranslator.cpp | 166 auto *VRegs = VMap.getVRegs(Val); in getOrCreateVRegs() local
178 VRegs->push_back(MRI->createGenericVirtualRegister(Ty)); in getOrCreateVRegs()
179 return *VRegs; in getOrCreateVRegs()
188 std::copy(EltRegs.begin(), EltRegs.end(), std::back_inserter(*VRegs)); in getOrCreateVRegs()
192 VRegs->push_back(MRI->createGenericVirtualRegister(SplitTys[0])); in getOrCreateVRegs()
193 bool Success = translate(cast<Constant>(Val), VRegs->front()); in getOrCreateVRegs()
200 return *VRegs; in getOrCreateVRegs()
204 return *VRegs; in getOrCreateVRegs()
1611 auto &VRegs = *VMap.getVRegs(cast<Value>(*ArgIt)); in runOnMachineFunction() local
1612 assert(VRegs.empty() && "VRegs already populated?"); in runOnMachineFunction()
[all …]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| D | ARMCallLowering.h | 40 ArrayRef<unsigned> VRegs) const override;
|
| D | ARMCallLowering.cpp | 419 ArrayRef<unsigned> VRegs) const { in lowerFormalArguments()
454 ArgInfo AInfo(VRegs[Idx], Arg.getType()); in lowerFormalArguments()
464 MIRBuilder.buildMerge(VRegs[Idx], SplitRegs); in lowerFormalArguments()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/GlobalISel/ |
| D | LegalizerHelper.h | 113 SmallVectorImpl<unsigned> &VRegs);
|
| D | CallLowering.h | 161 ArrayRef<unsigned> VRegs) const { in lowerFormalArguments() argument
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/ |
| D | MipsCallLowering.h | 57 ArrayRef<unsigned> VRegs) const override;
|
| D | MipsCallLowering.cpp | 239 ArrayRef<unsigned> VRegs) const { in lowerFormalArguments()
262 ArgInfo AInfo(VRegs[i], Arg.getType()); in lowerFormalArguments()
|
| /external/capstone/arch/PowerPC/ |
| D | PPCDisassembler.c | 63 static const unsigned VRegs[] = { variable
193 return decodeRegisterClass(Inst, RegNo, VRegs); in DecodeVRRCRegisterClass()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGISel.cpp | 1332 SmallVector<std::pair<MachineBasicBlock *, unsigned>, 4> VRegs; in propagateSwiftErrorVRegs() local
1337 VRegs.push_back(std::make_pair( in propagateSwiftErrorVRegs()
1355 VRegs.size() >= 1 && in propagateSwiftErrorVRegs()
1357 VRegs.begin(), VRegs.end(), in propagateSwiftErrorVRegs()
1359 -> bool { return V.second != VRegs[0].second; }) != in propagateSwiftErrorVRegs()
1360 VRegs.end(); in propagateSwiftErrorVRegs()
1365 assert(!VRegs.empty() && in propagateSwiftErrorVRegs()
1368 FuncInfo->setCurrentSwiftErrorVReg(MBB, SwiftErrorVal, VRegs[0].second); in propagateSwiftErrorVRegs()
1380 assert(!VRegs.empty() && in propagateSwiftErrorVRegs()
1385 .addReg(VRegs[0].second); in propagateSwiftErrorVRegs()
[all …]
|
| /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
| D | PPCFrameLowering.cpp | 813 SmallVector<CalleeSavedInfo, 18> VRegs; in processFunctionBeforeFrameFinalized() local
850 VRegs.push_back(CSI[i]); in processFunctionBeforeFrameFinalized()
963 for (unsigned i = 0, e = VRegs.size(); i != e; ++i) { in processFunctionBeforeFrameFinalized()
964 int FI = VRegs[i].getFrameIdx(); in processFunctionBeforeFrameFinalized()
|
| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonFrameLowering.h | 136 SmallVectorImpl<unsigned> &VRegs) const;
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/ |
| D | HexagonFrameLowering.h | 162 SmallVectorImpl<unsigned> &VRegs) const;
|