Home
last modified time | relevance | path

Searched refs:cmeq (Results 1 – 25 of 59) sorted by relevance

123

/external/capstone/suite/MC/AArch64/
Dneon-compare-instructions.s.cs2 0xe0,0x8d,0x31,0x2e = cmeq v0.8b, v15.8b, v17.8b
3 0xe1,0x8f,0x28,0x6e = cmeq v1.16b, v31.16b, v8.16b
4 0x0f,0x8e,0x71,0x2e = cmeq v15.4h, v16.4h, v17.4h
5 0xc5,0x8c,0x67,0x6e = cmeq v5.8h, v6.8h, v7.8h
6 0x7d,0x8f,0xbc,0x2e = cmeq v29.2s, v27.2s, v28.2s
7 0xe9,0x8c,0xa8,0x6e = cmeq v9.4s, v7.4s, v8.4s
8 0xe3,0x8f,0xf5,0x6e = cmeq v3.2d, v31.2d, v21.2d
87 0xe0,0x99,0x20,0x0e = cmeq v0.8b, v15.8b, #0x0
88 0xe1,0x9b,0x20,0x4e = cmeq v1.16b, v31.16b, #0x0
89 0x0f,0x9a,0x60,0x0e = cmeq v15.4h, v16.4h, #0x0
[all …]
Dneon-scalar-compare.s.cs2 0xb4,0x8e,0xf6,0x7e = cmeq d20, d21, d22
3 0xb4,0x9a,0xe0,0x5e = cmeq d20, d21, #0x0
/external/llvm/test/MC/AArch64/
Dneon-compare-instructions.s9 cmeq v0.8b, v15.8b, v17.8b
10 cmeq v1.16b, v31.16b, v8.16b
11 cmeq v15.4h, v16.4h, v17.4h
12 cmeq v5.8h, v6.8h, v7.8h
13 cmeq v29.2s, v27.2s, v28.2s
14 cmeq v9.4s, v7.4s, v8.4s
15 cmeq v3.2d, v31.2d, v21.2d
270 cmeq v0.8b, v15.8b, #0
271 cmeq v1.16b, v31.16b, #0
272 cmeq v15.4h, v16.4h, #0
[all …]
Dneon-scalar-compare.s9 cmeq d20, d21, d22
17 cmeq d20, d21, #0x0
Darm64-advsimd.s302 cmeq.8b v0, v0, v0
372 ; CHECK: cmeq.8b v0, v0, v0 ; encoding: [0x00,0x8c,0x20,0x2e]
723 cmeq.8b v0, v0, #0
724 cmeq.16b v0, v0, #0
725 cmeq.4h v0, v0, #0
726 cmeq.8h v0, v0, #0
727 cmeq.2s v0, v0, #0
728 cmeq.4s v0, v0, #0
729 cmeq.2d v0, v0, #0
731 ; CHECK: cmeq.8b v0, v0, #0 ; encoding: [0x00,0x98,0x20,0x0e]
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/
Dneon-compare-instructions.s9 cmeq v0.8b, v15.8b, v17.8b
10 cmeq v1.16b, v31.16b, v8.16b
11 cmeq v15.4h, v16.4h, v17.4h
12 cmeq v5.8h, v6.8h, v7.8h
13 cmeq v29.2s, v27.2s, v28.2s
14 cmeq v9.4s, v7.4s, v8.4s
15 cmeq v3.2d, v31.2d, v21.2d
270 cmeq v0.8b, v15.8b, #0
271 cmeq v1.16b, v31.16b, #0
272 cmeq v15.4h, v16.4h, #0
[all …]
Dneon-scalar-compare.s9 cmeq d20, d21, d22
17 cmeq d20, d21, #0x0
/external/llvm/test/CodeGen/AArch64/
Darm64-neon-select_cc.ll8 ; CHECK: cmeq [[MASK:v[0-9]+]].8b, v[[LHS]].8b, v[[RHS]].8b
39 ; CHECK: cmeq [[MASK:v[0-9]+]].16b, v[[LHS]].16b, v[[RHS]].16b
71 ; CHECK: cmeq [[MASK:v[0-9]+]].4h, v[[LHS]].4h, v[[RHS]].4h
83 ; CHECK: cmeq [[MASK:v[0-9]+]].8h, v[[LHS]].8h, v[[RHS]].8h
95 ; CHECK: cmeq [[MASK:v[0-9]+]].2s, v[[LHS]].2s, v[[RHS]].2s
107 ; CHECK: cmeq [[MASK:v[0-9]+]].4s, v[[LHS]].4s, v[[RHS]].4s
119 ; CHECK: cmeq d[[MASK:[0-9]+]], d[[LHS]], d[[RHS]]
130 ; CHECK: cmeq [[MASK:v[0-9]+]].2d, v[[LHS]].2d, v[[RHS]].2d
171 ; CHECK: cmeq [[MASK:v[0-9]+]].4s, v[[LHS]].4s, v[[RHS]].4s
192 ; CHECK: cmeq d[[MASK:[0-9]+]], [[LHS]], [[RHS]]
Darm64-neon-compare-instructions.ll4 ;CHECK: cmeq {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
11 ;CHECK: cmeq {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
18 ;CHECK: cmeq {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
25 ;CHECK: cmeq {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
32 ;CHECK: cmeq {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
39 ;CHECK: cmeq {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
46 ;CHECK: cmeq {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d
53 ;CHECK: cmeq {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
61 ;CHECK: cmeq {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
69 ;CHECK: cmeq {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
[all …]
Darm64-neon-v1i1-setcc.ll28 ; CHECK: cmeq d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
46 ; CHECK: cmeq d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
60 ; CHECK: cmeq d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
Dfast-isel-cmp-vec.ll12 ; CHECK-NEXT: cmeq.2s [[CMP:v[0-9]+]], v0, #0
42 ; CHECK-NEXT: cmeq.4s [[CMP:v[0-9]+]], v0, #0
75 ; CHECK-NEXT: cmeq.16b [[CMP:v[0-9]+]], v0, #0
Daarch64-neon-v1i1-setcc.ll32 ; CHECK: cmeq d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
50 ; CHECK: cmeq d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
Dsetcc-type-mismatch.ll5 ; CHECK: cmeq [[CMP128:v[0-9]+]].4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
Darm64-vselect.ll4 ;CHECK: cmeq.4h v0, v0, v1
Dneon-compare-instructions.ll5 ; CHECK: cmeq {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
13 ; CHECK: cmeq {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
21 ; CHECK: cmeq {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
29 ; CHECK: cmeq {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
37 ; CHECK: cmeq {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
45 ; CHECK: cmeq {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
53 ; CHECK: cmeq {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d
61 ; CHECK: cmeq {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
70 ; CHECK: cmeq {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
79 ; CHECK: cmeq {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/
Darm64-neon-select_cc.ll8 ; CHECK: cmeq [[MASK:v[0-9]+]].8b, v[[LHS]].8b, v[[RHS]].8b
39 ; CHECK: cmeq [[MASK:v[0-9]+]].16b, v[[LHS]].16b, v[[RHS]].16b
71 ; CHECK: cmeq [[MASK:v[0-9]+]].4h, v[[LHS]].4h, v[[RHS]].4h
83 ; CHECK: cmeq [[MASK:v[0-9]+]].8h, v[[LHS]].8h, v[[RHS]].8h
95 ; CHECK: cmeq [[MASK:v[0-9]+]].2s, v[[LHS]].2s, v[[RHS]].2s
107 ; CHECK: cmeq [[MASK:v[0-9]+]].4s, v[[LHS]].4s, v[[RHS]].4s
119 ; CHECK: cmeq d[[MASK:[0-9]+]], d[[LHS]], d[[RHS]]
130 ; CHECK: cmeq [[MASK:v[0-9]+]].2d, v[[LHS]].2d, v[[RHS]].2d
171 ; CHECK: cmeq [[MASK:v[0-9]+]].4s, v[[LHS]].4s, v[[RHS]].4s
192 ; CHECK: cmeq d[[MASK:[0-9]+]], [[LHS]], [[RHS]]
Darm64-neon-compare-instructions.ll4 ;CHECK: cmeq {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
11 ;CHECK: cmeq {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
18 ;CHECK: cmeq {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
25 ;CHECK: cmeq {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
32 ;CHECK: cmeq {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
39 ;CHECK: cmeq {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
46 ;CHECK: cmeq {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d
53 ;CHECK: cmeq {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
61 ;CHECK: cmeq {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
69 ;CHECK: cmeq {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
[all …]
Darm64-neon-v1i1-setcc.ll28 ; CHECK: cmeq d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
46 ; CHECK: cmeq d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
60 ; CHECK: cmeq d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
Dfast-isel-cmp-vec.ll12 ; CHECK-NEXT: cmeq.2s [[CMP:v[0-9]+]], v0, #0
42 ; CHECK-NEXT: cmeq.4s [[CMP:v[0-9]+]], v0, #0
75 ; CHECK-NEXT: cmeq.16b [[CMP:v[0-9]+]], v0, #0
Dexpand-select.ll12 ; CHECK-NEXT: cmeq v0.4s, v1.4s, v0.4s
37 ; CHECK-NEXT: cmeq v0.4s, v1.4s, v0.4s
Daarch64-neon-v1i1-setcc.ll32 ; CHECK: cmeq d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
50 ; CHECK: cmeq d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
Dsetcc-type-mismatch.ll5 ; CHECK: cmeq [[CMP128:v[0-9]+]].4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
Darm64-vselect.ll4 ;CHECK: cmeq.4h v0, v0, v1
Dneon-compare-instructions.ll5 ; CHECK: cmeq {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
13 ; CHECK: cmeq {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
21 ; CHECK: cmeq {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
29 ; CHECK: cmeq {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
37 ; CHECK: cmeq {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
45 ; CHECK: cmeq {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
53 ; CHECK: cmeq {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d
61 ; CHECK: cmeq {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
70 ; CHECK: cmeq {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
79 ; CHECK: cmeq {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
[all …]
/external/libavc/common/armv8/
Dih264_resi_trans_quant_av8.s199 cmeq v0.4h, v20.4h, #0
200 cmeq v1.4h, v21.4h, #0
201 cmeq v2.4h, v22.4h, #0
202 cmeq v3.4h, v23.4h, #0
401 cmeq v0.4h, v20.4h, #0
402 cmeq v1.4h, v21.4h, #0
403 cmeq v2.4h, v22.4h, #0
404 cmeq v3.4h, v23.4h, #0
559 cmeq v0.8h, v14.8h, #0
560 cmeq v1.8h, v16.8h, #0
[all …]

123