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Searched refs:fctiduz (Results 1 – 18 of 18) sorted by relevance

/external/capstone/suite/MC/PowerPC/
Dppc64-encoding-fp.s.cs81 0xfc,0x40,0x1f,0x5e = fctiduz 2, 3
82 0xfc,0x40,0x1f,0x5f = fctiduz. 2, 3
/external/llvm/test/MC/PowerPC/
Dppc64-encoding-fp.s266 # CHECK-BE: fctiduz 2, 3 # encoding: [0xfc,0x40,0x1f,0x5e]
267 # CHECK-LE: fctiduz 2, 3 # encoding: [0x5e,0x1f,0x40,0xfc]
268 fctiduz 2, 3
269 # CHECK-BE: fctiduz. 2, 3 # encoding: [0xfc,0x40,0x1f,0x5f]
270 # CHECK-LE: fctiduz. 2, 3 # encoding: [0x5f,0x1f,0x40,0xfc]
271 fctiduz. 2, 3
/external/llvm/test/CodeGen/PowerPC/
Dfp-to-int-to-fp.ll51 ; FPCVT: fctiduz [[REG1:[0-9]+]], 1
64 ; FPCVT: fctiduz [[REG1:[0-9]+]], 1
Dfast-isel-conversion.ll487 ; ELF64: fctiduz
490 ; ELF64LE: fctiduz
493 ; PPC970-NOT: fctiduz
525 ; ELF64: fctiduz
528 ; ELF64LE: fctiduz
531 ; PPC970-NOT: fctiduz
Dfloat-to-int.ll46 ; CHECK: fctiduz [[REG:[0-9]+]], 1
63 ; CHECK: fctiduz [[REG:[0-9]+]], 1
Df32-to-i64.ll15 ; CHECK: fctiduz [[REG1:[0-9]+]], 1
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/PowerPC/
Dppc64-encoding-fp.s279 # CHECK-BE: fctiduz 2, 3 # encoding: [0xfc,0x40,0x1f,0x5e]
280 # CHECK-LE: fctiduz 2, 3 # encoding: [0x5e,0x1f,0x40,0xfc]
281 fctiduz 2, 3
282 # CHECK-BE: fctiduz. 2, 3 # encoding: [0xfc,0x40,0x1f,0x5f]
283 # CHECK-LE: fctiduz. 2, 3 # encoding: [0x5f,0x1f,0x40,0xfc]
284 fctiduz. 2, 3
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/PowerPC/
Df32-to-i64.ll15 ; CHECK: fctiduz [[REG1:[0-9]+]], 1
Dfloat-to-int.ll63 ; CHECK: fctiduz [[REG:[0-9]+]], 1
86 ; CHECK: fctiduz [[REG:[0-9]+]], 1
Dfast-isel-conversion.ll411 ; CHECK: fctiduz
414 ; PPC970-NOT: fctiduz
442 ; CHECK: fctiduz
445 ; PPC970-NOT: fctiduz
/external/llvm/test/MC/Disassembler/PowerPC/
Dppc64-encoding-fp.txt240 # CHECK: fctiduz 2, 3
243 # CHECK: fctiduz. 2, 3
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/PowerPC/
Dppc64-encoding-fp.txt246 # CHECK: fctiduz 2, 3
249 # CHECK: fctiduz. 2, 3
/external/v8/src/ppc/
Dassembler-ppc.h1239 void fctiduz(const DoubleRegister frt, const DoubleRegister frb,
Dconstants-ppc.h1499 V(fctiduz, FCTIDUZ, 0xFC00075E) \
Dassembler-ppc.cc1875 void Assembler::fctiduz(const DoubleRegister frt, const DoubleRegister frb, in fctiduz() function in v8::internal::Assembler
Dmacro-assembler-ppc.cc745 fctiduz(double_dst, double_input); in ConvertDoubleToUnsignedInt64()
/external/llvm/lib/Target/PowerPC/
DPPCInstr64Bit.td1169 "fctiduz", "$frD, $frB", IIC_FPGeneral,
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/
DPPCInstr64Bit.td1319 "fctiduz", "$frD, $frB", IIC_FPGeneral,