| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/NVPTX/ |
| D | NVPTXPeephole.cpp | 86 GenericAddrDef = MRI.getUniqueVRegDef(Op.getReg()); in isCVTAToLocalCombinationCandidate()
110 auto &Prev = *MRI.getUniqueVRegDef(Root.getOperand(1).getReg()); in CombineCVTAToLocal()
149 if (auto MI = MRI.getUniqueVRegDef(NVPTX::VRFrame)) { in runOnMachineFunction()
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| /external/llvm/lib/Target/NVPTX/ |
| D | NVPTXPeephole.cpp | 86 GenericAddrDef = MRI.getUniqueVRegDef(Op.getReg()); in isCVTAToLocalCombinationCandidate()
110 auto &Prev = *MRI.getUniqueVRegDef(Root.getOperand(1).getReg()); in CombineCVTAToLocal()
149 if (auto MI = MRI.getUniqueVRegDef(NVPTX::VRFrame)) { in runOnMachineFunction()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
| D | X86WinAllocaExpander.cpp | 86 MachineInstr *Def = MRI->getUniqueVRegDef(AmountReg); in getWinAllocaAmount()
90 Def = MRI->getUniqueVRegDef(Def->getOperand(1).getReg()); in getWinAllocaAmount()
269 MachineInstr *AmountDef = MRI->getUniqueVRegDef(AmountReg); in lower()
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| /external/llvm/lib/Target/X86/ |
| D | X86WinAllocaExpander.cpp | 85 MachineInstr *Def = MRI->getUniqueVRegDef(AmountReg); in getWinAllocaAmount()
89 Def = MRI->getUniqueVRegDef(Def->getOperand(1).getReg()); in getWinAllocaAmount()
259 MachineInstr *AmountDef = MRI->getUniqueVRegDef(AmountReg); in lower()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
| D | TargetInstrInfo.cpp | 681 MI1 = MRI.getUniqueVRegDef(Op1.getReg()); in hasReassociableOperands()
683 MI2 = MRI.getUniqueVRegDef(Op2.getReg()); in hasReassociableOperands()
693 MachineInstr *MI1 = MRI.getUniqueVRegDef(Inst.getOperand(1).getReg()); in hasReassociableSibling()
694 MachineInstr *MI2 = MRI.getUniqueVRegDef(Inst.getOperand(2).getReg()); in hasReassociableSibling()
870 Prev = MRI.getUniqueVRegDef(Root.getOperand(1).getReg()); in genAlternativeCodeSequence()
874 Prev = MRI.getUniqueVRegDef(Root.getOperand(2).getReg()); in genAlternativeCodeSequence()
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| D | MachineCombiner.cpp | 142 DefInstr = MRI->getUniqueVRegDef(MO.getReg()); in getOperandDef()
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| D | MachineCSE.cpp | 607 MachineInstr *Def = MRI->getUniqueVRegDef(NewReg); in ProcessBlock()
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| D | MachineRegisterInfo.cpp | 413 MachineInstr *MachineRegisterInfo::getUniqueVRegDef(unsigned Reg) const { in getUniqueVRegDef() function in MachineRegisterInfo
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| /external/llvm/lib/CodeGen/ |
| D | TargetInstrInfo.cpp | 573 MI1 = MRI.getUniqueVRegDef(Op1.getReg()); in hasReassociableOperands()
575 MI2 = MRI.getUniqueVRegDef(Op2.getReg()); in hasReassociableOperands()
585 MachineInstr *MI1 = MRI.getUniqueVRegDef(Inst.getOperand(1).getReg()); in hasReassociableSibling()
586 MachineInstr *MI2 = MRI.getUniqueVRegDef(Inst.getOperand(2).getReg()); in hasReassociableSibling()
760 Prev = MRI.getUniqueVRegDef(Root.getOperand(1).getReg()); in genAlternativeCodeSequence()
764 Prev = MRI.getUniqueVRegDef(Root.getOperand(2).getReg()); in genAlternativeCodeSequence()
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| D | MachineCombiner.cpp | 109 DefInstr = MRI->getUniqueVRegDef(MO.getReg()); in getOperandDef()
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| D | MachineRegisterInfo.cpp | 346 MachineInstr *MachineRegisterInfo::getUniqueVRegDef(unsigned Reg) const { in getUniqueVRegDef() function in MachineRegisterInfo
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| D | MachineCSE.cpp | 586 MachineInstr *Def = MRI->getUniqueVRegDef(NewReg); in ProcessBlock()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | SILowerControlFlow.cpp | 357 if (MachineInstr *Def = MRI->getUniqueVRegDef(MI.getOperand(1).getReg())) { in emitIfBreak()
442 MachineInstr *Def = MRI->getUniqueVRegDef(Op.getReg()); in findMaskOperands()
485 MRI->getUniqueVRegDef(Reg)->eraseFromParent(); in combineMasks()
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| D | SILowerI1Copies.cpp | 106 MachineInstr *DefInst = MRI.getUniqueVRegDef(Src.getReg()); in runOnMachineFunction()
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| D | SIOptimizeExecMaskingPreRA.cpp | 100 auto SaveExecInst = MRI.getUniqueVRegDef(SavedExec); in getOrExecSource()
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| D | AMDGPUInstructionSelector.cpp | 396 const MachineInstr *PtrMI = MRI.getUniqueVRegDef(Load.getOperand(1).getReg()); in getAddrModeInfo()
407 const MachineInstr *OpDef = MRI.getUniqueVRegDef(GEPOp.getReg()); in getAddrModeInfo()
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| D | SIShrinkInstructions.cpp | 134 MachineInstr *Def = MRI.getUniqueVRegDef(Reg); in foldImmediates()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyMachineFunctionInfo.h | 85 assert(MF.getRegInfo().getUniqueVRegDef(VReg)); in stackifyVReg()
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| D | WebAssemblyRegisterInfo.cpp | 94 MachineInstr *Def = MF.getRegInfo().getUniqueVRegDef(OtherMOReg); in eliminateFrameIndex()
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| /external/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyRegisterInfo.cpp | 88 MachineInstr *Def = MF.getRegInfo().getUniqueVRegDef(OtherMOReg); in eliminateFrameIndex()
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| /external/llvm/lib/Target/AMDGPU/ |
| D | SILowerI1Copies.cpp | 110 MachineInstr *DefInst = MRI.getUniqueVRegDef(Src.getReg()); in runOnMachineFunction()
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| D | SIFixSGPRCopies.cpp | 323 MachineInstr *DefInstr = MRI.getUniqueVRegDef(Reg); in runOnMachineFunction()
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| D | SIShrinkInstructions.cpp | 156 MachineInstr *Def = MRI.getUniqueVRegDef(Reg); in foldImmediates()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
| D | AArch64CondBrTuning.cpp | 84 return MRI->getUniqueVRegDef(MO.getReg()); in getOperandDef()
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| /external/llvm/include/llvm/CodeGen/ |
| D | MachineRegisterInfo.h | 544 MachineInstr *getUniqueVRegDef(unsigned Reg) const;
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