/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
D | X86FixupBWInsts.cpp | 179 SuperDestReg = getX86SubSuperRegister(OrigDestReg, 32); in getSuperRegDestIfDead() 200 if (!LiveRegs.contains(getX86SubSuperRegister(OrigDestReg, 16)) && in getSuperRegDestIfDead() 201 !LiveRegs.contains(getX86SubSuperRegister(SuperDestReg, 8, in getSuperRegDestIfDead() 305 unsigned NewSrcReg = getX86SubSuperRegister(OldSrc.getReg(), 32); in tryReplaceCopy()
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D | X86AsmPrinter.cpp | 237 Reg = getX86SubSuperRegister(Reg, Size); in printOperand() 386 Reg = getX86SubSuperRegister(Reg, 8); in printAsmMRegister() 389 Reg = getX86SubSuperRegister(Reg, 8, true); in printAsmMRegister() 392 Reg = getX86SubSuperRegister(Reg, 16); in printAsmMRegister() 395 Reg = getX86SubSuperRegister(Reg, 32); in printAsmMRegister() 403 Reg = getX86SubSuperRegister(Reg, P.getSubtarget().is64Bit() ? 64 : 32); in printAsmMRegister()
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D | X86RegisterInfo.cpp | 529 unsigned BasePtr = getX86SubSuperRegister(getBaseRegister(), 64); in getReservedRegs() 667 BasePtr = getX86SubSuperRegister(BasePtr, 32); in tryOptimizeLEAtoMOV() 716 MachineBasePtr = getX86SubSuperRegister(BasePtr, 64); in eliminateFrameIndex() 760 FrameReg = getX86SubSuperRegister(FrameReg, 32); in getPtrSizedFrameRegister()
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D | X86FixupLEAs.cpp | 485 (LEAOpcode == X86::LEA64_32r) ? getX86SubSuperRegister(DstR, 64) : DstR; in processInstrForSlow3OpLEA()
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D | X86FrameLowering.cpp | 990 ? getX86SubSuperRegister(FramePtr, 64) : FramePtr; in emitPrologue() 1585 Is64BitILP32 ? getX86SubSuperRegister(FramePtr, 64) : FramePtr; in emitEpilogue() 2179 BasePtr = getX86SubSuperRegister(BasePtr, 64); in determineCalleeSaves()
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D | X86InstrInfo.cpp | 765 NewSrc = getX86SubSuperRegister(Src.getReg(), 64); in classifyLEAReg() 4035 .setReg(getX86SubSuperRegister(MIB->getOperand(0).getReg(), 64)); in ExpandMOVImmSExti8()
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/external/llvm/lib/Target/X86/ |
D | X86FixupBWInsts.cpp | 188 SuperDestReg = getX86SubSuperRegister(OrigDestReg, 32); in getSuperRegDestIfDead() 207 getX86SubSuperRegister(SuperDestReg, 8, /*High=*/true); in getSuperRegDestIfDead() 249 unsigned NewSrcReg = getX86SubSuperRegister(OldSrc.getReg(), 32); in tryReplaceCopy()
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D | X86AsmPrinter.cpp | 209 Reg = getX86SubSuperRegister(Reg, Size); in printOperand() 350 Reg = getX86SubSuperRegister(Reg, 8); in printAsmMRegister() 353 Reg = getX86SubSuperRegister(Reg, 8, true); in printAsmMRegister() 356 Reg = getX86SubSuperRegister(Reg, 16); in printAsmMRegister() 359 Reg = getX86SubSuperRegister(Reg, 32); in printAsmMRegister() 364 Reg = getX86SubSuperRegister(Reg, P.getSubtarget().is64Bit() ? 64 : 32); in printAsmMRegister()
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D | X86RegisterInfo.cpp | 462 unsigned BasePtr = getX86SubSuperRegister(getBaseRegister(), 64); in getReservedRegs() 615 BasePtr = getX86SubSuperRegister(BasePtr, 64); in eliminateFrameIndex() 667 FrameReg = getX86SubSuperRegister(FrameReg, 32); in getPtrSizedFrameRegister()
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D | X86FrameLowering.cpp | 934 ? getX86SubSuperRegister(FramePtr, 64) : FramePtr; in emitPrologue() 1491 Is64BitILP32 ? getX86SubSuperRegister(FramePtr, 64) : FramePtr; in emitEpilogue()
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D | X86InstrInfo.cpp | 2599 NewSrc = getX86SubSuperRegister(Src.getReg(), 64); in classifyLEAReg() 4392 DestReg = getX86SubSuperRegister(DestReg, 32); in copyPhysRegOpcode_AVX512_DQ() 4396 SrcReg = getX86SubSuperRegister(SrcReg, 32); in copyPhysRegOpcode_AVX512_DQ() 4437 SrcReg = getX86SubSuperRegister(SrcReg, 32); in copyPhysRegOpcode_AVX512() 4441 DestReg = getX86SubSuperRegister(DestReg, 32); in copyPhysRegOpcode_AVX512() 5466 .setReg(getX86SubSuperRegister(MIB->getOperand(0).getReg(), 64)); in ExpandMOVImmSExti8()
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/external/swiftshader/third_party/LLVM/lib/Target/X86/ |
D | X86AsmPrinter.cpp | 243 Reg = getX86SubSuperRegister(Reg, VT); in printOperand() 350 Reg = getX86SubSuperRegister(Reg, MVT::i8); in printAsmMRegister() 353 Reg = getX86SubSuperRegister(Reg, MVT::i8, true); in printAsmMRegister() 356 Reg = getX86SubSuperRegister(Reg, MVT::i16); in printAsmMRegister() 359 Reg = getX86SubSuperRegister(Reg, MVT::i32); in printAsmMRegister() 362 Reg = getX86SubSuperRegister(Reg, MVT::i64); in printAsmMRegister()
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D | X86RegisterInfo.h | 134 unsigned getX86SubSuperRegister(unsigned, EVT, bool High=false);
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D | X86MCInstLower.cpp | 202 MI->getOperand(OpNo).setReg(getX86SubSuperRegister(Reg, MVT::i32)); in lower_subreg32() 213 MI->getOperand(OpNo+i).setReg(getX86SubSuperRegister(Reg, MVT::i64)); in lower_lea64_32mem()
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D | X86RegisterInfo.cpp | 662 unsigned getX86SubSuperRegister(unsigned Reg, EVT VT, bool High) { in getX86SubSuperRegister() function
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/external/llvm/lib/Target/X86/MCTargetDesc/ |
D | X86MCTargetDesc.h | 99 unsigned getX86SubSuperRegister(unsigned, unsigned, bool High=false);
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D | X86MCTargetDesc.cpp | 450 unsigned llvm::getX86SubSuperRegister(unsigned Reg, unsigned Size, bool High) { in getX86SubSuperRegister() function in llvm
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/MCTargetDesc/ |
D | X86MCTargetDesc.h | 118 unsigned getX86SubSuperRegister(unsigned, unsigned, bool High=false);
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D | X86MCTargetDesc.cpp | 666 unsigned llvm::getX86SubSuperRegister(unsigned Reg, unsigned Size, bool High) { in getX86SubSuperRegister() function in llvm
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/external/llvm/lib/Target/X86/AsmParser/ |
D | X86AsmInstrumentation.cpp | 172 return Reg == X86::NoRegister ? Reg : getX86SubSuperRegister(Reg, Size); in convReg() 240 Inst.addOperand(MCOperand::createReg(getX86SubSuperRegister(Reg, Size))); in EmitLEA() 507 return getX86SubSuperRegister(FrameReg, 32); in GetFrameReg() 765 return getX86SubSuperRegister(FrameReg, 64); in GetFrameReg()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/AsmParser/ |
D | X86AsmInstrumentation.cpp | 184 return Reg == X86::NoRegister ? Reg : getX86SubSuperRegister(Reg, Size); in convReg() 251 Inst.addOperand(MCOperand::createReg(getX86SubSuperRegister(Reg, Size))); in EmitLEA() 520 return getX86SubSuperRegister(FrameReg, 32); in GetFrameReg() 778 return getX86SubSuperRegister(FrameReg, 64); in GetFrameReg()
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D | X86Operand.h | 472 RegNo = getX86SubSuperRegister(RegNo, 32); in addGR32orGR64Operands()
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