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Searched refs:getX86SubSuperRegister (Results 1 – 22 of 22) sorted by relevance

/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/
DX86FixupBWInsts.cpp179 SuperDestReg = getX86SubSuperRegister(OrigDestReg, 32); in getSuperRegDestIfDead()
200 if (!LiveRegs.contains(getX86SubSuperRegister(OrigDestReg, 16)) && in getSuperRegDestIfDead()
201 !LiveRegs.contains(getX86SubSuperRegister(SuperDestReg, 8, in getSuperRegDestIfDead()
305 unsigned NewSrcReg = getX86SubSuperRegister(OldSrc.getReg(), 32); in tryReplaceCopy()
DX86AsmPrinter.cpp237 Reg = getX86SubSuperRegister(Reg, Size); in printOperand()
386 Reg = getX86SubSuperRegister(Reg, 8); in printAsmMRegister()
389 Reg = getX86SubSuperRegister(Reg, 8, true); in printAsmMRegister()
392 Reg = getX86SubSuperRegister(Reg, 16); in printAsmMRegister()
395 Reg = getX86SubSuperRegister(Reg, 32); in printAsmMRegister()
403 Reg = getX86SubSuperRegister(Reg, P.getSubtarget().is64Bit() ? 64 : 32); in printAsmMRegister()
DX86RegisterInfo.cpp529 unsigned BasePtr = getX86SubSuperRegister(getBaseRegister(), 64); in getReservedRegs()
667 BasePtr = getX86SubSuperRegister(BasePtr, 32); in tryOptimizeLEAtoMOV()
716 MachineBasePtr = getX86SubSuperRegister(BasePtr, 64); in eliminateFrameIndex()
760 FrameReg = getX86SubSuperRegister(FrameReg, 32); in getPtrSizedFrameRegister()
DX86FixupLEAs.cpp485 (LEAOpcode == X86::LEA64_32r) ? getX86SubSuperRegister(DstR, 64) : DstR; in processInstrForSlow3OpLEA()
DX86FrameLowering.cpp990 ? getX86SubSuperRegister(FramePtr, 64) : FramePtr; in emitPrologue()
1585 Is64BitILP32 ? getX86SubSuperRegister(FramePtr, 64) : FramePtr; in emitEpilogue()
2179 BasePtr = getX86SubSuperRegister(BasePtr, 64); in determineCalleeSaves()
DX86InstrInfo.cpp765 NewSrc = getX86SubSuperRegister(Src.getReg(), 64); in classifyLEAReg()
4035 .setReg(getX86SubSuperRegister(MIB->getOperand(0).getReg(), 64)); in ExpandMOVImmSExti8()
/external/llvm/lib/Target/X86/
DX86FixupBWInsts.cpp188 SuperDestReg = getX86SubSuperRegister(OrigDestReg, 32); in getSuperRegDestIfDead()
207 getX86SubSuperRegister(SuperDestReg, 8, /*High=*/true); in getSuperRegDestIfDead()
249 unsigned NewSrcReg = getX86SubSuperRegister(OldSrc.getReg(), 32); in tryReplaceCopy()
DX86AsmPrinter.cpp209 Reg = getX86SubSuperRegister(Reg, Size); in printOperand()
350 Reg = getX86SubSuperRegister(Reg, 8); in printAsmMRegister()
353 Reg = getX86SubSuperRegister(Reg, 8, true); in printAsmMRegister()
356 Reg = getX86SubSuperRegister(Reg, 16); in printAsmMRegister()
359 Reg = getX86SubSuperRegister(Reg, 32); in printAsmMRegister()
364 Reg = getX86SubSuperRegister(Reg, P.getSubtarget().is64Bit() ? 64 : 32); in printAsmMRegister()
DX86RegisterInfo.cpp462 unsigned BasePtr = getX86SubSuperRegister(getBaseRegister(), 64); in getReservedRegs()
615 BasePtr = getX86SubSuperRegister(BasePtr, 64); in eliminateFrameIndex()
667 FrameReg = getX86SubSuperRegister(FrameReg, 32); in getPtrSizedFrameRegister()
DX86FrameLowering.cpp934 ? getX86SubSuperRegister(FramePtr, 64) : FramePtr; in emitPrologue()
1491 Is64BitILP32 ? getX86SubSuperRegister(FramePtr, 64) : FramePtr; in emitEpilogue()
DX86InstrInfo.cpp2599 NewSrc = getX86SubSuperRegister(Src.getReg(), 64); in classifyLEAReg()
4392 DestReg = getX86SubSuperRegister(DestReg, 32); in copyPhysRegOpcode_AVX512_DQ()
4396 SrcReg = getX86SubSuperRegister(SrcReg, 32); in copyPhysRegOpcode_AVX512_DQ()
4437 SrcReg = getX86SubSuperRegister(SrcReg, 32); in copyPhysRegOpcode_AVX512()
4441 DestReg = getX86SubSuperRegister(DestReg, 32); in copyPhysRegOpcode_AVX512()
5466 .setReg(getX86SubSuperRegister(MIB->getOperand(0).getReg(), 64)); in ExpandMOVImmSExti8()
/external/swiftshader/third_party/LLVM/lib/Target/X86/
DX86AsmPrinter.cpp243 Reg = getX86SubSuperRegister(Reg, VT); in printOperand()
350 Reg = getX86SubSuperRegister(Reg, MVT::i8); in printAsmMRegister()
353 Reg = getX86SubSuperRegister(Reg, MVT::i8, true); in printAsmMRegister()
356 Reg = getX86SubSuperRegister(Reg, MVT::i16); in printAsmMRegister()
359 Reg = getX86SubSuperRegister(Reg, MVT::i32); in printAsmMRegister()
362 Reg = getX86SubSuperRegister(Reg, MVT::i64); in printAsmMRegister()
DX86RegisterInfo.h134 unsigned getX86SubSuperRegister(unsigned, EVT, bool High=false);
DX86MCInstLower.cpp202 MI->getOperand(OpNo).setReg(getX86SubSuperRegister(Reg, MVT::i32)); in lower_subreg32()
213 MI->getOperand(OpNo+i).setReg(getX86SubSuperRegister(Reg, MVT::i64)); in lower_lea64_32mem()
DX86RegisterInfo.cpp662 unsigned getX86SubSuperRegister(unsigned Reg, EVT VT, bool High) { in getX86SubSuperRegister() function
/external/llvm/lib/Target/X86/MCTargetDesc/
DX86MCTargetDesc.h99 unsigned getX86SubSuperRegister(unsigned, unsigned, bool High=false);
DX86MCTargetDesc.cpp450 unsigned llvm::getX86SubSuperRegister(unsigned Reg, unsigned Size, bool High) { in getX86SubSuperRegister() function in llvm
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/MCTargetDesc/
DX86MCTargetDesc.h118 unsigned getX86SubSuperRegister(unsigned, unsigned, bool High=false);
DX86MCTargetDesc.cpp666 unsigned llvm::getX86SubSuperRegister(unsigned Reg, unsigned Size, bool High) { in getX86SubSuperRegister() function in llvm
/external/llvm/lib/Target/X86/AsmParser/
DX86AsmInstrumentation.cpp172 return Reg == X86::NoRegister ? Reg : getX86SubSuperRegister(Reg, Size); in convReg()
240 Inst.addOperand(MCOperand::createReg(getX86SubSuperRegister(Reg, Size))); in EmitLEA()
507 return getX86SubSuperRegister(FrameReg, 32); in GetFrameReg()
765 return getX86SubSuperRegister(FrameReg, 64); in GetFrameReg()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/AsmParser/
DX86AsmInstrumentation.cpp184 return Reg == X86::NoRegister ? Reg : getX86SubSuperRegister(Reg, Size); in convReg()
251 Inst.addOperand(MCOperand::createReg(getX86SubSuperRegister(Reg, Size))); in EmitLEA()
520 return getX86SubSuperRegister(FrameReg, 32); in GetFrameReg()
778 return getX86SubSuperRegister(FrameReg, 64); in GetFrameReg()
DX86Operand.h472 RegNo = getX86SubSuperRegister(RegNo, 32); in addGR32orGR64Operands()