Searched refs:imm14 (Results 1 – 9 of 9) sorted by relevance
| /external/swiftshader/third_party/LLVM/lib/Target/MBlaze/ |
| D | MBlazeInstrFormats.td | 178 // Special instruction class in MBlaze : <|opcode|rd|imm14|>
184 bits<14> imm14;
189 let Inst{18-31} = imm14;
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| /external/v8/src/arm64/ |
| D | assembler-arm64-inl.h | 923 Instr Assembler::ImmTestBranch(int imm14) {
924 CHECK(is_int14(imm14));
925 return truncate_to_int14(imm14) << ImmTestBranch_offset;
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| D | assembler-arm64.h | 1147 void tbz(const Register& rt, unsigned bit_pos, int imm14);
1151 void tbnz(const Register& rt, unsigned bit_pos, int imm14);
2941 inline static Instr ImmTestBranch(int imm14);
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| D | assembler-arm64.cc | 1071 int imm14) { in tbz() argument
1073 Emit(TBZ | ImmTestBranchBit(bit_pos) | ImmTestBranch(imm14) | Rt(rt)); in tbz()
1086 int imm14) { in tbnz() argument
1088 Emit(TBNZ | ImmTestBranchBit(bit_pos) | ImmTestBranch(imm14) | Rt(rt)); in tbnz()
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| /external/vixl/src/aarch64/ |
| D | assembler-aarch64.h | 616 void tbz(const Register& rt, unsigned bit_pos, int64_t imm14);
622 void tbnz(const Register& rt, unsigned bit_pos, int64_t imm14);
3625 static Instr ImmTestBranch(int64_t imm14) { in ImmTestBranch() argument
3626 VIXL_ASSERT(IsInt14(imm14)); in ImmTestBranch()
3627 return TruncateToUint14(imm14) << ImmTestBranch_offset; in ImmTestBranch()
3777 static Instr SysOp(int imm14) { in SysOp() argument
3778 VIXL_ASSERT(IsUint14(imm14)); in SysOp()
3779 return imm14 << SysOp_offset; in SysOp()
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| D | assembler-aarch64.cc | 420 void Assembler::tbz(const Register& rt, unsigned bit_pos, int64_t imm14) { in tbz() argument
422 Emit(TBZ | ImmTestBranchBit(bit_pos) | ImmTestBranch(imm14) | Rt(rt)); in tbz()
433 void Assembler::tbnz(const Register& rt, unsigned bit_pos, int64_t imm14) { in tbnz() argument
435 Emit(TBNZ | ImmTestBranchBit(bit_pos) | ImmTestBranch(imm14) | Rt(rt)); in tbnz()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/ |
| D | Mips16InstrFormats.td | 529 // <|EXTEND|imm10:4|imm14:11|RRI-A|rx|ry|f|imm3:0>
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| /external/llvm/lib/Target/Mips/ |
| D | Mips16InstrFormats.td | 529 // <|EXTEND|imm10:4|imm14:11|RRI-A|rx|ry|f|imm3:0>
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| /external/vixl/doc/aarch64/ |
| D | supported-instructions-aarch64.md | 1276 void tbnz(const Register& rt, unsigned bit_pos, int64_t imm14)
1290 void tbz(const Register& rt, unsigned bit_pos, int64_t imm14)
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