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Searched refs:pinsrw (Results 1 – 25 of 98) sorted by relevance

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/external/libjpeg-turbo/simd/x86_64/
Djcphuff-sse2.asm38 pinsrw X0, word [BLOCK + T0 * 2], 0
39 pinsrw X1, word [BLOCK + T1 * 2], 0
43 pinsrw X0, word [BLOCK + T0 * 2], 1
44 pinsrw X1, word [BLOCK + T1 * 2], 1
48 pinsrw X0, word [BLOCK + T0 * 2], 2
49 pinsrw X1, word [BLOCK + T1 * 2], 2
53 pinsrw X0, word [BLOCK + T0 * 2], 3
54 pinsrw X1, word [BLOCK + T1 * 2], 3
58 pinsrw X0, word [BLOCK + T0 * 2], 4
59 pinsrw X1, word [BLOCK + T1 * 2], 4
[all …]
Djchuff-sse2.asm101 pinsrw %34, word [r12 + %2 * SIZEOF_WORD], 0 ; xmm_shadow[0] = block[jno0];
102 pinsrw %35, word [r12 + %10 * SIZEOF_WORD], 0 ; xmm_shadow[8] = block[jno8];
103 pinsrw %36, word [r12 + %18 * SIZEOF_WORD], 0 ; xmm_shadow[16] = block[jno16];
104 pinsrw %37, word [r12 + %26 * SIZEOF_WORD], 0 ; xmm_shadow[24] = block[jno24];
105 pinsrw %34, word [r12 + %3 * SIZEOF_WORD], 1 ; xmm_shadow[1] = block[jno1];
106 pinsrw %35, word [r12 + %11 * SIZEOF_WORD], 1 ; xmm_shadow[9] = block[jno9];
107 pinsrw %36, word [r12 + %19 * SIZEOF_WORD], 1 ; xmm_shadow[17] = block[jno17];
108 pinsrw %37, word [r12 + %27 * SIZEOF_WORD], 1 ; xmm_shadow[25] = block[jno25];
109 pinsrw %34, word [r12 + %4 * SIZEOF_WORD], 2 ; xmm_shadow[2] = block[jno2];
110 pinsrw %35, word [r12 + %12 * SIZEOF_WORD], 2 ; xmm_shadow[10] = block[jno10];
[all …]
/external/libjpeg-turbo/simd/i386/
Djcphuff-sse2.asm37 pinsrw X0, word [BLOCK + T0 * 2], 0
38 pinsrw X1, word [BLOCK + T1 * 2], 0
42 pinsrw X0, word [BLOCK + T0 * 2], 1
43 pinsrw X1, word [BLOCK + T1 * 2], 1
47 pinsrw X0, word [BLOCK + T0 * 2], 2
48 pinsrw X1, word [BLOCK + T1 * 2], 2
52 pinsrw X0, word [BLOCK + T0 * 2], 3
53 pinsrw X1, word [BLOCK + T1 * 2], 3
57 pinsrw X0, word [BLOCK + T0 * 2], 4
58 pinsrw X1, word [BLOCK + T1 * 2], 4
[all …]
Djchuff-sse2.asm88 pinsrw %34, word [esi + %2 * SIZEOF_WORD], 0 ; xmm_shadow[0] = block[jno0];
89 pinsrw %35, word [esi + %10 * SIZEOF_WORD], 0 ; xmm_shadow[8] = block[jno8];
90 pinsrw %36, word [esi + %18 * SIZEOF_WORD], 0 ; xmm_shadow[16] = block[jno16];
91 pinsrw %37, word [esi + %26 * SIZEOF_WORD], 0 ; xmm_shadow[24] = block[jno24];
92 pinsrw %34, word [esi + %3 * SIZEOF_WORD], 1 ; xmm_shadow[1] = block[jno1];
93 pinsrw %35, word [esi + %11 * SIZEOF_WORD], 1 ; xmm_shadow[9] = block[jno9];
94 pinsrw %36, word [esi + %19 * SIZEOF_WORD], 1 ; xmm_shadow[17] = block[jno17];
95 pinsrw %37, word [esi + %27 * SIZEOF_WORD], 1 ; xmm_shadow[25] = block[jno25];
96 pinsrw %34, word [esi + %4 * SIZEOF_WORD], 2 ; xmm_shadow[2] = block[jno2];
97 pinsrw %35, word [esi + %12 * SIZEOF_WORD], 2 ; xmm_shadow[10] = block[jno10];
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/
Dbuildvec-insertvec.ll260 ; SSE41-NEXT: pinsrw $1, %esi, %xmm0
261 ; SSE41-NEXT: pinsrw $2, %edx, %xmm0
262 ; SSE41-NEXT: pinsrw $3, %ecx, %xmm0
263 ; SSE41-NEXT: pinsrw $4, %r8d, %xmm0
264 ; SSE41-NEXT: pinsrw $5, %r9d, %xmm0
265 ; SSE41-NEXT: pinsrw $6, {{[0-9]+}}(%rsp), %xmm0
266 ; SSE41-NEXT: pinsrw $7, {{[0-9]+}}(%rsp), %xmm0
283 ; CHECK-NEXT: pinsrw $1, %edi, %xmm0
284 ; CHECK-NEXT: pinsrw $3, %esi, %xmm0
285 ; CHECK-NEXT: pinsrw $4, %edx, %xmm0
[all …]
Dvec_set-4.ll9 ; X86-NEXT: pinsrw $3, {{[0-9]+}}(%esp), %xmm0
15 ; X64-NEXT: pinsrw $3, %edi, %xmm0
31 ; X86-NEXT: pinsrw $5, %eax, %xmm0
38 ; X64-NEXT: pinsrw $5, %eax, %xmm0
Dinsertelement-zero.ll316 ; SSE2-NEXT: pinsrw $0, %eax, %xmm0
317 ; SSE2-NEXT: pinsrw $6, %eax, %xmm0
323 ; SSE3-NEXT: pinsrw $0, %eax, %xmm0
324 ; SSE3-NEXT: pinsrw $6, %eax, %xmm0
330 ; SSSE3-NEXT: pinsrw $0, %eax, %xmm0
331 ; SSSE3-NEXT: pinsrw $6, %eax, %xmm0
354 ; SSE2-NEXT: pinsrw $0, %eax, %xmm0
355 ; SSE2-NEXT: pinsrw $6, %eax, %xmm0
356 ; SSE2-NEXT: pinsrw $7, %eax, %xmm1
362 ; SSE3-NEXT: pinsrw $0, %eax, %xmm0
[all …]
Dinsertelement-ones.ll215 ; SSE2-NEXT: pinsrw $0, %eax, %xmm0
216 ; SSE2-NEXT: pinsrw $6, %eax, %xmm0
222 ; SSE3-NEXT: pinsrw $0, %eax, %xmm0
223 ; SSE3-NEXT: pinsrw $6, %eax, %xmm0
229 ; SSSE3-NEXT: pinsrw $0, %eax, %xmm0
230 ; SSSE3-NEXT: pinsrw $6, %eax, %xmm0
253 ; SSE2-NEXT: pinsrw $0, %eax, %xmm0
254 ; SSE2-NEXT: pinsrw $6, %eax, %xmm0
255 ; SSE2-NEXT: pinsrw $7, %eax, %xmm1
261 ; SSE3-NEXT: pinsrw $0, %eax, %xmm0
[all …]
Dvec_cast.ll32 ; CHECK-LIN-NEXT: pinsrw $1, %esi, %xmm0
33 ; CHECK-LIN-NEXT: pinsrw $2, %edx, %xmm0
44 ; CHECK-WIN-NEXT: pinsrw $1, %edx, %xmm0
45 ; CHECK-WIN-NEXT: pinsrw $2, %r8d, %xmm0
99 ; CHECK-LIN-NEXT: pinsrw $1, %esi, %xmm0
100 ; CHECK-LIN-NEXT: pinsrw $2, %edx, %xmm0
111 ; CHECK-WIN-NEXT: pinsrw $1, %edx, %xmm0
112 ; CHECK-WIN-NEXT: pinsrw $2, %r8d, %xmm0
Dbuild-vector-128.ll189 ; SSE41-32-NEXT: pinsrw $1, {{[0-9]+}}(%esp), %xmm0
190 ; SSE41-32-NEXT: pinsrw $2, {{[0-9]+}}(%esp), %xmm0
191 ; SSE41-32-NEXT: pinsrw $3, {{[0-9]+}}(%esp), %xmm0
192 ; SSE41-32-NEXT: pinsrw $4, {{[0-9]+}}(%esp), %xmm0
193 ; SSE41-32-NEXT: pinsrw $5, {{[0-9]+}}(%esp), %xmm0
194 ; SSE41-32-NEXT: pinsrw $6, {{[0-9]+}}(%esp), %xmm0
195 ; SSE41-32-NEXT: pinsrw $7, {{[0-9]+}}(%esp), %xmm0
201 ; SSE41-64-NEXT: pinsrw $1, %esi, %xmm0
202 ; SSE41-64-NEXT: pinsrw $2, %edx, %xmm0
203 ; SSE41-64-NEXT: pinsrw $3, %ecx, %xmm0
[all …]
Dpromote-vec3.ll15 ; SSE3-NEXT: pinsrw $1, %ecx, %xmm0
16 ; SSE3-NEXT: pinsrw $2, %eax, %xmm0
77 ; SSE3-NEXT: pinsrw $1, %ecx, %xmm0
78 ; SSE3-NEXT: pinsrw $2, %eax, %xmm0
Dvec_insert-2.ll59 ; X32-NEXT: pinsrw $5, {{[0-9]+}}(%esp), %xmm0
64 ; X64-NEXT: pinsrw $5, %edi, %xmm0
/external/swiftshader/third_party/LLVM/test/CodeGen/X86/
Dsse3.ll22 ; X64: pinsrw $0, %eax, %xmm0
36 ; X64: pinsrw $0, %eax, %xmm0
45 ; X64: pinsrw $0, %eax, %xmm0
46 ; X64: pinsrw $3, %eax, %xmm0
57 ; X64: pinsrw $3, %eax, %xmm0
67 ; X64: pinsrw $1, %eax, [[XMM1]]
69 ; X64: pinsrw $4, %eax, %xmm0
173 ; X64: pinsrw $2, %eax, [[X2]]
175 ; X64: pinsrw $3, %eax, [[X2]]
189 ; X64: pinsrw $1, %eax, %xmm0
[all …]
/external/llvm/test/CodeGen/X86/
Dpromote-vec3.ll14 ; SSE3-NEXT: pinsrw $0, %eax, %xmm1
16 ; SSE3-NEXT: pinsrw $1, %eax, %xmm1
18 ; SSE3-NEXT: pinsrw $2, %eax, %xmm1
77 ; SSE3-NEXT: pinsrw $0, %eax, %xmm0
79 ; SSE3-NEXT: pinsrw $1, %eax, %xmm0
81 ; SSE3-NEXT: pinsrw $2, %eax, %xmm0
Dinsertelement-zero.ll348 ; SSE2-NEXT: pinsrw $0, %eax, %xmm0
349 ; SSE2-NEXT: pinsrw $6, %eax, %xmm0
355 ; SSE3-NEXT: pinsrw $0, %eax, %xmm0
356 ; SSE3-NEXT: pinsrw $6, %eax, %xmm0
362 ; SSSE3-NEXT: pinsrw $0, %eax, %xmm0
363 ; SSSE3-NEXT: pinsrw $6, %eax, %xmm0
386 ; SSE2-NEXT: pinsrw $0, %eax, %xmm0
387 ; SSE2-NEXT: pinsrw $6, %eax, %xmm0
388 ; SSE2-NEXT: pinsrw $7, %eax, %xmm1
394 ; SSE3-NEXT: pinsrw $0, %eax, %xmm0
[all …]
Dvec_set-4.ll8 ; CHECK-NEXT: pinsrw $3, {{[0-9]+}}(%esp), %xmm0
24 ; CHECK-NEXT: pinsrw $5, %eax, %xmm0
Dwiden_conv-3.ll68 ; X86-SSE2-NEXT: pinsrw $0, %esi, %xmm0
70 ; X86-SSE2-NEXT: pinsrw $1, %ecx, %xmm0
118 ; X64-SSE2-NEXT: pinsrw $0, %ecx, %xmm0
120 ; X64-SSE2-NEXT: pinsrw $1, %eax, %xmm0
/external/boringssl/mac-x86/crypto/fipsmodule/
Dghash-x86.S410 pinsrw $2,(%esi,%ebx,2),%mm2
430 pinsrw $2,(%esi,%ecx,2),%mm1
449 pinsrw $2,(%esi,%ebx,2),%mm0
468 pinsrw $2,(%esi,%ecx,2),%mm2
487 pinsrw $2,(%esi,%ebx,2),%mm1
507 pinsrw $2,(%esi,%ecx,2),%mm0
526 pinsrw $2,(%esi,%ebx,2),%mm2
545 pinsrw $2,(%esi,%ecx,2),%mm1
564 pinsrw $2,(%esi,%ebx,2),%mm0
584 pinsrw $2,(%esi,%ecx,2),%mm2
[all …]
/external/boringssl/linux-x86/crypto/fipsmodule/
Dghash-x86.S413 pinsrw $2,(%esi,%ebx,2),%mm2
433 pinsrw $2,(%esi,%ecx,2),%mm1
452 pinsrw $2,(%esi,%ebx,2),%mm0
471 pinsrw $2,(%esi,%ecx,2),%mm2
490 pinsrw $2,(%esi,%ebx,2),%mm1
510 pinsrw $2,(%esi,%ecx,2),%mm0
529 pinsrw $2,(%esi,%ebx,2),%mm2
548 pinsrw $2,(%esi,%ecx,2),%mm1
567 pinsrw $2,(%esi,%ebx,2),%mm0
587 pinsrw $2,(%esi,%ecx,2),%mm2
[all …]
/external/boringssl/win-x86/crypto/fipsmodule/
Dghash-x86.asm422 pinsrw mm2,WORD [ebx*2+esi],2
442 pinsrw mm1,WORD [ecx*2+esi],2
461 pinsrw mm0,WORD [ebx*2+esi],2
480 pinsrw mm2,WORD [ecx*2+esi],2
499 pinsrw mm1,WORD [ebx*2+esi],2
519 pinsrw mm0,WORD [ecx*2+esi],2
538 pinsrw mm2,WORD [ebx*2+esi],2
557 pinsrw mm1,WORD [ecx*2+esi],2
576 pinsrw mm0,WORD [ebx*2+esi],2
596 pinsrw mm2,WORD [ecx*2+esi],2
[all …]
/external/llvm/test/MC/X86/
Dx86_64-encoding.s249 pinsrw $3, %ecx, %xmm5
253 pinsrw $3, %rcx, %xmm5
/external/capstone/suite/MC/X86/
Dx86_64-encoding.s.cs58 0x66,0x0f,0xc4,0xe9,0x03 = pinsrw $3, %ecx, %xmm5
59 0x66,0x0f,0xc4,0xe9,0x03 = pinsrw $3, %ecx, %xmm5
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/X86/
DMMX-64.s745 pinsrw $0, 485498096, %mm4 label
749 pinsrw $0, 64(%rdx), %mm4 label
753 pinsrw $0, 64(%rdx,%rax,4), %mm4 label
757 pinsrw $0, -64(%rdx,%rax,4), %mm4 label
761 pinsrw $0, 64(%rdx,%rax), %mm4 label
765 pinsrw $0, %r13d, %mm4 label
769 pinsrw $0, (%rdx), %mm4 label
Dx86_64-encoding.s273 pinsrw $3, %ecx, %xmm5
277 pinsrw $3, %rcx, %xmm5
DMMX-32.s725 pinsrw $0, -485498096(%edx,%eax,4), %mm4 label
729 pinsrw $0, 485498096(%edx,%eax,4), %mm4 label
733 pinsrw $0, 485498096(%edx), %mm4 label
737 pinsrw $0, 485498096, %mm4 label
741 pinsrw $0, 64(%edx,%eax), %mm4 label
745 pinsrw $0, (%edx), %mm4 label

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