Searched refs:rwcfg (Results 1 – 3 of 3) sorted by relevance
33 const struct socfpga_sdram_rw_mgr_config *rwcfg; variable138 ratio = rwcfg->mem_dq_per_read_dqs / in phy_mgr_initialize()139 rwcfg->mem_virtual_groups_per_read_dqs; in phy_mgr_initialize()142 param->read_correct_mask = (1 << rwcfg->mem_dq_per_read_dqs) - 1; in phy_mgr_initialize()143 param->write_correct_mask = (1 << rwcfg->mem_dq_per_write_dqs) - 1; in phy_mgr_initialize()163 switch (rwcfg->mem_number_of_ranks) { in set_rank_and_odt_mask()170 if (rwcfg->mem_number_of_cs_per_dimm == 1) { in set_rank_and_odt_mask()312 scc_mgr_set(SCC_MGR_IO_IN_DELAY_OFFSET, rwcfg->mem_dq_per_write_dqs, in scc_mgr_set_dqs_io_in_delay()319 rwcfg->mem_dq_per_write_dqs + 1 + dm, in scc_mgr_set_dm_in_delay()330 scc_mgr_set(SCC_MGR_IO_OUT1_DELAY_OFFSET, rwcfg->mem_dq_per_write_dqs, in scc_mgr_set_dqs_out1_delay()[all …]
9 #define RW_MGR_NUM_DM_PER_WRITE_GROUP (rwcfg->mem_data_mask_width \10 / rwcfg->mem_if_write_dqs_width)11 #define RW_MGR_NUM_TRUE_DM_PER_WRITE_GROUP (rwcfg->true_mem_data_mask_width \12 / rwcfg->mem_if_write_dqs_width)14 #define RW_MGR_NUM_DQS_PER_WRITE_GROUP (rwcfg->mem_if_read_dqs_width \15 / rwcfg->mem_if_write_dqs_width)16 #define NUM_RANKS_PER_SHADOW_REG (rwcfg->mem_number_of_ranks / NUM_SHADOW_REGS)
181 RewriterConfig* rwcfg = gopt->mutable_rewrite_options(); in TEST_F() local182 rwcfg->clear_optimizers(); in TEST_F()183 (*rwcfg->add_optimizers()) = "scoped_allocator"; in TEST_F()184 rwcfg->mutable_scoped_allocator_opts()->add_enable_op("Abs"); in TEST_F()