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Searched refs:v8i64 (Results 1 – 25 of 88) sorted by relevance

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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/
DX86InstrVecCompiler.td87 def : Pat<(v8f64 (bitconvert (v8i64 VR512:$src))), (v8f64 VR512:$src)>;
92 def : Pat<(v16f32 (bitconvert (v8i64 VR512:$src))), (v16f32 VR512:$src)>;
97 def : Pat<(v8i64 (bitconvert (v16i32 VR512:$src))), (v8i64 VR512:$src)>;
98 def : Pat<(v8i64 (bitconvert (v32i16 VR512:$src))), (v8i64 VR512:$src)>;
99 def : Pat<(v8i64 (bitconvert (v64i8 VR512:$src))), (v8i64 VR512:$src)>;
100 def : Pat<(v8i64 (bitconvert (v8f64 VR512:$src))), (v8i64 VR512:$src)>;
101 def : Pat<(v8i64 (bitconvert (v16f32 VR512:$src))), (v8i64 VR512:$src)>;
102 def : Pat<(v16i32 (bitconvert (v8i64 VR512:$src))), (v16i32 VR512:$src)>;
107 def : Pat<(v32i16 (bitconvert (v8i64 VR512:$src))), (v32i16 VR512:$src)>;
112 def : Pat<(v64i8 (bitconvert (v8i64 VR512:$src))), (v64i8 VR512:$src)>;
[all …]
DX86TargetTransformInfo.cpp310 { ISD::SRA, MVT::v8i64, 1 }, in getArithmeticInstrCost()
436 { ISD::MUL, MVT::v8i64, 1 } in getArithmeticInstrCost()
476 { ISD::SHL, MVT::v8i64, 1 }, in getArithmeticInstrCost()
477 { ISD::SRL, MVT::v8i64, 1 }, in getArithmeticInstrCost()
481 { ISD::SRA, MVT::v8i64, 1 }, in getArithmeticInstrCost()
488 { ISD::MUL, MVT::v8i64, 8 }, // 3*pmuludq/3*shift/2*add in getArithmeticInstrCost()
902 { TTI::SK_Broadcast, MVT::v8i64, 1 }, // vpbroadcastq in getShuffleCost()
907 { TTI::SK_Reverse, MVT::v8i64, 1 }, // vpermq in getShuffleCost()
916 { TTI::SK_PermuteSingleSrc, MVT::v8i64, 1 }, // vpermq in getShuffleCost()
926 { TTI::SK_PermuteTwoSrc, MVT::v8i64, 1 }, // vpermt2q in getShuffleCost()
[all …]
DX86CallingConv.td121 CCIfType<[v64i8, v32i16, v16i32, v8i64, v16f32, v8f64],
151 CCIfType<[v16i32, v8i64, v16f32, v8f64], CCAssignToStack<64, 64>>
195 CCIfType<[v64i8, v32i16, v16i32, v8i64, v16f32, v8f64],
248 CCIfType<[v64i8, v32i16, v16i32, v8i64, v16f32, v8f64],
303 CCIfType<[v16f32, v8f64, v16i32, v8i64],
550 CCIfNotVarArg<CCIfType<[v64i8, v32i16, v16i32, v8i64, v16f32, v8f64],
570 CCIfType<[v16i32, v8i64, v16f32, v8f64],
613 CCIfType<[v16i32, v16f32, v8f64, v8i64], CCPassIndirect<i64>>,
673 CCIfType<[v64i8, v32i16, v16i32, v8i64, v16f32, v8f64],
731 CCIfType<[v64i8, v32i16, v16i32, v8i64, v16f32, v8f64],
[all …]
DX86InstrAVX512.td75 !if (!eq (Size, 512), "v8i64",
82 !if (!eq (Size, 512), "v8i64",
940 def : Pat<(v2i64 (extract_subvector (v8i64 VR512:$src), (iPTR 2))),
942 (v4i64 (EXTRACT_SUBREG (v8i64 VR512:$src), sub_ymm)),
969 def : Pat<(v2i64 (extract_subvector (v8i64 VR512:$src), (iPTR 2))),
971 (v4i64 (EXTRACT_SUBREG (v8i64 VR512:$src), sub_ymm)),
1399 def : Pat<(v8i64 (X86VBroadcast (v8i64 (X86vzload addr:$src)))),
1460 def : Pat<(v8i64 (X86SubVBroadcast (v4i64 VR256X:$src))),
1461 (VINSERTI64x4Zrr (INSERT_SUBREG (v8i64 (IMPLICIT_DEF)), VR256X:$src, sub_ymm),
1475 def : Pat<(v8i64 (X86SubVBroadcast (loadv2i64 addr:$src))),
[all …]
/external/swiftshader/third_party/LLVM/include/llvm/CodeGen/
DValueTypes.h69 v8i64 = 27, // 8 x i64 enumerator
154 (SimpleTy >= MVT::v2i8 && SimpleTy <= MVT::v8i64)); in isInteger()
205 case v8i64: return i64; in getVectorElementType()
224 case v8i64: in getVectorNumElements()
284 case v8i64: return 512; in getSizeInBits()
360 if (NumElements == 8) return MVT::v8i64; in getVectorVT()
510 return isSimple() ? (V == MVT::v8i64) : isExtended512BitVector(); in is512BitVector()
/external/llvm/include/llvm/CodeGen/
DMachineValueType.h98 v8i64 = 48, // 8 x i64 enumerator
267 SimpleTy == MVT::v8i64); in is512BitVector()
352 case v8i64: in getVectorElementType()
399 case v8i64: in getVectorNumElements()
500 case v8i64: in getSizeInBits()
636 if (NumElements == 8) return MVT::v8i64; in getVectorVT()
/external/llvm/lib/Target/X86/
DX86TargetTransformInfo.cpp138 { ISD::SHL, MVT::v8i64, 1 }, in getArithmeticInstrCost()
139 { ISD::SRL, MVT::v8i64, 1 }, in getArithmeticInstrCost()
140 { ISD::SRA, MVT::v8i64, 1 }, in getArithmeticInstrCost()
539 { ISD::UINT_TO_FP, MVT::v8f32, MVT::v8i64, 1 }, in getCastInstrCost()
540 { ISD::UINT_TO_FP, MVT::v8f64, MVT::v8i64, 1 }, in getCastInstrCost()
544 { ISD::FP_TO_UINT, MVT::v8i64, MVT::v8f32, 1 }, in getCastInstrCost()
547 { ISD::FP_TO_UINT, MVT::v8i64, MVT::v8f64, 1 }, in getCastInstrCost()
560 { ISD::TRUNCATE, MVT::v8i16, MVT::v8i64, 1 }, in getCastInstrCost()
561 { ISD::TRUNCATE, MVT::v8i32, MVT::v8i64, 1 }, in getCastInstrCost()
570 { ISD::ZERO_EXTEND, MVT::v8i64, MVT::v8i16, 1 }, in getCastInstrCost()
[all …]
DX86CallingConv.td68 CCIfType<[v64i8, v32i16, v16i32, v8i64, v16f32, v8f64],
122 CCIfType<[v16f32, v8f64, v16i32, v8i64],
149 CCIfType<[v64i8, v32i16, v16i32, v8i64, v16f32, v8f64],
346 CCIfNotVarArg<CCIfType<[v64i8, v32i16, v16i32, v8i64, v16f32, v8f64],
366 CCIfType<[v16i32, v8i64, v16f32, v8f64],
406 CCIfType<[v16i32, v16f32, v8f64, v8i64], CCPassIndirect<i64>>,
449 CCIfType<[v64i8, v32i16, v16i32, v8i64, v16f32, v8f64],
524 CCIfType<[v64i8, v32i16, v16i32, v8i64, v16f32, v8f64],
541 CCIfNotVarArg<CCIfType<[v64i8, v32i16, v16i32, v8i64, v16f32, v8f64],
560 CCIfNotVarArg<CCIfType<[v64i8, v32i16, v16i32, v8i64, v16f32, v8f64],
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/Support/
DMachineValueType.h101 v8i64 = 51, // 8 x i64 enumerator
371 SimpleTy == MVT::v8i64); in is512BitVector()
481 case v8i64: in getVectorElementType()
558 case v8i64: in getVectorNumElements()
731 case v8i64: in getSizeInBits()
877 if (NumElements == 8) return MVT::v8i64; in getVectorVT()
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/
Davx512vpopcntdq-intrinsics.ll62 %1 = tail call <8 x i64> @llvm.ctpop.v8i64(<8 x i64> %a)
81 %1 = tail call <8 x i64> @llvm.ctpop.v8i64(<8 x i64> %a)
88 declare <8 x i64> @llvm.ctpop.v8i64(<8 x i64>)
Davx512cd-intrinsics.ll68 %1 = call <8 x i64> @llvm.ctlz.v8i64(<8 x i64> %a, i1 false)
71 declare <8 x i64> @llvm.ctlz.v8i64(<8 x i64>, i1) #0
108 %1 = call <8 x i64> @llvm.ctlz.v8i64(<8 x i64> %a, i1 false)
Dbitcast-setcc-512.ll295 define i8 @v8i64(<8 x i64> %a, <8 x i64> %b) {
296 ; SSE-LABEL: v8i64:
310 ; AVX1-LABEL: v8i64:
328 ; AVX2-LABEL: v8i64:
339 ; AVX512F-LABEL: v8i64:
347 ; AVX512BW-LABEL: v8i64:
/external/llvm/lib/Target/AArch64/
DAArch64TargetTransformInfo.cpp205 { ISD::SIGN_EXTEND, MVT::v8i64, MVT::v8i8, 7 }, in getCastInstrCost()
206 { ISD::ZERO_EXTEND, MVT::v8i64, MVT::v8i8, 7 }, in getCastInstrCost()
207 { ISD::SIGN_EXTEND, MVT::v8i64, MVT::v8i16, 6 }, in getCastInstrCost()
208 { ISD::ZERO_EXTEND, MVT::v8i64, MVT::v8i16, 6 }, in getCastInstrCost()
450 { ISD::SELECT, MVT::v8i1, MVT::v8i64, 8 * AmortizationCost }, in getCmpSelInstrCost()
/external/llvm/lib/Target/ARM/
DARMTargetTransformInfo.cpp117 { ISD::SIGN_EXTEND, MVT::v8i64, MVT::v8i8, 7 }, in getCastInstrCost()
118 { ISD::ZERO_EXTEND, MVT::v8i64, MVT::v8i8, 7 }, in getCastInstrCost()
119 { ISD::SIGN_EXTEND, MVT::v8i64, MVT::v8i16, 6 }, in getCastInstrCost()
120 { ISD::ZERO_EXTEND, MVT::v8i64, MVT::v8i16, 6 }, in getCastInstrCost()
302 { ISD::SELECT, MVT::v8i1, MVT::v8i64, 50 }, in getCmpSelInstrCost()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/
DARMTargetTransformInfo.cpp178 { ISD::SIGN_EXTEND, MVT::v8i64, MVT::v8i8, 7 }, in getCastInstrCost()
179 { ISD::ZERO_EXTEND, MVT::v8i64, MVT::v8i8, 7 }, in getCastInstrCost()
180 { ISD::SIGN_EXTEND, MVT::v8i64, MVT::v8i16, 6 }, in getCastInstrCost()
181 { ISD::ZERO_EXTEND, MVT::v8i64, MVT::v8i16, 6 }, in getCastInstrCost()
363 { ISD::SELECT, MVT::v8i1, MVT::v8i64, 50 }, in getCmpSelInstrCost()
/external/swiftshader/third_party/LLVM/lib/VMCore/
DValueTypes.cpp135 case MVT::v8i64: return "v8i64"; in getEVTString()
182 case MVT::v8i64: return VectorType::get(Type::getInt64Ty(Context), 8); in getTypeForEVT()
/external/swiftshader/third_party/llvm-7.0/llvm/test/Analysis/CostModel/X86/
Dctlz.ll101 declare <8 x i64> @llvm.ctlz.v8i64(<8 x i64>, i1)
216 … estimated cost of 100 for instruction: %ctlz = call <8 x i64> @llvm.ctlz.v8i64(<8 x i64> %a, i1 f…
220 …n estimated cost of 92 for instruction: %ctlz = call <8 x i64> @llvm.ctlz.v8i64(<8 x i64> %a, i1 f…
224 …n estimated cost of 96 for instruction: %ctlz = call <8 x i64> @llvm.ctlz.v8i64(<8 x i64> %a, i1 f…
228 …n estimated cost of 46 for instruction: %ctlz = call <8 x i64> @llvm.ctlz.v8i64(<8 x i64> %a, i1 f…
232 …n estimated cost of 29 for instruction: %ctlz = call <8 x i64> @llvm.ctlz.v8i64(<8 x i64> %a, i1 f…
236 …n estimated cost of 23 for instruction: %ctlz = call <8 x i64> @llvm.ctlz.v8i64(<8 x i64> %a, i1 f…
240 …an estimated cost of 1 for instruction: %ctlz = call <8 x i64> @llvm.ctlz.v8i64(<8 x i64> %a, i1 f…
243 %ctlz = call <8 x i64> @llvm.ctlz.v8i64(<8 x i64> %a, i1 0)
249 … estimated cost of 100 for instruction: %ctlz = call <8 x i64> @llvm.ctlz.v8i64(<8 x i64> %a, i1 t…
[all …]
Dctpop.ll81 declare <8 x i64> @llvm.ctpop.v8i64(<8 x i64>)
134 …nd an estimated cost of 48 for instruction: %ctpop = call <8 x i64> @llvm.ctpop.v8i64(<8 x i64> %a)
138 …nd an estimated cost of 28 for instruction: %ctpop = call <8 x i64> @llvm.ctpop.v8i64(<8 x i64> %a)
142 …nd an estimated cost of 32 for instruction: %ctpop = call <8 x i64> @llvm.ctpop.v8i64(<8 x i64> %a)
146 …nd an estimated cost of 14 for instruction: %ctpop = call <8 x i64> @llvm.ctpop.v8i64(<8 x i64> %a)
150 …nd an estimated cost of 16 for instruction: %ctpop = call <8 x i64> @llvm.ctpop.v8i64(<8 x i64> %a)
154 …und an estimated cost of 7 for instruction: %ctpop = call <8 x i64> @llvm.ctpop.v8i64(<8 x i64> %a)
157 %ctpop = call <8 x i64> @llvm.ctpop.v8i64(<8 x i64> %a)
Dcttz.ll100 declare <8 x i64> @llvm.cttz.v8i64(<8 x i64>, i1)
199 …n estimated cost of 56 for instruction: %cttz = call <8 x i64> @llvm.cttz.v8i64(<8 x i64> %a, i1 f…
203 …n estimated cost of 40 for instruction: %cttz = call <8 x i64> @llvm.cttz.v8i64(<8 x i64> %a, i1 f…
207 …n estimated cost of 44 for instruction: %cttz = call <8 x i64> @llvm.cttz.v8i64(<8 x i64> %a, i1 f…
211 …n estimated cost of 20 for instruction: %cttz = call <8 x i64> @llvm.cttz.v8i64(<8 x i64> %a, i1 f…
215 …n estimated cost of 20 for instruction: %cttz = call <8 x i64> @llvm.cttz.v8i64(<8 x i64> %a, i1 f…
219 …n estimated cost of 10 for instruction: %cttz = call <8 x i64> @llvm.cttz.v8i64(<8 x i64> %a, i1 f…
222 %cttz = call <8 x i64> @llvm.cttz.v8i64(<8 x i64> %a, i1 0)
228 …n estimated cost of 56 for instruction: %cttz = call <8 x i64> @llvm.cttz.v8i64(<8 x i64> %a, i1 t…
232 …n estimated cost of 40 for instruction: %cttz = call <8 x i64> @llvm.cttz.v8i64(<8 x i64> %a, i1 t…
[all …]
Dbitreverse.ll104 declare <8 x i64> @llvm.bitreverse.v8i64(<8 x i64>)
165 …ated cost of 116 for instruction: %bitreverse = call <8 x i64> @llvm.bitreverse.v8i64(<8 x i64> %a)
169 …mated cost of 20 for instruction: %bitreverse = call <8 x i64> @llvm.bitreverse.v8i64(<8 x i64> %a)
173 …mated cost of 24 for instruction: %bitreverse = call <8 x i64> @llvm.bitreverse.v8i64(<8 x i64> %a)
177 …mated cost of 10 for instruction: %bitreverse = call <8 x i64> @llvm.bitreverse.v8i64(<8 x i64> %a)
181 …mated cost of 36 for instruction: %bitreverse = call <8 x i64> @llvm.bitreverse.v8i64(<8 x i64> %a)
185 …imated cost of 5 for instruction: %bitreverse = call <8 x i64> @llvm.bitreverse.v8i64(<8 x i64> %a)
189 …imated cost of 8 for instruction: %bitreverse = call <8 x i64> @llvm.bitreverse.v8i64(<8 x i64> %a)
192 %bitreverse = call <8 x i64> @llvm.bitreverse.v8i64(<8 x i64> %a)
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/
DAArch64TargetTransformInfo.cpp308 { ISD::SIGN_EXTEND, MVT::v8i64, MVT::v8i8, 7 }, in getCastInstrCost()
309 { ISD::ZERO_EXTEND, MVT::v8i64, MVT::v8i8, 7 }, in getCastInstrCost()
310 { ISD::SIGN_EXTEND, MVT::v8i64, MVT::v8i16, 6 }, in getCastInstrCost()
311 { ISD::ZERO_EXTEND, MVT::v8i64, MVT::v8i16, 6 }, in getCastInstrCost()
604 { ISD::SELECT, MVT::v8i1, MVT::v8i64, 8 * AmortizationCost }, in getCmpSelInstrCost()
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/X86/
DX86GenGlobalISel.inc1450 …dd:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) => (VPADDQZrr:{ *:[v8i64]…
1994 …ub:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) => (VPSUBQZrr:{ *:[v8i64]…
2461 …ul:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) => (VPMULLQZrr:{ *:[v8i64…
3706 …nd:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) => (VPANDQZrr:{ *:[v8i64]…
4784 …(or:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) => (VPORQZrr:{ *:[v8i64]…
5609 …or:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) => (VPXORQZrr:{ *:[v8i64]…
6437 // (bitconvert:{ *:[v8f64] } VR512:{ *:[v8i64] }:$src) => VR512:{ *:[v8f64] }:$src
6502 // (bitconvert:{ *:[v8i64] } VR512:{ *:[v16i32] }:$src) => VR512:{ *:[v8i64] }:$src
6515 // (bitconvert:{ *:[v8i64] } VR512:{ *:[v32i16] }:$src) => VR512:{ *:[v8i64] }:$src
6528 // (bitconvert:{ *:[v8i64] } VR512:{ *:[v64i8] }:$src) => VR512:{ *:[v8i64] }:$src
[all …]
DX86GenFastISel.inc169 if (RetVT.SimpleTy != MVT::v8i64)
190 case MVT::v8i64: return fastEmit_ISD_ABS_MVT_v8i64_r(RetVT, Op0, Op0IsKill);
466 if (RetVT.SimpleTy != MVT::v8i64)
484 case MVT::v8i64: return fastEmit_ISD_CTLZ_MVT_v8i64_r(RetVT, Op0, Op0IsKill);
618 if (RetVT.SimpleTy != MVT::v8i64)
642 case MVT::v8i64: return fastEmit_ISD_CTPOP_MVT_v8i64_r(RetVT, Op0, Op0IsKill);
1019 case MVT::v8i64: return fastEmit_ISD_FP_TO_SINT_MVT_v8f32_MVT_v8i64_r(Op0, Op0IsKill);
1084 case MVT::v8i64: return fastEmit_ISD_FP_TO_SINT_MVT_v8f64_MVT_v8i64_r(Op0, Op0IsKill);
1188 case MVT::v8i64: return fastEmit_ISD_FP_TO_UINT_MVT_v8f32_MVT_v8i64_r(Op0, Op0IsKill);
1250 case MVT::v8i64: return fastEmit_ISD_FP_TO_UINT_MVT_v8f64_MVT_v8i64_r(Op0, Op0IsKill);
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/
DValueTypes.cpp177 case MVT::v8i64: return "v8i64"; in getEVTString()
258 case MVT::v8i64: return VectorType::get(Type::getInt64Ty(Context), 8); in getTypeForEVT()
/external/llvm/lib/IR/
DValueTypes.cpp180 case MVT::v8i64: return "v8i64"; in getEVTString()
258 case MVT::v8i64: return VectorType::get(Type::getInt64Ty(Context), 8); in getTypeForEVT()

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