1/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ 2|* *| 3|* Global Instruction Selector for the X86 target *| 4|* *| 5|* Automatically generated file, do not edit! *| 6|* *| 7\*===----------------------------------------------------------------------===*/ 8 9#ifdef GET_GLOBALISEL_PREDICATE_BITSET 10const unsigned MAX_SUBTARGET_PREDICATES = 114; 11using PredicateBitset = llvm::PredicateBitsetImpl<MAX_SUBTARGET_PREDICATES>; 12#endif // ifdef GET_GLOBALISEL_PREDICATE_BITSET 13 14#ifdef GET_GLOBALISEL_TEMPORARIES_DECL 15 mutable MatcherState State; 16 typedef ComplexRendererFns(X86InstructionSelector::*ComplexMatcherMemFn)(MachineOperand &) const; 17 typedef void(X86InstructionSelector::*CustomRendererFn)(MachineInstrBuilder &, const MachineInstr&) const; 18 const ISelInfoTy<PredicateBitset, ComplexMatcherMemFn, CustomRendererFn> ISelInfo; 19 static X86InstructionSelector::ComplexMatcherMemFn ComplexPredicateFns[]; 20 static X86InstructionSelector::CustomRendererFn CustomRenderers[]; 21 bool testImmPredicate_I64(unsigned PredicateID, int64_t Imm) const override; 22 bool testImmPredicate_APInt(unsigned PredicateID, const APInt &Imm) const override; 23 bool testImmPredicate_APFloat(unsigned PredicateID, const APFloat &Imm) const override; 24 const int64_t *getMatchTable() const override; 25 bool testMIPredicate_MI(unsigned PredicateID, const MachineInstr &MI) const override; 26#endif // ifdef GET_GLOBALISEL_TEMPORARIES_DECL 27 28#ifdef GET_GLOBALISEL_TEMPORARIES_INIT 29, State(0), 30ISelInfo(TypeObjects, NumTypeObjects, FeatureBitsets, ComplexPredicateFns, CustomRenderers) 31#endif // ifdef GET_GLOBALISEL_TEMPORARIES_INIT 32 33#ifdef GET_GLOBALISEL_IMPL 34// Bits for subtarget features that participate in instruction matching. 35enum SubtargetFeatureBits : uint8_t { 36 Feature_TruePredicateBit = 49, 37 Feature_HasCMovBit = 21, 38 Feature_NoCMovBit = 101, 39 Feature_HasMMXBit = 82, 40 Feature_Has3DNowBit = 84, 41 Feature_HasSSE1Bit = 35, 42 Feature_UseSSE1Bit = 43, 43 Feature_HasSSE2Bit = 36, 44 Feature_UseSSE2Bit = 44, 45 Feature_HasSSE3Bit = 27, 46 Feature_UseSSE3Bit = 52, 47 Feature_HasSSSE3Bit = 83, 48 Feature_UseSSSE3Bit = 53, 49 Feature_UseSSE41Bit = 50, 50 Feature_HasSSE42Bit = 57, 51 Feature_UseSSE42Bit = 56, 52 Feature_HasSSE4ABit = 66, 53 Feature_NoAVXBit = 62, 54 Feature_HasAVXBit = 45, 55 Feature_HasAVX2Bit = 39, 56 Feature_HasAVX1OnlyBit = 37, 57 Feature_HasAVX512Bit = 70, 58 Feature_UseAVXBit = 41, 59 Feature_UseAVX2Bit = 68, 60 Feature_NoAVX512Bit = 32, 61 Feature_HasCDIBit = 74, 62 Feature_HasVPOPCNTDQBit = 78, 63 Feature_HasERIBit = 77, 64 Feature_HasDQIBit = 72, 65 Feature_NoDQIBit = 54, 66 Feature_HasBWIBit = 73, 67 Feature_NoBWIBit = 51, 68 Feature_HasVLXBit = 71, 69 Feature_NoVLXBit = 31, 70 Feature_NoVLX_Or_NoBWIBit = 48, 71 Feature_NoVLX_Or_NoDQIBit = 105, 72 Feature_HasVNNIBit = 80, 73 Feature_HasBITALGBit = 81, 74 Feature_HasPOPCNTBit = 55, 75 Feature_HasAESBit = 59, 76 Feature_HasVAESBit = 61, 77 Feature_NoVLX_Or_NoVAESBit = 60, 78 Feature_HasFXSRBit = 28, 79 Feature_HasXSAVEBit = 90, 80 Feature_HasXSAVEOPTBit = 91, 81 Feature_HasXSAVECBit = 92, 82 Feature_HasXSAVESBit = 93, 83 Feature_HasPCLMULBit = 63, 84 Feature_NoVLX_Or_NoVPCLMULQDQBit = 64, 85 Feature_HasVPCLMULQDQBit = 65, 86 Feature_HasGFNIBit = 69, 87 Feature_HasFMABit = 29, 88 Feature_HasFMA4Bit = 33, 89 Feature_NoFMA4Bit = 30, 90 Feature_HasXOPBit = 34, 91 Feature_HasTBMBit = 9, 92 Feature_NoTBMBit = 112, 93 Feature_HasLWPBit = 10, 94 Feature_HasMOVBEBit = 3, 95 Feature_HasRDRANDBit = 4, 96 Feature_HasF16CBit = 67, 97 Feature_HasFSGSBaseBit = 94, 98 Feature_HasLZCNTBit = 6, 99 Feature_HasBMIBit = 7, 100 Feature_HasBMI2Bit = 8, 101 Feature_NoBMI2Bit = 113, 102 Feature_HasVBMIBit = 75, 103 Feature_HasVBMI2Bit = 79, 104 Feature_HasIFMABit = 76, 105 Feature_HasRTMBit = 88, 106 Feature_HasADXBit = 20, 107 Feature_HasSHABit = 58, 108 Feature_HasRDSEEDBit = 5, 109 Feature_HasSSEPrefetchBit = 46, 110 Feature_NoSSEPrefetchBit = 85, 111 Feature_HasPrefetchWBit = 86, 112 Feature_HasPREFETCHWT1Bit = 87, 113 Feature_HasLAHFSAHFBit = 2, 114 Feature_HasMWAITXBit = 11, 115 Feature_HasCLZEROBit = 15, 116 Feature_HasCLDEMOTEBit = 18, 117 Feature_HasMOVDIRIBit = 13, 118 Feature_HasMOVDIR64BBit = 14, 119 Feature_HasPTWRITEBit = 97, 120 Feature_FPStackf32Bit = 25, 121 Feature_FPStackf64Bit = 26, 122 Feature_HasCLFLUSHOPTBit = 16, 123 Feature_HasCLWBBit = 17, 124 Feature_HasWBNOINVDBit = 89, 125 Feature_HasRDPIDBit = 96, 126 Feature_HasWAITPKGBit = 12, 127 Feature_HasINVPCIDBit = 95, 128 Feature_HasCmpxchg16bBit = 102, 129 Feature_Not64BitModeBit = 0, 130 Feature_In64BitModeBit = 1, 131 Feature_IsLP64Bit = 99, 132 Feature_NotLP64Bit = 98, 133 Feature_NotWin64WithoutFPBit = 100, 134 Feature_IsPS4Bit = 107, 135 Feature_NotPS4Bit = 106, 136 Feature_KernelCodeBit = 108, 137 Feature_NearDataBit = 110, 138 Feature_IsNotPICBit = 109, 139 Feature_OptForSizeBit = 40, 140 Feature_OptForMinSizeBit = 38, 141 Feature_OptForSpeedBit = 104, 142 Feature_UseIncDecBit = 19, 143 Feature_NoSSE41_Or_OptForSizeBit = 42, 144 Feature_CallImmAddrBit = 111, 145 Feature_FavorMemIndirectCallBit = 22, 146 Feature_HasFastSHLDRotateBit = 103, 147 Feature_HasMFenceBit = 47, 148 Feature_UseRetpolineBit = 24, 149 Feature_NotUseRetpolineBit = 23, 150}; 151 152PredicateBitset X86InstructionSelector:: 153computeAvailableModuleFeatures(const X86Subtarget *Subtarget) const { 154 PredicateBitset Features; 155 if (true) 156 Features[Feature_TruePredicateBit] = 1; 157 if (Subtarget->hasCMov()) 158 Features[Feature_HasCMovBit] = 1; 159 if (!Subtarget->hasCMov()) 160 Features[Feature_NoCMovBit] = 1; 161 if (Subtarget->hasMMX()) 162 Features[Feature_HasMMXBit] = 1; 163 if (Subtarget->has3DNow()) 164 Features[Feature_Has3DNowBit] = 1; 165 if (Subtarget->hasSSE1()) 166 Features[Feature_HasSSE1Bit] = 1; 167 if (Subtarget->hasSSE1() && !Subtarget->hasAVX()) 168 Features[Feature_UseSSE1Bit] = 1; 169 if (Subtarget->hasSSE2()) 170 Features[Feature_HasSSE2Bit] = 1; 171 if (Subtarget->hasSSE2() && !Subtarget->hasAVX()) 172 Features[Feature_UseSSE2Bit] = 1; 173 if (Subtarget->hasSSE3()) 174 Features[Feature_HasSSE3Bit] = 1; 175 if (Subtarget->hasSSE3() && !Subtarget->hasAVX()) 176 Features[Feature_UseSSE3Bit] = 1; 177 if (Subtarget->hasSSSE3()) 178 Features[Feature_HasSSSE3Bit] = 1; 179 if (Subtarget->hasSSSE3() && !Subtarget->hasAVX()) 180 Features[Feature_UseSSSE3Bit] = 1; 181 if (Subtarget->hasSSE41() && !Subtarget->hasAVX()) 182 Features[Feature_UseSSE41Bit] = 1; 183 if (Subtarget->hasSSE42()) 184 Features[Feature_HasSSE42Bit] = 1; 185 if (Subtarget->hasSSE42() && !Subtarget->hasAVX()) 186 Features[Feature_UseSSE42Bit] = 1; 187 if (Subtarget->hasSSE4A()) 188 Features[Feature_HasSSE4ABit] = 1; 189 if (!Subtarget->hasAVX()) 190 Features[Feature_NoAVXBit] = 1; 191 if (Subtarget->hasAVX()) 192 Features[Feature_HasAVXBit] = 1; 193 if (Subtarget->hasAVX2()) 194 Features[Feature_HasAVX2Bit] = 1; 195 if (Subtarget->hasAVX() && !Subtarget->hasAVX2()) 196 Features[Feature_HasAVX1OnlyBit] = 1; 197 if (Subtarget->hasAVX512()) 198 Features[Feature_HasAVX512Bit] = 1; 199 if (Subtarget->hasAVX() && !Subtarget->hasAVX512()) 200 Features[Feature_UseAVXBit] = 1; 201 if (Subtarget->hasAVX2() && !Subtarget->hasAVX512()) 202 Features[Feature_UseAVX2Bit] = 1; 203 if (!Subtarget->hasAVX512()) 204 Features[Feature_NoAVX512Bit] = 1; 205 if (Subtarget->hasCDI()) 206 Features[Feature_HasCDIBit] = 1; 207 if (Subtarget->hasVPOPCNTDQ()) 208 Features[Feature_HasVPOPCNTDQBit] = 1; 209 if (Subtarget->hasERI()) 210 Features[Feature_HasERIBit] = 1; 211 if (Subtarget->hasDQI()) 212 Features[Feature_HasDQIBit] = 1; 213 if (!Subtarget->hasDQI()) 214 Features[Feature_NoDQIBit] = 1; 215 if (Subtarget->hasBWI()) 216 Features[Feature_HasBWIBit] = 1; 217 if (!Subtarget->hasBWI()) 218 Features[Feature_NoBWIBit] = 1; 219 if (Subtarget->hasVLX()) 220 Features[Feature_HasVLXBit] = 1; 221 if (!Subtarget->hasVLX()) 222 Features[Feature_NoVLXBit] = 1; 223 if (!Subtarget->hasVLX() || !Subtarget->hasBWI()) 224 Features[Feature_NoVLX_Or_NoBWIBit] = 1; 225 if (!Subtarget->hasVLX() || !Subtarget->hasDQI()) 226 Features[Feature_NoVLX_Or_NoDQIBit] = 1; 227 if (Subtarget->hasVNNI()) 228 Features[Feature_HasVNNIBit] = 1; 229 if (Subtarget->hasBITALG()) 230 Features[Feature_HasBITALGBit] = 1; 231 if (Subtarget->hasPOPCNT()) 232 Features[Feature_HasPOPCNTBit] = 1; 233 if (Subtarget->hasAES()) 234 Features[Feature_HasAESBit] = 1; 235 if (Subtarget->hasVAES()) 236 Features[Feature_HasVAESBit] = 1; 237 if (!Subtarget->hasVLX() || !Subtarget->hasVAES()) 238 Features[Feature_NoVLX_Or_NoVAESBit] = 1; 239 if (Subtarget->hasFXSR()) 240 Features[Feature_HasFXSRBit] = 1; 241 if (Subtarget->hasXSAVE()) 242 Features[Feature_HasXSAVEBit] = 1; 243 if (Subtarget->hasXSAVEOPT()) 244 Features[Feature_HasXSAVEOPTBit] = 1; 245 if (Subtarget->hasXSAVEC()) 246 Features[Feature_HasXSAVECBit] = 1; 247 if (Subtarget->hasXSAVES()) 248 Features[Feature_HasXSAVESBit] = 1; 249 if (Subtarget->hasPCLMUL()) 250 Features[Feature_HasPCLMULBit] = 1; 251 if (!Subtarget->hasVLX() || !Subtarget->hasVPCLMULQDQ()) 252 Features[Feature_NoVLX_Or_NoVPCLMULQDQBit] = 1; 253 if (Subtarget->hasVPCLMULQDQ()) 254 Features[Feature_HasVPCLMULQDQBit] = 1; 255 if (Subtarget->hasGFNI()) 256 Features[Feature_HasGFNIBit] = 1; 257 if (Subtarget->hasFMA()) 258 Features[Feature_HasFMABit] = 1; 259 if (Subtarget->hasFMA4()) 260 Features[Feature_HasFMA4Bit] = 1; 261 if (!Subtarget->hasFMA4()) 262 Features[Feature_NoFMA4Bit] = 1; 263 if (Subtarget->hasXOP()) 264 Features[Feature_HasXOPBit] = 1; 265 if (Subtarget->hasTBM()) 266 Features[Feature_HasTBMBit] = 1; 267 if (!Subtarget->hasTBM()) 268 Features[Feature_NoTBMBit] = 1; 269 if (Subtarget->hasLWP()) 270 Features[Feature_HasLWPBit] = 1; 271 if (Subtarget->hasMOVBE()) 272 Features[Feature_HasMOVBEBit] = 1; 273 if (Subtarget->hasRDRAND()) 274 Features[Feature_HasRDRANDBit] = 1; 275 if (Subtarget->hasF16C()) 276 Features[Feature_HasF16CBit] = 1; 277 if (Subtarget->hasFSGSBase()) 278 Features[Feature_HasFSGSBaseBit] = 1; 279 if (Subtarget->hasLZCNT()) 280 Features[Feature_HasLZCNTBit] = 1; 281 if (Subtarget->hasBMI()) 282 Features[Feature_HasBMIBit] = 1; 283 if (Subtarget->hasBMI2()) 284 Features[Feature_HasBMI2Bit] = 1; 285 if (!Subtarget->hasBMI2()) 286 Features[Feature_NoBMI2Bit] = 1; 287 if (Subtarget->hasVBMI()) 288 Features[Feature_HasVBMIBit] = 1; 289 if (Subtarget->hasVBMI2()) 290 Features[Feature_HasVBMI2Bit] = 1; 291 if (Subtarget->hasIFMA()) 292 Features[Feature_HasIFMABit] = 1; 293 if (Subtarget->hasRTM()) 294 Features[Feature_HasRTMBit] = 1; 295 if (Subtarget->hasADX()) 296 Features[Feature_HasADXBit] = 1; 297 if (Subtarget->hasSHA()) 298 Features[Feature_HasSHABit] = 1; 299 if (Subtarget->hasRDSEED()) 300 Features[Feature_HasRDSEEDBit] = 1; 301 if (Subtarget->hasSSEPrefetch()) 302 Features[Feature_HasSSEPrefetchBit] = 1; 303 if (!Subtarget->hasSSEPrefetch()) 304 Features[Feature_NoSSEPrefetchBit] = 1; 305 if (Subtarget->hasPRFCHW()) 306 Features[Feature_HasPrefetchWBit] = 1; 307 if (Subtarget->hasPREFETCHWT1()) 308 Features[Feature_HasPREFETCHWT1Bit] = 1; 309 if (Subtarget->hasLAHFSAHF()) 310 Features[Feature_HasLAHFSAHFBit] = 1; 311 if (Subtarget->hasMWAITX()) 312 Features[Feature_HasMWAITXBit] = 1; 313 if (Subtarget->hasCLZERO()) 314 Features[Feature_HasCLZEROBit] = 1; 315 if (Subtarget->hasCLDEMOTE()) 316 Features[Feature_HasCLDEMOTEBit] = 1; 317 if (Subtarget->hasMOVDIRI()) 318 Features[Feature_HasMOVDIRIBit] = 1; 319 if (Subtarget->hasMOVDIR64B()) 320 Features[Feature_HasMOVDIR64BBit] = 1; 321 if (Subtarget->hasPTWRITE()) 322 Features[Feature_HasPTWRITEBit] = 1; 323 if (!Subtarget->hasSSE1()) 324 Features[Feature_FPStackf32Bit] = 1; 325 if (!Subtarget->hasSSE2()) 326 Features[Feature_FPStackf64Bit] = 1; 327 if (Subtarget->hasCLFLUSHOPT()) 328 Features[Feature_HasCLFLUSHOPTBit] = 1; 329 if (Subtarget->hasCLWB()) 330 Features[Feature_HasCLWBBit] = 1; 331 if (Subtarget->hasWBNOINVD()) 332 Features[Feature_HasWBNOINVDBit] = 1; 333 if (Subtarget->hasRDPID()) 334 Features[Feature_HasRDPIDBit] = 1; 335 if (Subtarget->hasWAITPKG()) 336 Features[Feature_HasWAITPKGBit] = 1; 337 if (Subtarget->hasINVPCID()) 338 Features[Feature_HasINVPCIDBit] = 1; 339 if (Subtarget->hasCmpxchg16b()) 340 Features[Feature_HasCmpxchg16bBit] = 1; 341 if (!Subtarget->is64Bit()) 342 Features[Feature_Not64BitModeBit] = 1; 343 if (Subtarget->is64Bit()) 344 Features[Feature_In64BitModeBit] = 1; 345 if (Subtarget->isTarget64BitLP64()) 346 Features[Feature_IsLP64Bit] = 1; 347 if (!Subtarget->isTarget64BitLP64()) 348 Features[Feature_NotLP64Bit] = 1; 349 if (Subtarget->isTargetPS4()) 350 Features[Feature_IsPS4Bit] = 1; 351 if (!Subtarget->isTargetPS4()) 352 Features[Feature_NotPS4Bit] = 1; 353 if (TM.getCodeModel() == CodeModel::Kernel) 354 Features[Feature_KernelCodeBit] = 1; 355 if (TM.getCodeModel() == CodeModel::Small ||TM.getCodeModel() == CodeModel::Kernel) 356 Features[Feature_NearDataBit] = 1; 357 if (!TM.isPositionIndependent()) 358 Features[Feature_IsNotPICBit] = 1; 359 if (Subtarget->isLegalToCallImmediateAddr()) 360 Features[Feature_CallImmAddrBit] = 1; 361 if (!Subtarget->slowTwoMemOps()) 362 Features[Feature_FavorMemIndirectCallBit] = 1; 363 if (Subtarget->hasFastSHLDRotate()) 364 Features[Feature_HasFastSHLDRotateBit] = 1; 365 if (Subtarget->hasMFence()) 366 Features[Feature_HasMFenceBit] = 1; 367 if (Subtarget->useRetpoline()) 368 Features[Feature_UseRetpolineBit] = 1; 369 if (!Subtarget->useRetpoline()) 370 Features[Feature_NotUseRetpolineBit] = 1; 371 return Features; 372} 373 374PredicateBitset X86InstructionSelector:: 375computeAvailableFunctionFeatures(const X86Subtarget *Subtarget, const MachineFunction *MF) const { 376 PredicateBitset Features; 377 if (!Subtarget->isTargetWin64() ||Subtarget->getFrameLowering()->hasFP(*MF)) 378 Features[Feature_NotWin64WithoutFPBit] = 1; 379 if (MF->getFunction().optForSize()) 380 Features[Feature_OptForSizeBit] = 1; 381 if (MF->getFunction().optForMinSize()) 382 Features[Feature_OptForMinSizeBit] = 1; 383 if (!MF->getFunction().optForSize()) 384 Features[Feature_OptForSpeedBit] = 1; 385 if (!Subtarget->slowIncDec() || MF->getFunction().optForSize()) 386 Features[Feature_UseIncDecBit] = 1; 387 if (MF->getFunction().optForSize() || !Subtarget->hasSSE41()) 388 Features[Feature_NoSSE41_Or_OptForSizeBit] = 1; 389 return Features; 390} 391 392// LLT Objects. 393enum { 394 GILLT_s1, 395 GILLT_s8, 396 GILLT_s16, 397 GILLT_s32, 398 GILLT_s64, 399 GILLT_s80, 400 GILLT_s128, 401 GILLT_v2s1, 402 GILLT_v2s64, 403 GILLT_v4s1, 404 GILLT_v4s32, 405 GILLT_v4s64, 406 GILLT_v8s1, 407 GILLT_v8s16, 408 GILLT_v8s32, 409 GILLT_v8s64, 410 GILLT_v16s1, 411 GILLT_v16s8, 412 GILLT_v16s16, 413 GILLT_v16s32, 414 GILLT_v32s1, 415 GILLT_v32s8, 416 GILLT_v32s16, 417 GILLT_v64s1, 418 GILLT_v64s8, 419}; 420const static size_t NumTypeObjects = 25; 421const static LLT TypeObjects[] = { 422 LLT::scalar(1), 423 LLT::scalar(8), 424 LLT::scalar(16), 425 LLT::scalar(32), 426 LLT::scalar(64), 427 LLT::scalar(80), 428 LLT::scalar(128), 429 LLT::vector(2, 1), 430 LLT::vector(2, 64), 431 LLT::vector(4, 1), 432 LLT::vector(4, 32), 433 LLT::vector(4, 64), 434 LLT::vector(8, 1), 435 LLT::vector(8, 16), 436 LLT::vector(8, 32), 437 LLT::vector(8, 64), 438 LLT::vector(16, 1), 439 LLT::vector(16, 8), 440 LLT::vector(16, 16), 441 LLT::vector(16, 32), 442 LLT::vector(32, 1), 443 LLT::vector(32, 8), 444 LLT::vector(32, 16), 445 LLT::vector(64, 1), 446 LLT::vector(64, 8), 447}; 448 449// Feature bitsets. 450enum { 451 GIFBS_Invalid, 452 GIFBS_FPStackf32, 453 GIFBS_FPStackf64, 454 GIFBS_Has3DNow, 455 GIFBS_HasAVX, 456 GIFBS_HasAVX1Only, 457 GIFBS_HasAVX2, 458 GIFBS_HasAVX512, 459 GIFBS_HasBMI, 460 GIFBS_HasBMI2, 461 GIFBS_HasBWI, 462 GIFBS_HasDQI, 463 GIFBS_HasLWP, 464 GIFBS_HasMFence, 465 GIFBS_HasMMX, 466 GIFBS_HasMOVBE, 467 GIFBS_HasPTWRITE, 468 GIFBS_HasRTM, 469 GIFBS_HasSHA, 470 GIFBS_HasSSE1, 471 GIFBS_HasSSE2, 472 GIFBS_HasSSE42, 473 GIFBS_HasSSE4A, 474 GIFBS_HasTBM, 475 GIFBS_HasVLX, 476 GIFBS_HasWAITPKG, 477 GIFBS_HasWBNOINVD, 478 GIFBS_HasXOP, 479 GIFBS_In64BitMode, 480 GIFBS_NoDQI, 481 GIFBS_Not64BitMode, 482 GIFBS_UseAVX, 483 GIFBS_UseIncDec, 484 GIFBS_UseSSE1, 485 GIFBS_UseSSE2, 486 GIFBS_UseSSE41, 487 GIFBS_UseSSSE3, 488 GIFBS_HasAES_HasAVX, 489 GIFBS_HasAES_NoAVX, 490 GIFBS_HasAVX_NoVLX, 491 GIFBS_HasAVX_NoVLX_Or_NoBWI, 492 GIFBS_HasAVX2_NoVLX, 493 GIFBS_HasAVX2_NoVLX_Or_NoBWI, 494 GIFBS_HasAVX512_HasVAES, 495 GIFBS_HasAVX512_HasVLX, 496 GIFBS_HasAVX512_HasVPCLMULQDQ, 497 GIFBS_HasBWI_HasVLX, 498 GIFBS_HasDQI_HasVLX, 499 GIFBS_HasDQI_NoBWI, 500 GIFBS_HasFSGSBase_In64BitMode, 501 GIFBS_HasPCLMUL_NoAVX, 502 GIFBS_HasPTWRITE_In64BitMode, 503 GIFBS_HasRDPID_Not64BitMode, 504 GIFBS_HasSSE2_NoAVX512, 505 GIFBS_HasVAES_HasVLX, 506 GIFBS_HasVAES_NoVLX, 507 GIFBS_HasVLX_HasVPCLMULQDQ, 508 GIFBS_HasVPCLMULQDQ_NoVLX, 509 GIFBS_HasWAITPKG_In64BitMode, 510 GIFBS_HasWAITPKG_Not64BitMode, 511 GIFBS_Not64BitMode_OptForSize, 512 GIFBS_NotWin64WithoutFP_OptForMinSize, 513 GIFBS_HasAES_HasAVX_NoVLX_Or_NoVAES, 514 GIFBS_HasAVX_HasPCLMUL_NoVLX_Or_NoVPCLMULQDQ, 515}; 516const static PredicateBitset FeatureBitsets[] { 517 {}, // GIFBS_Invalid 518 {Feature_FPStackf32Bit, }, 519 {Feature_FPStackf64Bit, }, 520 {Feature_Has3DNowBit, }, 521 {Feature_HasAVXBit, }, 522 {Feature_HasAVX1OnlyBit, }, 523 {Feature_HasAVX2Bit, }, 524 {Feature_HasAVX512Bit, }, 525 {Feature_HasBMIBit, }, 526 {Feature_HasBMI2Bit, }, 527 {Feature_HasBWIBit, }, 528 {Feature_HasDQIBit, }, 529 {Feature_HasLWPBit, }, 530 {Feature_HasMFenceBit, }, 531 {Feature_HasMMXBit, }, 532 {Feature_HasMOVBEBit, }, 533 {Feature_HasPTWRITEBit, }, 534 {Feature_HasRTMBit, }, 535 {Feature_HasSHABit, }, 536 {Feature_HasSSE1Bit, }, 537 {Feature_HasSSE2Bit, }, 538 {Feature_HasSSE42Bit, }, 539 {Feature_HasSSE4ABit, }, 540 {Feature_HasTBMBit, }, 541 {Feature_HasVLXBit, }, 542 {Feature_HasWAITPKGBit, }, 543 {Feature_HasWBNOINVDBit, }, 544 {Feature_HasXOPBit, }, 545 {Feature_In64BitModeBit, }, 546 {Feature_NoDQIBit, }, 547 {Feature_Not64BitModeBit, }, 548 {Feature_UseAVXBit, }, 549 {Feature_UseIncDecBit, }, 550 {Feature_UseSSE1Bit, }, 551 {Feature_UseSSE2Bit, }, 552 {Feature_UseSSE41Bit, }, 553 {Feature_UseSSSE3Bit, }, 554 {Feature_HasAESBit, Feature_HasAVXBit, }, 555 {Feature_HasAESBit, Feature_NoAVXBit, }, 556 {Feature_HasAVXBit, Feature_NoVLXBit, }, 557 {Feature_HasAVXBit, Feature_NoVLX_Or_NoBWIBit, }, 558 {Feature_HasAVX2Bit, Feature_NoVLXBit, }, 559 {Feature_HasAVX2Bit, Feature_NoVLX_Or_NoBWIBit, }, 560 {Feature_HasAVX512Bit, Feature_HasVAESBit, }, 561 {Feature_HasAVX512Bit, Feature_HasVLXBit, }, 562 {Feature_HasAVX512Bit, Feature_HasVPCLMULQDQBit, }, 563 {Feature_HasBWIBit, Feature_HasVLXBit, }, 564 {Feature_HasDQIBit, Feature_HasVLXBit, }, 565 {Feature_HasDQIBit, Feature_NoBWIBit, }, 566 {Feature_HasFSGSBaseBit, Feature_In64BitModeBit, }, 567 {Feature_HasPCLMULBit, Feature_NoAVXBit, }, 568 {Feature_HasPTWRITEBit, Feature_In64BitModeBit, }, 569 {Feature_HasRDPIDBit, Feature_Not64BitModeBit, }, 570 {Feature_HasSSE2Bit, Feature_NoAVX512Bit, }, 571 {Feature_HasVAESBit, Feature_HasVLXBit, }, 572 {Feature_HasVAESBit, Feature_NoVLXBit, }, 573 {Feature_HasVLXBit, Feature_HasVPCLMULQDQBit, }, 574 {Feature_HasVPCLMULQDQBit, Feature_NoVLXBit, }, 575 {Feature_HasWAITPKGBit, Feature_In64BitModeBit, }, 576 {Feature_HasWAITPKGBit, Feature_Not64BitModeBit, }, 577 {Feature_Not64BitModeBit, Feature_OptForSizeBit, }, 578 {Feature_NotWin64WithoutFPBit, Feature_OptForMinSizeBit, }, 579 {Feature_HasAESBit, Feature_HasAVXBit, Feature_NoVLX_Or_NoVAESBit, }, 580 {Feature_HasAVXBit, Feature_HasPCLMULBit, Feature_NoVLX_Or_NoVPCLMULQDQBit, }, 581}; 582 583// ComplexPattern predicates. 584enum { 585 GICP_Invalid, 586}; 587// See constructor for table contents 588 589// PatFrag predicates. 590enum { 591 GIPFP_I64_Predicate_AndMask64 = GIPFP_I64_Invalid + 1, 592 GIPFP_I64_Predicate_BTCBTSMask64, 593 GIPFP_I64_Predicate_BTRMask64, 594 GIPFP_I64_Predicate_PrefetchWT1Level, 595 GIPFP_I64_Predicate_i16immSExt8, 596 GIPFP_I64_Predicate_i32immSExt8, 597 GIPFP_I64_Predicate_i64immSExt32, 598 GIPFP_I64_Predicate_i64immSExt8, 599 GIPFP_I64_Predicate_i64immZExt32, 600 GIPFP_I64_Predicate_i64immZExt32SExt8, 601 GIPFP_I64_Predicate_immShift16, 602 GIPFP_I64_Predicate_immShift32, 603 GIPFP_I64_Predicate_immShift64, 604 GIPFP_I64_Predicate_immShift8, 605 GIPFP_I64_Predicate_immff00_ffff, 606}; 607bool X86InstructionSelector::testImmPredicate_I64(unsigned PredicateID, int64_t Imm) const { 608 switch (PredicateID) { 609 case GIPFP_I64_Predicate_AndMask64: { 610 611 return isMask_64(Imm) && !isUInt<32>(Imm); 612 613 llvm_unreachable("ImmediateCode should have returned"); 614 return false; 615 } 616 case GIPFP_I64_Predicate_BTCBTSMask64: { 617 618 return !isInt<32>(Imm) && isPowerOf2_64(Imm); 619 620 llvm_unreachable("ImmediateCode should have returned"); 621 return false; 622 } 623 case GIPFP_I64_Predicate_BTRMask64: { 624 625 return !isUInt<32>(Imm) && !isInt<32>(Imm) && isPowerOf2_64(~Imm); 626 627 llvm_unreachable("ImmediateCode should have returned"); 628 return false; 629 } 630 case GIPFP_I64_Predicate_PrefetchWT1Level: { 631 632 return Imm < 3; 633 634 llvm_unreachable("ImmediateCode should have returned"); 635 return false; 636 } 637 case GIPFP_I64_Predicate_i16immSExt8: { 638 return isInt<8>(Imm); 639 llvm_unreachable("ImmediateCode should have returned"); 640 return false; 641 } 642 case GIPFP_I64_Predicate_i32immSExt8: { 643 return isInt<8>(Imm); 644 llvm_unreachable("ImmediateCode should have returned"); 645 return false; 646 } 647 case GIPFP_I64_Predicate_i64immSExt32: { 648 return isInt<32>(Imm); 649 llvm_unreachable("ImmediateCode should have returned"); 650 return false; 651 } 652 case GIPFP_I64_Predicate_i64immSExt8: { 653 return isInt<8>(Imm); 654 llvm_unreachable("ImmediateCode should have returned"); 655 return false; 656 } 657 case GIPFP_I64_Predicate_i64immZExt32: { 658 return isUInt<32>(Imm); 659 llvm_unreachable("ImmediateCode should have returned"); 660 return false; 661 } 662 case GIPFP_I64_Predicate_i64immZExt32SExt8: { 663 664 return isUInt<32>(Imm) && isInt<8>(static_cast<int32_t>(Imm)); 665 666 llvm_unreachable("ImmediateCode should have returned"); 667 return false; 668 } 669 case GIPFP_I64_Predicate_immShift16: { 670 671 return countTrailingOnes<uint64_t>(Imm) >= 4; 672 673 llvm_unreachable("ImmediateCode should have returned"); 674 return false; 675 } 676 case GIPFP_I64_Predicate_immShift32: { 677 678 return countTrailingOnes<uint64_t>(Imm) >= 5; 679 680 llvm_unreachable("ImmediateCode should have returned"); 681 return false; 682 } 683 case GIPFP_I64_Predicate_immShift64: { 684 685 return countTrailingOnes<uint64_t>(Imm) >= 6; 686 687 llvm_unreachable("ImmediateCode should have returned"); 688 return false; 689 } 690 case GIPFP_I64_Predicate_immShift8: { 691 692 return countTrailingOnes<uint64_t>(Imm) >= 3; 693 694 llvm_unreachable("ImmediateCode should have returned"); 695 return false; 696 } 697 case GIPFP_I64_Predicate_immff00_ffff: { 698 699 return Imm >= 0xff00 && Imm <= 0xffff; 700 701 llvm_unreachable("ImmediateCode should have returned"); 702 return false; 703 } 704 } 705 llvm_unreachable("Unknown predicate"); 706 return false; 707} 708// PatFrag predicates. 709enum { 710 GIPFP_APFloat_Predicate_fpimm0 = GIPFP_APFloat_Invalid + 1, 711 GIPFP_APFloat_Predicate_fpimm1, 712 GIPFP_APFloat_Predicate_fpimmneg0, 713 GIPFP_APFloat_Predicate_fpimmneg1, 714}; 715bool X86InstructionSelector::testImmPredicate_APFloat(unsigned PredicateID, const APFloat & Imm) const { 716 switch (PredicateID) { 717 case GIPFP_APFloat_Predicate_fpimm0: { 718 719 return Imm.isExactlyValue(+0.0); 720 721 llvm_unreachable("ImmediateCode should have returned"); 722 return false; 723 } 724 case GIPFP_APFloat_Predicate_fpimm1: { 725 726 return Imm.isExactlyValue(+1.0); 727 728 llvm_unreachable("ImmediateCode should have returned"); 729 return false; 730 } 731 case GIPFP_APFloat_Predicate_fpimmneg0: { 732 733 return Imm.isExactlyValue(-0.0); 734 735 llvm_unreachable("ImmediateCode should have returned"); 736 return false; 737 } 738 case GIPFP_APFloat_Predicate_fpimmneg1: { 739 740 return Imm.isExactlyValue(-1.0); 741 742 llvm_unreachable("ImmediateCode should have returned"); 743 return false; 744 } 745 } 746 llvm_unreachable("Unknown predicate"); 747 return false; 748} 749bool X86InstructionSelector::testImmPredicate_APInt(unsigned PredicateID, const APInt & Imm) const { 750 llvm_unreachable("Unknown predicate"); 751 return false; 752} 753bool X86InstructionSelector::testMIPredicate_MI(unsigned PredicateID, const MachineInstr & MI) const { 754 const MachineFunction &MF = *MI.getParent()->getParent(); 755 const MachineRegisterInfo &MRI = MF.getRegInfo(); 756 (void)MRI; 757 llvm_unreachable("Unknown predicate"); 758 return false; 759} 760 761X86InstructionSelector::ComplexMatcherMemFn 762X86InstructionSelector::ComplexPredicateFns[] = { 763 nullptr, // GICP_Invalid 764}; 765 766// Custom renderers. 767enum { 768 GICR_Invalid, 769}; 770X86InstructionSelector::CustomRendererFn 771X86InstructionSelector::CustomRenderers[] = { 772 nullptr, // GICP_Invalid 773}; 774 775bool X86InstructionSelector::selectImpl(MachineInstr &I, CodeGenCoverage &CoverageInfo) const { 776 MachineFunction &MF = *I.getParent()->getParent(); 777 MachineRegisterInfo &MRI = MF.getRegInfo(); 778 // FIXME: This should be computed on a per-function basis rather than per-insn. 779 AvailableFunctionFeatures = computeAvailableFunctionFeatures(&STI, &MF); 780 const PredicateBitset AvailableFeatures = getAvailableFeatures(); 781 NewMIVector OutMIs; 782 State.MIs.clear(); 783 State.MIs.push_back(&I); 784 785 if (executeMatchTable(*this, OutMIs, State, ISelInfo, getMatchTable(), TII, MRI, TRI, RBI, AvailableFeatures, CoverageInfo)) { 786 return true; 787 } 788 789 return false; 790} 791 792const int64_t *X86InstructionSelector::getMatchTable() const { 793 constexpr static int64_t MatchTable0[] = { 794 GIM_SwitchOpcode, /*MI*/0, /*[*/34, 124, /*)*//*default:*//*Label 31*/ 32754, 795 /*TargetOpcode::G_ADD*//*Label 0*/ 95, 796 /*TargetOpcode::G_SUB*//*Label 1*/ 1712, 797 /*TargetOpcode::G_MUL*//*Label 2*/ 2793, 0, 0, 0, 0, 798 /*TargetOpcode::G_AND*//*Label 3*/ 3559, 799 /*TargetOpcode::G_OR*//*Label 4*/ 6671, 800 /*TargetOpcode::G_XOR*//*Label 5*/ 9342, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 801 /*TargetOpcode::G_BITCAST*//*Label 6*/ 11315, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 802 /*TargetOpcode::G_INTRINSIC*//*Label 7*/ 14608, 803 /*TargetOpcode::G_INTRINSIC_W_SIDE_EFFECTS*//*Label 8*/ 22151, 804 /*TargetOpcode::G_ANYEXT*//*Label 9*/ 23582, 805 /*TargetOpcode::G_TRUNC*//*Label 10*/ 23698, 806 /*TargetOpcode::G_CONSTANT*//*Label 11*/ 24033, 807 /*TargetOpcode::G_FCONSTANT*//*Label 12*/ 24236, 0, 0, 808 /*TargetOpcode::G_SEXT*//*Label 13*/ 24429, 809 /*TargetOpcode::G_ZEXT*//*Label 14*/ 24933, 810 /*TargetOpcode::G_SHL*//*Label 15*/ 25068, 811 /*TargetOpcode::G_LSHR*//*Label 16*/ 25793, 812 /*TargetOpcode::G_ASHR*//*Label 17*/ 26624, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 813 /*TargetOpcode::G_FADD*//*Label 18*/ 27281, 814 /*TargetOpcode::G_FSUB*//*Label 19*/ 27894, 815 /*TargetOpcode::G_FMUL*//*Label 20*/ 28507, 0, 816 /*TargetOpcode::G_FDIV*//*Label 21*/ 29120, 0, 0, 0, 0, 0, 0, 817 /*TargetOpcode::G_FNEG*//*Label 22*/ 29733, 818 /*TargetOpcode::G_FPEXT*//*Label 23*/ 29822, 819 /*TargetOpcode::G_FPTRUNC*//*Label 24*/ 30098, 820 /*TargetOpcode::G_FPTOSI*//*Label 25*/ 30383, 821 /*TargetOpcode::G_FPTOUI*//*Label 26*/ 31013, 822 /*TargetOpcode::G_SITOFP*//*Label 27*/ 31367, 823 /*TargetOpcode::G_UITOFP*//*Label 28*/ 32197, 0, 0, 0, 824 /*TargetOpcode::G_BR*//*Label 29*/ 32651, 0, 0, 0, 825 /*TargetOpcode::G_BSWAP*//*Label 30*/ 32664, 826 // Label 0: @95 827 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/1, 25, /*)*//*default:*//*Label 48*/ 1711, 828 /*GILLT_s8*//*Label 32*/ 125, 829 /*GILLT_s16*//*Label 33*/ 239, 830 /*GILLT_s32*//*Label 34*/ 411, 831 /*GILLT_s64*//*Label 35*/ 583, 0, 0, 0, 832 /*GILLT_v2s64*//*Label 36*/ 783, 0, 833 /*GILLT_v4s32*//*Label 37*/ 864, 834 /*GILLT_v4s64*//*Label 38*/ 1067, 0, 835 /*GILLT_v8s16*//*Label 39*/ 1125, 836 /*GILLT_v8s32*//*Label 40*/ 1328, 837 /*GILLT_v8s64*//*Label 41*/ 1386, 0, 838 /*GILLT_v16s8*//*Label 42*/ 1418, 839 /*GILLT_v16s16*//*Label 43*/ 1499, 840 /*GILLT_v16s32*//*Label 44*/ 1557, 0, 841 /*GILLT_v32s8*//*Label 45*/ 1589, 842 /*GILLT_v32s16*//*Label 46*/ 1647, 0, 843 /*GILLT_v64s8*//*Label 47*/ 1679, 844 // Label 32: @125 845 GIM_Try, /*On fail goto*//*Label 49*/ 238, 846 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s8, 847 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8, 848 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR8RegClassID, 849 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR8RegClassID, 850 GIM_Try, /*On fail goto*//*Label 50*/ 167, // Rule ID 16134 // 851 GIM_CheckFeatures, GIFBS_UseIncDec, 852 GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 1, 853 // (add:{ *:[i8] } GR8:{ *:[i8] }:$src, 1:{ *:[i8] }) => (INC8r:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src) 854 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::INC8r, 855 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 856 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 857 GIR_EraseFromParent, /*InsnID*/0, 858 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 859 // GIR_Coverage, 16134, 860 GIR_Done, 861 // Label 50: @167 862 GIM_Try, /*On fail goto*//*Label 51*/ 191, // Rule ID 16138 // 863 GIM_CheckFeatures, GIFBS_UseIncDec, 864 GIM_CheckConstantInt, /*MI*/0, /*Op*/2, -1, 865 // (add:{ *:[i8] } GR8:{ *:[i8] }:$src, -1:{ *:[i8] }) => (DEC8r:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src) 866 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::DEC8r, 867 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 868 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 869 GIR_EraseFromParent, /*InsnID*/0, 870 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 871 // GIR_Coverage, 16138, 872 GIR_Done, 873 // Label 51: @191 874 GIM_Try, /*On fail goto*//*Label 52*/ 221, // Rule ID 16088 // 875 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] 876 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, 877 // MIs[1] Operand 1 878 // No operand predicates 879 GIM_CheckIsSafeToFold, /*InsnID*/1, 880 // (add:{ *:[i8] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) => (ADD8ri:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) 881 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ADD8ri, 882 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 883 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 884 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 885 GIR_EraseFromParent, /*InsnID*/0, 886 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 887 // GIR_Coverage, 16088, 888 GIR_Done, 889 // Label 52: @221 890 GIM_Try, /*On fail goto*//*Label 53*/ 237, // Rule ID 16080 // 891 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR8RegClassID, 892 // (add:{ *:[i8] } GR8:{ *:[i8] }:$src1, GR8:{ *:[i8] }:$src2) => (ADD8rr:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, GR8:{ *:[i8] }:$src2) 893 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::ADD8rr, 894 GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS, 895 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 896 // GIR_Coverage, 16080, 897 GIR_Done, 898 // Label 53: @237 899 GIM_Reject, 900 // Label 49: @238 901 GIM_Reject, 902 // Label 33: @239 903 GIM_Try, /*On fail goto*//*Label 54*/ 410, 904 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16, 905 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16, 906 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR16RegClassID, 907 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID, 908 GIM_Try, /*On fail goto*//*Label 55*/ 282, // Rule ID 15946 // 909 GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 128, 910 // (add:{ *:[i16] } GR16:{ *:[i16] }:$src1, 128:{ *:[i16] }) => (SUB16ri8:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, -128:{ *:[i16] }) 911 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SUB16ri8, 912 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 913 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 914 GIR_AddImm, /*InsnID*/0, /*Imm*/-128, 915 GIR_EraseFromParent, /*InsnID*/0, 916 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 917 // GIR_Coverage, 15946, 918 GIR_Done, 919 // Label 55: @282 920 GIM_Try, /*On fail goto*//*Label 56*/ 306, // Rule ID 16135 // 921 GIM_CheckFeatures, GIFBS_UseIncDec, 922 GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 1, 923 // (add:{ *:[i16] } GR16:{ *:[i16] }:$src, 1:{ *:[i16] }) => (INC16r:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src) 924 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::INC16r, 925 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 926 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 927 GIR_EraseFromParent, /*InsnID*/0, 928 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 929 // GIR_Coverage, 16135, 930 GIR_Done, 931 // Label 56: @306 932 GIM_Try, /*On fail goto*//*Label 57*/ 330, // Rule ID 16139 // 933 GIM_CheckFeatures, GIFBS_UseIncDec, 934 GIM_CheckConstantInt, /*MI*/0, /*Op*/2, -1, 935 // (add:{ *:[i16] } GR16:{ *:[i16] }:$src, -1:{ *:[i16] }) => (DEC16r:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src) 936 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::DEC16r, 937 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 938 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 939 GIR_EraseFromParent, /*InsnID*/0, 940 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 941 // GIR_Coverage, 16139, 942 GIR_Done, 943 // Label 57: @330 944 GIM_Try, /*On fail goto*//*Label 58*/ 363, // Rule ID 16091 // 945 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] 946 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, 947 GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i16immSExt8, 948 // MIs[1] Operand 1 949 // No operand predicates 950 GIM_CheckIsSafeToFold, /*InsnID*/1, 951 // (add:{ *:[i16] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] })<<P:Predicate_i16immSExt8>>:$src2) => (ADD16ri8:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] })<<P:Predicate_i16immSExt8>>:$src2) 952 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ADD16ri8, 953 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 954 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 955 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 956 GIR_EraseFromParent, /*InsnID*/0, 957 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 958 // GIR_Coverage, 16091, 959 GIR_Done, 960 // Label 58: @363 961 GIM_Try, /*On fail goto*//*Label 59*/ 393, // Rule ID 16089 // 962 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] 963 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, 964 // MIs[1] Operand 1 965 // No operand predicates 966 GIM_CheckIsSafeToFold, /*InsnID*/1, 967 // (add:{ *:[i16] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] }):$src2) => (ADD16ri:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] }):$src2) 968 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ADD16ri, 969 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 970 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 971 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 972 GIR_EraseFromParent, /*InsnID*/0, 973 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 974 // GIR_Coverage, 16089, 975 GIR_Done, 976 // Label 59: @393 977 GIM_Try, /*On fail goto*//*Label 60*/ 409, // Rule ID 16081 // 978 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR16RegClassID, 979 // (add:{ *:[i16] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2) => (ADD16rr:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2) 980 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::ADD16rr, 981 GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS, 982 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 983 // GIR_Coverage, 16081, 984 GIR_Done, 985 // Label 60: @409 986 GIM_Reject, 987 // Label 54: @410 988 GIM_Reject, 989 // Label 34: @411 990 GIM_Try, /*On fail goto*//*Label 61*/ 582, 991 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, 992 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, 993 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, 994 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, 995 GIM_Try, /*On fail goto*//*Label 62*/ 454, // Rule ID 15948 // 996 GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 128, 997 // (add:{ *:[i32] } GR32:{ *:[i32] }:$src1, 128:{ *:[i32] }) => (SUB32ri8:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, -128:{ *:[i32] }) 998 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SUB32ri8, 999 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 1000 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 1001 GIR_AddImm, /*InsnID*/0, /*Imm*/-128, 1002 GIR_EraseFromParent, /*InsnID*/0, 1003 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 1004 // GIR_Coverage, 15948, 1005 GIR_Done, 1006 // Label 62: @454 1007 GIM_Try, /*On fail goto*//*Label 63*/ 478, // Rule ID 16136 // 1008 GIM_CheckFeatures, GIFBS_UseIncDec, 1009 GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 1, 1010 // (add:{ *:[i32] } GR32:{ *:[i32] }:$src, 1:{ *:[i32] }) => (INC32r:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) 1011 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::INC32r, 1012 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 1013 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 1014 GIR_EraseFromParent, /*InsnID*/0, 1015 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 1016 // GIR_Coverage, 16136, 1017 GIR_Done, 1018 // Label 63: @478 1019 GIM_Try, /*On fail goto*//*Label 64*/ 502, // Rule ID 16140 // 1020 GIM_CheckFeatures, GIFBS_UseIncDec, 1021 GIM_CheckConstantInt, /*MI*/0, /*Op*/2, -1, 1022 // (add:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] }) => (DEC32r:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) 1023 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::DEC32r, 1024 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 1025 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 1026 GIR_EraseFromParent, /*InsnID*/0, 1027 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 1028 // GIR_Coverage, 16140, 1029 GIR_Done, 1030 // Label 64: @502 1031 GIM_Try, /*On fail goto*//*Label 65*/ 535, // Rule ID 16092 // 1032 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] 1033 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, 1034 GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i32immSExt8, 1035 // MIs[1] Operand 1 1036 // No operand predicates 1037 GIM_CheckIsSafeToFold, /*InsnID*/1, 1038 // (add:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] })<<P:Predicate_i32immSExt8>>:$src2) => (ADD32ri8:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] })<<P:Predicate_i32immSExt8>>:$src2) 1039 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ADD32ri8, 1040 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 1041 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 1042 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 1043 GIR_EraseFromParent, /*InsnID*/0, 1044 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 1045 // GIR_Coverage, 16092, 1046 GIR_Done, 1047 // Label 65: @535 1048 GIM_Try, /*On fail goto*//*Label 66*/ 565, // Rule ID 16090 // 1049 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] 1050 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, 1051 // MIs[1] Operand 1 1052 // No operand predicates 1053 GIM_CheckIsSafeToFold, /*InsnID*/1, 1054 // (add:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$src2) => (ADD32ri:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$src2) 1055 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ADD32ri, 1056 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 1057 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 1058 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 1059 GIR_EraseFromParent, /*InsnID*/0, 1060 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 1061 // GIR_Coverage, 16090, 1062 GIR_Done, 1063 // Label 66: @565 1064 GIM_Try, /*On fail goto*//*Label 67*/ 581, // Rule ID 16082 // 1065 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR32RegClassID, 1066 // (add:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) => (ADD32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) 1067 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::ADD32rr, 1068 GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS, 1069 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 1070 // GIR_Coverage, 16082, 1071 GIR_Done, 1072 // Label 67: @581 1073 GIM_Reject, 1074 // Label 61: @582 1075 GIM_Reject, 1076 // Label 35: @583 1077 GIM_Try, /*On fail goto*//*Label 68*/ 782, 1078 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, 1079 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, 1080 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, 1081 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, 1082 GIM_Try, /*On fail goto*//*Label 69*/ 626, // Rule ID 15950 // 1083 GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 128, 1084 // (add:{ *:[i64] } GR64:{ *:[i64] }:$src1, 128:{ *:[i64] }) => (SUB64ri8:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, -128:{ *:[i64] }) 1085 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SUB64ri8, 1086 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 1087 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 1088 GIR_AddImm, /*InsnID*/0, /*Imm*/-128, 1089 GIR_EraseFromParent, /*InsnID*/0, 1090 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 1091 // GIR_Coverage, 15950, 1092 GIR_Done, 1093 // Label 69: @626 1094 GIM_Try, /*On fail goto*//*Label 70*/ 651, // Rule ID 15952 // 1095 GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 2147483648, 1096 // (add:{ *:[i64] } GR64:{ *:[i64] }:$src1, 2147483648:{ *:[i64] }) => (SUB64ri32:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, -2147483648:{ *:[i64] }) 1097 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SUB64ri32, 1098 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 1099 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 1100 GIR_AddImm, /*InsnID*/0, /*Imm*/-2147483648, 1101 GIR_EraseFromParent, /*InsnID*/0, 1102 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 1103 // GIR_Coverage, 15952, 1104 GIR_Done, 1105 // Label 70: @651 1106 GIM_Try, /*On fail goto*//*Label 71*/ 675, // Rule ID 16137 // 1107 GIM_CheckFeatures, GIFBS_UseIncDec, 1108 GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 1, 1109 // (add:{ *:[i64] } GR64:{ *:[i64] }:$src, 1:{ *:[i64] }) => (INC64r:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) 1110 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::INC64r, 1111 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 1112 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 1113 GIR_EraseFromParent, /*InsnID*/0, 1114 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 1115 // GIR_Coverage, 16137, 1116 GIR_Done, 1117 // Label 71: @675 1118 GIM_Try, /*On fail goto*//*Label 72*/ 699, // Rule ID 16141 // 1119 GIM_CheckFeatures, GIFBS_UseIncDec, 1120 GIM_CheckConstantInt, /*MI*/0, /*Op*/2, -1, 1121 // (add:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] }) => (DEC64r:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) 1122 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::DEC64r, 1123 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 1124 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 1125 GIR_EraseFromParent, /*InsnID*/0, 1126 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 1127 // GIR_Coverage, 16141, 1128 GIR_Done, 1129 // Label 72: @699 1130 GIM_Try, /*On fail goto*//*Label 73*/ 732, // Rule ID 16093 // 1131 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] 1132 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, 1133 GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i64immSExt8, 1134 // MIs[1] Operand 1 1135 // No operand predicates 1136 GIM_CheckIsSafeToFold, /*InsnID*/1, 1137 // (add:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt8>>:$src2) => (ADD64ri8:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt8>>:$src2) 1138 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ADD64ri8, 1139 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 1140 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 1141 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 1142 GIR_EraseFromParent, /*InsnID*/0, 1143 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 1144 // GIR_Coverage, 16093, 1145 GIR_Done, 1146 // Label 73: @732 1147 GIM_Try, /*On fail goto*//*Label 74*/ 765, // Rule ID 16094 // 1148 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] 1149 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, 1150 GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i64immSExt32, 1151 // MIs[1] Operand 1 1152 // No operand predicates 1153 GIM_CheckIsSafeToFold, /*InsnID*/1, 1154 // (add:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt32>>:$src2) => (ADD64ri32:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt32>>:$src2) 1155 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ADD64ri32, 1156 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 1157 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 1158 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 1159 GIR_EraseFromParent, /*InsnID*/0, 1160 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 1161 // GIR_Coverage, 16094, 1162 GIR_Done, 1163 // Label 74: @765 1164 GIM_Try, /*On fail goto*//*Label 75*/ 781, // Rule ID 16083 // 1165 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR64RegClassID, 1166 // (add:{ *:[i64] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) => (ADD64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) 1167 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::ADD64rr, 1168 GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS, 1169 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 1170 // GIR_Coverage, 16083, 1171 GIR_Done, 1172 // Label 75: @781 1173 GIM_Reject, 1174 // Label 68: @782 1175 GIM_Reject, 1176 // Label 36: @783 1177 GIM_Try, /*On fail goto*//*Label 76*/ 863, 1178 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64, 1179 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, 1180 GIM_Try, /*On fail goto*//*Label 77*/ 816, // Rule ID 1823 // 1181 GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, 1182 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 1183 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, 1184 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 1185 // (add:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (VPADDQrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) 1186 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDQrr, 1187 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 1188 // GIR_Coverage, 1823, 1189 GIR_Done, 1190 // Label 77: @816 1191 GIM_Try, /*On fail goto*//*Label 78*/ 839, // Rule ID 1825 // 1192 GIM_CheckFeatures, GIFBS_UseSSE2, 1193 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 1194 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, 1195 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 1196 // (add:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (PADDQrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) 1197 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PADDQrr, 1198 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 1199 // GIR_Coverage, 1825, 1200 GIR_Done, 1201 // Label 78: @839 1202 GIM_Try, /*On fail goto*//*Label 79*/ 862, // Rule ID 3837 // 1203 GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, 1204 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, 1205 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, 1206 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, 1207 // (add:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (VPADDQZ128rr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) 1208 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDQZ128rr, 1209 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 1210 // GIR_Coverage, 3837, 1211 GIR_Done, 1212 // Label 79: @862 1213 GIM_Reject, 1214 // Label 76: @863 1215 GIM_Reject, 1216 // Label 37: @864 1217 GIM_Try, /*On fail goto*//*Label 80*/ 1066, 1218 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, 1219 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, 1220 GIM_Try, /*On fail goto*//*Label 81*/ 935, // Rule ID 12398 // 1221 GIM_CheckFeatures, GIFBS_HasXOP, 1222 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 1223 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] 1224 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL, 1225 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s32, 1226 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32, 1227 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::VR128RegClassID, 1228 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/X86::VR128RegClassID, 1229 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 1230 GIM_CheckIsSafeToFold, /*InsnID*/1, 1231 // (add:{ *:[v4i32] } (mul:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2), VR128:{ *:[v4i32] }:$src3) => (VPMACSDDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v4i32] }:$src3) 1232 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMACSDDrr, 1233 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 1234 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1 1235 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src2 1236 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src3 1237 GIR_EraseFromParent, /*InsnID*/0, 1238 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 1239 // GIR_Coverage, 12398, 1240 GIR_Done, 1241 // Label 81: @935 1242 GIM_Try, /*On fail goto*//*Label 82*/ 996, // Rule ID 18283 // 1243 GIM_CheckFeatures, GIFBS_HasXOP, 1244 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 1245 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, 1246 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] 1247 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL, 1248 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s32, 1249 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32, 1250 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::VR128RegClassID, 1251 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/X86::VR128RegClassID, 1252 GIM_CheckIsSafeToFold, /*InsnID*/1, 1253 // (add:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src3, (mul:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2)) => (VPMACSDDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v4i32] }:$src3) 1254 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMACSDDrr, 1255 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 1256 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1 1257 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src2 1258 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src3 1259 GIR_EraseFromParent, /*InsnID*/0, 1260 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 1261 // GIR_Coverage, 18283, 1262 GIR_Done, 1263 // Label 82: @996 1264 GIM_Try, /*On fail goto*//*Label 83*/ 1019, // Rule ID 1817 // 1265 GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, 1266 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 1267 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, 1268 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 1269 // (add:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (VPADDDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) 1270 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDDrr, 1271 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 1272 // GIR_Coverage, 1817, 1273 GIR_Done, 1274 // Label 83: @1019 1275 GIM_Try, /*On fail goto*//*Label 84*/ 1042, // Rule ID 1819 // 1276 GIM_CheckFeatures, GIFBS_UseSSE2, 1277 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 1278 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, 1279 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 1280 // (add:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (PADDDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) 1281 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PADDDrr, 1282 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 1283 // GIR_Coverage, 1819, 1284 GIR_Done, 1285 // Label 84: @1042 1286 GIM_Try, /*On fail goto*//*Label 85*/ 1065, // Rule ID 3864 // 1287 GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, 1288 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, 1289 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, 1290 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, 1291 // (add:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2) => (VPADDDZ128rr:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2) 1292 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDDZ128rr, 1293 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 1294 // GIR_Coverage, 3864, 1295 GIR_Done, 1296 // Label 85: @1065 1297 GIM_Reject, 1298 // Label 80: @1066 1299 GIM_Reject, 1300 // Label 38: @1067 1301 GIM_Try, /*On fail goto*//*Label 86*/ 1124, 1302 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64, 1303 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64, 1304 GIM_Try, /*On fail goto*//*Label 87*/ 1100, // Rule ID 1827 // 1305 GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX, 1306 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, 1307 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, 1308 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, 1309 // (add:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) => (VPADDQYrr:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) 1310 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDQYrr, 1311 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 1312 // GIR_Coverage, 1827, 1313 GIR_Done, 1314 // Label 87: @1100 1315 GIM_Try, /*On fail goto*//*Label 88*/ 1123, // Rule ID 3828 // 1316 GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, 1317 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, 1318 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, 1319 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, 1320 // (add:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) => (VPADDQZ256rr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) 1321 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDQZ256rr, 1322 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 1323 // GIR_Coverage, 3828, 1324 GIR_Done, 1325 // Label 88: @1123 1326 GIM_Reject, 1327 // Label 86: @1124 1328 GIM_Reject, 1329 // Label 39: @1125 1330 GIM_Try, /*On fail goto*//*Label 89*/ 1327, 1331 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16, 1332 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16, 1333 GIM_Try, /*On fail goto*//*Label 90*/ 1196, // Rule ID 12397 // 1334 GIM_CheckFeatures, GIFBS_HasXOP, 1335 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 1336 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] 1337 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL, 1338 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s16, 1339 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16, 1340 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::VR128RegClassID, 1341 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/X86::VR128RegClassID, 1342 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 1343 GIM_CheckIsSafeToFold, /*InsnID*/1, 1344 // (add:{ *:[v8i16] } (mul:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2), VR128:{ *:[v8i16] }:$src3) => (VPMACSWWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2, VR128:{ *:[v8i16] }:$src3) 1345 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMACSWWrr, 1346 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 1347 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1 1348 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src2 1349 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src3 1350 GIR_EraseFromParent, /*InsnID*/0, 1351 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 1352 // GIR_Coverage, 12397, 1353 GIR_Done, 1354 // Label 90: @1196 1355 GIM_Try, /*On fail goto*//*Label 91*/ 1257, // Rule ID 18282 // 1356 GIM_CheckFeatures, GIFBS_HasXOP, 1357 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 1358 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, 1359 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] 1360 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL, 1361 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s16, 1362 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16, 1363 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::VR128RegClassID, 1364 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/X86::VR128RegClassID, 1365 GIM_CheckIsSafeToFold, /*InsnID*/1, 1366 // (add:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src3, (mul:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2)) => (VPMACSWWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2, VR128:{ *:[v8i16] }:$src3) 1367 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMACSWWrr, 1368 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 1369 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1 1370 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src2 1371 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src3 1372 GIR_EraseFromParent, /*InsnID*/0, 1373 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 1374 // GIR_Coverage, 18282, 1375 GIR_Done, 1376 // Label 91: @1257 1377 GIM_Try, /*On fail goto*//*Label 92*/ 1280, // Rule ID 1811 // 1378 GIM_CheckFeatures, GIFBS_HasAVX_NoVLX_Or_NoBWI, 1379 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 1380 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, 1381 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 1382 // (add:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (VPADDWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) 1383 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDWrr, 1384 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 1385 // GIR_Coverage, 1811, 1386 GIR_Done, 1387 // Label 92: @1280 1388 GIM_Try, /*On fail goto*//*Label 93*/ 1303, // Rule ID 1813 // 1389 GIM_CheckFeatures, GIFBS_UseSSE2, 1390 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 1391 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, 1392 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 1393 // (add:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (PADDWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) 1394 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PADDWrr, 1395 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 1396 // GIR_Coverage, 1813, 1397 GIR_Done, 1398 // Label 93: @1303 1399 GIM_Try, /*On fail goto*//*Label 94*/ 1326, // Rule ID 3885 // 1400 GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, 1401 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, 1402 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, 1403 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, 1404 // (add:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) => (VPADDWZ128rr:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) 1405 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDWZ128rr, 1406 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 1407 // GIR_Coverage, 3885, 1408 GIR_Done, 1409 // Label 94: @1326 1410 GIM_Reject, 1411 // Label 89: @1327 1412 GIM_Reject, 1413 // Label 40: @1328 1414 GIM_Try, /*On fail goto*//*Label 95*/ 1385, 1415 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32, 1416 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s32, 1417 GIM_Try, /*On fail goto*//*Label 96*/ 1361, // Rule ID 1821 // 1418 GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX, 1419 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, 1420 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, 1421 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, 1422 // (add:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) => (VPADDDYrr:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) 1423 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDDYrr, 1424 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 1425 // GIR_Coverage, 1821, 1426 GIR_Done, 1427 // Label 96: @1361 1428 GIM_Try, /*On fail goto*//*Label 97*/ 1384, // Rule ID 3855 // 1429 GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, 1430 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, 1431 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, 1432 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, 1433 // (add:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2) => (VPADDDZ256rr:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2) 1434 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDDZ256rr, 1435 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 1436 // GIR_Coverage, 3855, 1437 GIR_Done, 1438 // Label 97: @1384 1439 GIM_Reject, 1440 // Label 95: @1385 1441 GIM_Reject, 1442 // Label 41: @1386 1443 GIM_Try, /*On fail goto*//*Label 98*/ 1417, // Rule ID 3819 // 1444 GIM_CheckFeatures, GIFBS_HasAVX512, 1445 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64, 1446 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s64, 1447 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, 1448 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, 1449 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, 1450 // (add:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) => (VPADDQZrr:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) 1451 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDQZrr, 1452 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 1453 // GIR_Coverage, 3819, 1454 GIR_Done, 1455 // Label 98: @1417 1456 GIM_Reject, 1457 // Label 42: @1418 1458 GIM_Try, /*On fail goto*//*Label 99*/ 1498, 1459 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8, 1460 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8, 1461 GIM_Try, /*On fail goto*//*Label 100*/ 1451, // Rule ID 1805 // 1462 GIM_CheckFeatures, GIFBS_HasAVX_NoVLX_Or_NoBWI, 1463 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 1464 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, 1465 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 1466 // (add:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (VPADDBrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) 1467 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDBrr, 1468 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 1469 // GIR_Coverage, 1805, 1470 GIR_Done, 1471 // Label 100: @1451 1472 GIM_Try, /*On fail goto*//*Label 101*/ 1474, // Rule ID 1807 // 1473 GIM_CheckFeatures, GIFBS_UseSSE2, 1474 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 1475 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, 1476 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 1477 // (add:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (PADDBrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) 1478 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PADDBrr, 1479 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 1480 // GIR_Coverage, 1807, 1481 GIR_Done, 1482 // Label 101: @1474 1483 GIM_Try, /*On fail goto*//*Label 102*/ 1497, // Rule ID 3903 // 1484 GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, 1485 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, 1486 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, 1487 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, 1488 // (add:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1, VR128X:{ *:[v16i8] }:$src2) => (VPADDBZ128rr:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1, VR128X:{ *:[v16i8] }:$src2) 1489 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDBZ128rr, 1490 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 1491 // GIR_Coverage, 3903, 1492 GIR_Done, 1493 // Label 102: @1497 1494 GIM_Reject, 1495 // Label 99: @1498 1496 GIM_Reject, 1497 // Label 43: @1499 1498 GIM_Try, /*On fail goto*//*Label 103*/ 1556, 1499 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s16, 1500 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s16, 1501 GIM_Try, /*On fail goto*//*Label 104*/ 1532, // Rule ID 1815 // 1502 GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX_Or_NoBWI, 1503 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, 1504 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, 1505 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, 1506 // (add:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) => (VPADDWYrr:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) 1507 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDWYrr, 1508 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 1509 // GIR_Coverage, 1815, 1510 GIR_Done, 1511 // Label 104: @1532 1512 GIM_Try, /*On fail goto*//*Label 105*/ 1555, // Rule ID 3879 // 1513 GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, 1514 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, 1515 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, 1516 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, 1517 // (add:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) => (VPADDWZ256rr:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) 1518 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDWZ256rr, 1519 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 1520 // GIR_Coverage, 3879, 1521 GIR_Done, 1522 // Label 105: @1555 1523 GIM_Reject, 1524 // Label 103: @1556 1525 GIM_Reject, 1526 // Label 44: @1557 1527 GIM_Try, /*On fail goto*//*Label 106*/ 1588, // Rule ID 3846 // 1528 GIM_CheckFeatures, GIFBS_HasAVX512, 1529 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32, 1530 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s32, 1531 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, 1532 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, 1533 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, 1534 // (add:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2) => (VPADDDZrr:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2) 1535 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDDZrr, 1536 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 1537 // GIR_Coverage, 3846, 1538 GIR_Done, 1539 // Label 106: @1588 1540 GIM_Reject, 1541 // Label 45: @1589 1542 GIM_Try, /*On fail goto*//*Label 107*/ 1646, 1543 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s8, 1544 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s8, 1545 GIM_Try, /*On fail goto*//*Label 108*/ 1622, // Rule ID 1809 // 1546 GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX_Or_NoBWI, 1547 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, 1548 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, 1549 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, 1550 // (add:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) => (VPADDBYrr:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) 1551 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDBYrr, 1552 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 1553 // GIR_Coverage, 1809, 1554 GIR_Done, 1555 // Label 108: @1622 1556 GIM_Try, /*On fail goto*//*Label 109*/ 1645, // Rule ID 3897 // 1557 GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, 1558 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, 1559 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, 1560 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, 1561 // (add:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1, VR256X:{ *:[v32i8] }:$src2) => (VPADDBZ256rr:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1, VR256X:{ *:[v32i8] }:$src2) 1562 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDBZ256rr, 1563 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 1564 // GIR_Coverage, 3897, 1565 GIR_Done, 1566 // Label 109: @1645 1567 GIM_Reject, 1568 // Label 107: @1646 1569 GIM_Reject, 1570 // Label 46: @1647 1571 GIM_Try, /*On fail goto*//*Label 110*/ 1678, // Rule ID 3873 // 1572 GIM_CheckFeatures, GIFBS_HasBWI, 1573 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s16, 1574 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s16, 1575 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, 1576 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, 1577 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, 1578 // (add:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) => (VPADDWZrr:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) 1579 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDWZrr, 1580 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 1581 // GIR_Coverage, 3873, 1582 GIR_Done, 1583 // Label 110: @1678 1584 GIM_Reject, 1585 // Label 47: @1679 1586 GIM_Try, /*On fail goto*//*Label 111*/ 1710, // Rule ID 3891 // 1587 GIM_CheckFeatures, GIFBS_HasBWI, 1588 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v64s8, 1589 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v64s8, 1590 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, 1591 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, 1592 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, 1593 // (add:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1, VR512:{ *:[v64i8] }:$src2) => (VPADDBZrr:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1, VR512:{ *:[v64i8] }:$src2) 1594 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDBZrr, 1595 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 1596 // GIR_Coverage, 3891, 1597 GIR_Done, 1598 // Label 111: @1710 1599 GIM_Reject, 1600 // Label 48: @1711 1601 GIM_Reject, 1602 // Label 1: @1712 1603 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/1, 25, /*)*//*default:*//*Label 128*/ 2792, 1604 /*GILLT_s8*//*Label 112*/ 1742, 1605 /*GILLT_s16*//*Label 113*/ 1808, 1606 /*GILLT_s32*//*Label 114*/ 1907, 1607 /*GILLT_s64*//*Label 115*/ 2006, 0, 0, 0, 1608 /*GILLT_v2s64*//*Label 116*/ 2108, 0, 1609 /*GILLT_v4s32*//*Label 117*/ 2189, 1610 /*GILLT_v4s64*//*Label 118*/ 2270, 0, 1611 /*GILLT_v8s16*//*Label 119*/ 2328, 1612 /*GILLT_v8s32*//*Label 120*/ 2409, 1613 /*GILLT_v8s64*//*Label 121*/ 2467, 0, 1614 /*GILLT_v16s8*//*Label 122*/ 2499, 1615 /*GILLT_v16s16*//*Label 123*/ 2580, 1616 /*GILLT_v16s32*//*Label 124*/ 2638, 0, 1617 /*GILLT_v32s8*//*Label 125*/ 2670, 1618 /*GILLT_v32s16*//*Label 126*/ 2728, 0, 1619 /*GILLT_v64s8*//*Label 127*/ 2760, 1620 // Label 112: @1742 1621 GIM_Try, /*On fail goto*//*Label 129*/ 1807, 1622 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s8, 1623 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8, 1624 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR8RegClassID, 1625 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR8RegClassID, 1626 GIM_Try, /*On fail goto*//*Label 130*/ 1790, // Rule ID 16103 // 1627 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] 1628 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, 1629 // MIs[1] Operand 1 1630 // No operand predicates 1631 GIM_CheckIsSafeToFold, /*InsnID*/1, 1632 // (sub:{ *:[i8] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) => (SUB8ri:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) 1633 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SUB8ri, 1634 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 1635 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 1636 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 1637 GIR_EraseFromParent, /*InsnID*/0, 1638 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 1639 // GIR_Coverage, 16103, 1640 GIR_Done, 1641 // Label 130: @1790 1642 GIM_Try, /*On fail goto*//*Label 131*/ 1806, // Rule ID 16095 // 1643 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR8RegClassID, 1644 // (sub:{ *:[i8] } GR8:{ *:[i8] }:$src1, GR8:{ *:[i8] }:$src2) => (SUB8rr:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, GR8:{ *:[i8] }:$src2) 1645 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::SUB8rr, 1646 GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS, 1647 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 1648 // GIR_Coverage, 16095, 1649 GIR_Done, 1650 // Label 131: @1806 1651 GIM_Reject, 1652 // Label 129: @1807 1653 GIM_Reject, 1654 // Label 113: @1808 1655 GIM_Try, /*On fail goto*//*Label 132*/ 1906, 1656 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16, 1657 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16, 1658 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR16RegClassID, 1659 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID, 1660 GIM_Try, /*On fail goto*//*Label 133*/ 1859, // Rule ID 16106 // 1661 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] 1662 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, 1663 GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i16immSExt8, 1664 // MIs[1] Operand 1 1665 // No operand predicates 1666 GIM_CheckIsSafeToFold, /*InsnID*/1, 1667 // (sub:{ *:[i16] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] })<<P:Predicate_i16immSExt8>>:$src2) => (SUB16ri8:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] })<<P:Predicate_i16immSExt8>>:$src2) 1668 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SUB16ri8, 1669 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 1670 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 1671 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 1672 GIR_EraseFromParent, /*InsnID*/0, 1673 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 1674 // GIR_Coverage, 16106, 1675 GIR_Done, 1676 // Label 133: @1859 1677 GIM_Try, /*On fail goto*//*Label 134*/ 1889, // Rule ID 16104 // 1678 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] 1679 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, 1680 // MIs[1] Operand 1 1681 // No operand predicates 1682 GIM_CheckIsSafeToFold, /*InsnID*/1, 1683 // (sub:{ *:[i16] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] }):$src2) => (SUB16ri:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] }):$src2) 1684 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SUB16ri, 1685 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 1686 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 1687 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 1688 GIR_EraseFromParent, /*InsnID*/0, 1689 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 1690 // GIR_Coverage, 16104, 1691 GIR_Done, 1692 // Label 134: @1889 1693 GIM_Try, /*On fail goto*//*Label 135*/ 1905, // Rule ID 16096 // 1694 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR16RegClassID, 1695 // (sub:{ *:[i16] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2) => (SUB16rr:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2) 1696 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::SUB16rr, 1697 GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS, 1698 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 1699 // GIR_Coverage, 16096, 1700 GIR_Done, 1701 // Label 135: @1905 1702 GIM_Reject, 1703 // Label 132: @1906 1704 GIM_Reject, 1705 // Label 114: @1907 1706 GIM_Try, /*On fail goto*//*Label 136*/ 2005, 1707 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, 1708 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, 1709 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, 1710 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, 1711 GIM_Try, /*On fail goto*//*Label 137*/ 1958, // Rule ID 16107 // 1712 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] 1713 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, 1714 GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i32immSExt8, 1715 // MIs[1] Operand 1 1716 // No operand predicates 1717 GIM_CheckIsSafeToFold, /*InsnID*/1, 1718 // (sub:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] })<<P:Predicate_i32immSExt8>>:$src2) => (SUB32ri8:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] })<<P:Predicate_i32immSExt8>>:$src2) 1719 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SUB32ri8, 1720 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 1721 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 1722 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 1723 GIR_EraseFromParent, /*InsnID*/0, 1724 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 1725 // GIR_Coverage, 16107, 1726 GIR_Done, 1727 // Label 137: @1958 1728 GIM_Try, /*On fail goto*//*Label 138*/ 1988, // Rule ID 16105 // 1729 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] 1730 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, 1731 // MIs[1] Operand 1 1732 // No operand predicates 1733 GIM_CheckIsSafeToFold, /*InsnID*/1, 1734 // (sub:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$src2) => (SUB32ri:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$src2) 1735 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SUB32ri, 1736 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 1737 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 1738 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 1739 GIR_EraseFromParent, /*InsnID*/0, 1740 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 1741 // GIR_Coverage, 16105, 1742 GIR_Done, 1743 // Label 138: @1988 1744 GIM_Try, /*On fail goto*//*Label 139*/ 2004, // Rule ID 16097 // 1745 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR32RegClassID, 1746 // (sub:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) => (SUB32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) 1747 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::SUB32rr, 1748 GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS, 1749 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 1750 // GIR_Coverage, 16097, 1751 GIR_Done, 1752 // Label 139: @2004 1753 GIM_Reject, 1754 // Label 136: @2005 1755 GIM_Reject, 1756 // Label 115: @2006 1757 GIM_Try, /*On fail goto*//*Label 140*/ 2107, 1758 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, 1759 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, 1760 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, 1761 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, 1762 GIM_Try, /*On fail goto*//*Label 141*/ 2057, // Rule ID 16108 // 1763 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] 1764 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, 1765 GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i64immSExt8, 1766 // MIs[1] Operand 1 1767 // No operand predicates 1768 GIM_CheckIsSafeToFold, /*InsnID*/1, 1769 // (sub:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt8>>:$src2) => (SUB64ri8:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt8>>:$src2) 1770 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SUB64ri8, 1771 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 1772 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 1773 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 1774 GIR_EraseFromParent, /*InsnID*/0, 1775 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 1776 // GIR_Coverage, 16108, 1777 GIR_Done, 1778 // Label 141: @2057 1779 GIM_Try, /*On fail goto*//*Label 142*/ 2090, // Rule ID 16109 // 1780 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] 1781 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, 1782 GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i64immSExt32, 1783 // MIs[1] Operand 1 1784 // No operand predicates 1785 GIM_CheckIsSafeToFold, /*InsnID*/1, 1786 // (sub:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt32>>:$src2) => (SUB64ri32:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt32>>:$src2) 1787 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SUB64ri32, 1788 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 1789 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 1790 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 1791 GIR_EraseFromParent, /*InsnID*/0, 1792 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 1793 // GIR_Coverage, 16109, 1794 GIR_Done, 1795 // Label 142: @2090 1796 GIM_Try, /*On fail goto*//*Label 143*/ 2106, // Rule ID 16098 // 1797 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR64RegClassID, 1798 // (sub:{ *:[i64] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) => (SUB64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) 1799 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::SUB64rr, 1800 GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS, 1801 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 1802 // GIR_Coverage, 16098, 1803 GIR_Done, 1804 // Label 143: @2106 1805 GIM_Reject, 1806 // Label 140: @2107 1807 GIM_Reject, 1808 // Label 116: @2108 1809 GIM_Try, /*On fail goto*//*Label 144*/ 2188, 1810 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64, 1811 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, 1812 GIM_Try, /*On fail goto*//*Label 145*/ 2141, // Rule ID 1889 // 1813 GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, 1814 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 1815 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, 1816 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 1817 // (sub:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (VPSUBQrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) 1818 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBQrr, 1819 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 1820 // GIR_Coverage, 1889, 1821 GIR_Done, 1822 // Label 145: @2141 1823 GIM_Try, /*On fail goto*//*Label 146*/ 2164, // Rule ID 1891 // 1824 GIM_CheckFeatures, GIFBS_UseSSE2, 1825 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 1826 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, 1827 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 1828 // (sub:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (PSUBQrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) 1829 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PSUBQrr, 1830 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 1831 // GIR_Coverage, 1891, 1832 GIR_Done, 1833 // Label 146: @2164 1834 GIM_Try, /*On fail goto*//*Label 147*/ 2187, // Rule ID 3927 // 1835 GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, 1836 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, 1837 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, 1838 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, 1839 // (sub:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (VPSUBQZ128rr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) 1840 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBQZ128rr, 1841 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 1842 // GIR_Coverage, 3927, 1843 GIR_Done, 1844 // Label 147: @2187 1845 GIM_Reject, 1846 // Label 144: @2188 1847 GIM_Reject, 1848 // Label 117: @2189 1849 GIM_Try, /*On fail goto*//*Label 148*/ 2269, 1850 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, 1851 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, 1852 GIM_Try, /*On fail goto*//*Label 149*/ 2222, // Rule ID 1883 // 1853 GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, 1854 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 1855 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, 1856 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 1857 // (sub:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (VPSUBDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) 1858 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBDrr, 1859 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 1860 // GIR_Coverage, 1883, 1861 GIR_Done, 1862 // Label 149: @2222 1863 GIM_Try, /*On fail goto*//*Label 150*/ 2245, // Rule ID 1885 // 1864 GIM_CheckFeatures, GIFBS_UseSSE2, 1865 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 1866 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, 1867 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 1868 // (sub:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (PSUBDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) 1869 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PSUBDrr, 1870 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 1871 // GIR_Coverage, 1885, 1872 GIR_Done, 1873 // Label 150: @2245 1874 GIM_Try, /*On fail goto*//*Label 151*/ 2268, // Rule ID 3954 // 1875 GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, 1876 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, 1877 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, 1878 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, 1879 // (sub:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2) => (VPSUBDZ128rr:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2) 1880 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBDZ128rr, 1881 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 1882 // GIR_Coverage, 3954, 1883 GIR_Done, 1884 // Label 151: @2268 1885 GIM_Reject, 1886 // Label 148: @2269 1887 GIM_Reject, 1888 // Label 118: @2270 1889 GIM_Try, /*On fail goto*//*Label 152*/ 2327, 1890 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64, 1891 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64, 1892 GIM_Try, /*On fail goto*//*Label 153*/ 2303, // Rule ID 1893 // 1893 GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX, 1894 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, 1895 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, 1896 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, 1897 // (sub:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) => (VPSUBQYrr:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) 1898 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBQYrr, 1899 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 1900 // GIR_Coverage, 1893, 1901 GIR_Done, 1902 // Label 153: @2303 1903 GIM_Try, /*On fail goto*//*Label 154*/ 2326, // Rule ID 3918 // 1904 GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, 1905 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, 1906 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, 1907 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, 1908 // (sub:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) => (VPSUBQZ256rr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) 1909 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBQZ256rr, 1910 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 1911 // GIR_Coverage, 3918, 1912 GIR_Done, 1913 // Label 154: @2326 1914 GIM_Reject, 1915 // Label 152: @2327 1916 GIM_Reject, 1917 // Label 119: @2328 1918 GIM_Try, /*On fail goto*//*Label 155*/ 2408, 1919 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16, 1920 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16, 1921 GIM_Try, /*On fail goto*//*Label 156*/ 2361, // Rule ID 1877 // 1922 GIM_CheckFeatures, GIFBS_HasAVX_NoVLX_Or_NoBWI, 1923 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 1924 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, 1925 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 1926 // (sub:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (VPSUBWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) 1927 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBWrr, 1928 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 1929 // GIR_Coverage, 1877, 1930 GIR_Done, 1931 // Label 156: @2361 1932 GIM_Try, /*On fail goto*//*Label 157*/ 2384, // Rule ID 1879 // 1933 GIM_CheckFeatures, GIFBS_UseSSE2, 1934 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 1935 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, 1936 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 1937 // (sub:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (PSUBWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) 1938 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PSUBWrr, 1939 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 1940 // GIR_Coverage, 1879, 1941 GIR_Done, 1942 // Label 157: @2384 1943 GIM_Try, /*On fail goto*//*Label 158*/ 2407, // Rule ID 3975 // 1944 GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, 1945 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, 1946 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, 1947 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, 1948 // (sub:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) => (VPSUBWZ128rr:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) 1949 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBWZ128rr, 1950 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 1951 // GIR_Coverage, 3975, 1952 GIR_Done, 1953 // Label 158: @2407 1954 GIM_Reject, 1955 // Label 155: @2408 1956 GIM_Reject, 1957 // Label 120: @2409 1958 GIM_Try, /*On fail goto*//*Label 159*/ 2466, 1959 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32, 1960 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s32, 1961 GIM_Try, /*On fail goto*//*Label 160*/ 2442, // Rule ID 1887 // 1962 GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX, 1963 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, 1964 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, 1965 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, 1966 // (sub:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) => (VPSUBDYrr:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) 1967 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBDYrr, 1968 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 1969 // GIR_Coverage, 1887, 1970 GIR_Done, 1971 // Label 160: @2442 1972 GIM_Try, /*On fail goto*//*Label 161*/ 2465, // Rule ID 3945 // 1973 GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, 1974 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, 1975 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, 1976 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, 1977 // (sub:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2) => (VPSUBDZ256rr:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2) 1978 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBDZ256rr, 1979 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 1980 // GIR_Coverage, 3945, 1981 GIR_Done, 1982 // Label 161: @2465 1983 GIM_Reject, 1984 // Label 159: @2466 1985 GIM_Reject, 1986 // Label 121: @2467 1987 GIM_Try, /*On fail goto*//*Label 162*/ 2498, // Rule ID 3909 // 1988 GIM_CheckFeatures, GIFBS_HasAVX512, 1989 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64, 1990 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s64, 1991 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, 1992 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, 1993 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, 1994 // (sub:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) => (VPSUBQZrr:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) 1995 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBQZrr, 1996 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 1997 // GIR_Coverage, 3909, 1998 GIR_Done, 1999 // Label 162: @2498 2000 GIM_Reject, 2001 // Label 122: @2499 2002 GIM_Try, /*On fail goto*//*Label 163*/ 2579, 2003 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8, 2004 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8, 2005 GIM_Try, /*On fail goto*//*Label 164*/ 2532, // Rule ID 1871 // 2006 GIM_CheckFeatures, GIFBS_HasAVX_NoVLX_Or_NoBWI, 2007 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 2008 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, 2009 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 2010 // (sub:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (VPSUBBrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) 2011 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBBrr, 2012 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 2013 // GIR_Coverage, 1871, 2014 GIR_Done, 2015 // Label 164: @2532 2016 GIM_Try, /*On fail goto*//*Label 165*/ 2555, // Rule ID 1873 // 2017 GIM_CheckFeatures, GIFBS_UseSSE2, 2018 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 2019 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, 2020 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 2021 // (sub:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (PSUBBrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) 2022 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PSUBBrr, 2023 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 2024 // GIR_Coverage, 1873, 2025 GIR_Done, 2026 // Label 165: @2555 2027 GIM_Try, /*On fail goto*//*Label 166*/ 2578, // Rule ID 3993 // 2028 GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, 2029 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, 2030 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, 2031 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, 2032 // (sub:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1, VR128X:{ *:[v16i8] }:$src2) => (VPSUBBZ128rr:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1, VR128X:{ *:[v16i8] }:$src2) 2033 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBBZ128rr, 2034 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 2035 // GIR_Coverage, 3993, 2036 GIR_Done, 2037 // Label 166: @2578 2038 GIM_Reject, 2039 // Label 163: @2579 2040 GIM_Reject, 2041 // Label 123: @2580 2042 GIM_Try, /*On fail goto*//*Label 167*/ 2637, 2043 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s16, 2044 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s16, 2045 GIM_Try, /*On fail goto*//*Label 168*/ 2613, // Rule ID 1881 // 2046 GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX_Or_NoBWI, 2047 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, 2048 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, 2049 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, 2050 // (sub:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) => (VPSUBWYrr:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) 2051 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBWYrr, 2052 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 2053 // GIR_Coverage, 1881, 2054 GIR_Done, 2055 // Label 168: @2613 2056 GIM_Try, /*On fail goto*//*Label 169*/ 2636, // Rule ID 3969 // 2057 GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, 2058 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, 2059 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, 2060 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, 2061 // (sub:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) => (VPSUBWZ256rr:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) 2062 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBWZ256rr, 2063 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 2064 // GIR_Coverage, 3969, 2065 GIR_Done, 2066 // Label 169: @2636 2067 GIM_Reject, 2068 // Label 167: @2637 2069 GIM_Reject, 2070 // Label 124: @2638 2071 GIM_Try, /*On fail goto*//*Label 170*/ 2669, // Rule ID 3936 // 2072 GIM_CheckFeatures, GIFBS_HasAVX512, 2073 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32, 2074 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s32, 2075 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, 2076 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, 2077 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, 2078 // (sub:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2) => (VPSUBDZrr:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2) 2079 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBDZrr, 2080 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 2081 // GIR_Coverage, 3936, 2082 GIR_Done, 2083 // Label 170: @2669 2084 GIM_Reject, 2085 // Label 125: @2670 2086 GIM_Try, /*On fail goto*//*Label 171*/ 2727, 2087 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s8, 2088 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s8, 2089 GIM_Try, /*On fail goto*//*Label 172*/ 2703, // Rule ID 1875 // 2090 GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX_Or_NoBWI, 2091 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, 2092 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, 2093 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, 2094 // (sub:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) => (VPSUBBYrr:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) 2095 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBBYrr, 2096 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 2097 // GIR_Coverage, 1875, 2098 GIR_Done, 2099 // Label 172: @2703 2100 GIM_Try, /*On fail goto*//*Label 173*/ 2726, // Rule ID 3987 // 2101 GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, 2102 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, 2103 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, 2104 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, 2105 // (sub:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1, VR256X:{ *:[v32i8] }:$src2) => (VPSUBBZ256rr:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1, VR256X:{ *:[v32i8] }:$src2) 2106 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBBZ256rr, 2107 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 2108 // GIR_Coverage, 3987, 2109 GIR_Done, 2110 // Label 173: @2726 2111 GIM_Reject, 2112 // Label 171: @2727 2113 GIM_Reject, 2114 // Label 126: @2728 2115 GIM_Try, /*On fail goto*//*Label 174*/ 2759, // Rule ID 3963 // 2116 GIM_CheckFeatures, GIFBS_HasBWI, 2117 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s16, 2118 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s16, 2119 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, 2120 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, 2121 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, 2122 // (sub:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) => (VPSUBWZrr:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) 2123 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBWZrr, 2124 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 2125 // GIR_Coverage, 3963, 2126 GIR_Done, 2127 // Label 174: @2759 2128 GIM_Reject, 2129 // Label 127: @2760 2130 GIM_Try, /*On fail goto*//*Label 175*/ 2791, // Rule ID 3981 // 2131 GIM_CheckFeatures, GIFBS_HasBWI, 2132 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v64s8, 2133 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v64s8, 2134 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, 2135 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, 2136 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, 2137 // (sub:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1, VR512:{ *:[v64i8] }:$src2) => (VPSUBBZrr:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1, VR512:{ *:[v64i8] }:$src2) 2138 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBBZrr, 2139 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 2140 // GIR_Coverage, 3981, 2141 GIR_Done, 2142 // Label 175: @2791 2143 GIM_Reject, 2144 // Label 128: @2792 2145 GIM_Reject, 2146 // Label 2: @2793 2147 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/2, 23, /*)*//*default:*//*Label 188*/ 3558, 2148 /*GILLT_s16*//*Label 176*/ 2820, 2149 /*GILLT_s32*//*Label 177*/ 2919, 2150 /*GILLT_s64*//*Label 178*/ 3018, 0, 0, 0, 2151 /*GILLT_v2s64*//*Label 179*/ 3120, 0, 2152 /*GILLT_v4s32*//*Label 180*/ 3152, 2153 /*GILLT_v4s64*//*Label 181*/ 3233, 0, 2154 /*GILLT_v8s16*//*Label 182*/ 3265, 2155 /*GILLT_v8s32*//*Label 183*/ 3346, 2156 /*GILLT_v8s64*//*Label 184*/ 3404, 0, 0, 2157 /*GILLT_v16s16*//*Label 185*/ 3436, 2158 /*GILLT_v16s32*//*Label 186*/ 3494, 0, 0, 2159 /*GILLT_v32s16*//*Label 187*/ 3526, 2160 // Label 176: @2820 2161 GIM_Try, /*On fail goto*//*Label 189*/ 2918, 2162 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16, 2163 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16, 2164 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR16RegClassID, 2165 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID, 2166 GIM_Try, /*On fail goto*//*Label 190*/ 2871, // Rule ID 16124 // 2167 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] 2168 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, 2169 GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i16immSExt8, 2170 // MIs[1] Operand 1 2171 // No operand predicates 2172 GIM_CheckIsSafeToFold, /*InsnID*/1, 2173 // (mul:{ *:[i16] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] })<<P:Predicate_i16immSExt8>>:$src2) => (IMUL16rri8:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] })<<P:Predicate_i16immSExt8>>:$src2) 2174 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::IMUL16rri8, 2175 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 2176 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 2177 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 2178 GIR_EraseFromParent, /*InsnID*/0, 2179 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 2180 // GIR_Coverage, 16124, 2181 GIR_Done, 2182 // Label 190: @2871 2183 GIM_Try, /*On fail goto*//*Label 191*/ 2901, // Rule ID 16122 // 2184 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] 2185 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, 2186 // MIs[1] Operand 1 2187 // No operand predicates 2188 GIM_CheckIsSafeToFold, /*InsnID*/1, 2189 // (mul:{ *:[i16] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] }):$src2) => (IMUL16rri:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] }):$src2) 2190 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::IMUL16rri, 2191 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 2192 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 2193 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 2194 GIR_EraseFromParent, /*InsnID*/0, 2195 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 2196 // GIR_Coverage, 16122, 2197 GIR_Done, 2198 // Label 191: @2901 2199 GIM_Try, /*On fail goto*//*Label 192*/ 2917, // Rule ID 16116 // 2200 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR16RegClassID, 2201 // (mul:{ *:[i16] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2) => (IMUL16rr:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2) 2202 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::IMUL16rr, 2203 GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS, 2204 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 2205 // GIR_Coverage, 16116, 2206 GIR_Done, 2207 // Label 192: @2917 2208 GIM_Reject, 2209 // Label 189: @2918 2210 GIM_Reject, 2211 // Label 177: @2919 2212 GIM_Try, /*On fail goto*//*Label 193*/ 3017, 2213 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, 2214 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, 2215 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, 2216 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, 2217 GIM_Try, /*On fail goto*//*Label 194*/ 2970, // Rule ID 16125 // 2218 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] 2219 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, 2220 GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i32immSExt8, 2221 // MIs[1] Operand 1 2222 // No operand predicates 2223 GIM_CheckIsSafeToFold, /*InsnID*/1, 2224 // (mul:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] })<<P:Predicate_i32immSExt8>>:$src2) => (IMUL32rri8:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] })<<P:Predicate_i32immSExt8>>:$src2) 2225 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::IMUL32rri8, 2226 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 2227 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 2228 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 2229 GIR_EraseFromParent, /*InsnID*/0, 2230 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 2231 // GIR_Coverage, 16125, 2232 GIR_Done, 2233 // Label 194: @2970 2234 GIM_Try, /*On fail goto*//*Label 195*/ 3000, // Rule ID 16123 // 2235 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] 2236 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, 2237 // MIs[1] Operand 1 2238 // No operand predicates 2239 GIM_CheckIsSafeToFold, /*InsnID*/1, 2240 // (mul:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$src2) => (IMUL32rri:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$src2) 2241 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::IMUL32rri, 2242 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 2243 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 2244 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 2245 GIR_EraseFromParent, /*InsnID*/0, 2246 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 2247 // GIR_Coverage, 16123, 2248 GIR_Done, 2249 // Label 195: @3000 2250 GIM_Try, /*On fail goto*//*Label 196*/ 3016, // Rule ID 16117 // 2251 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR32RegClassID, 2252 // (mul:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) => (IMUL32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) 2253 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::IMUL32rr, 2254 GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS, 2255 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 2256 // GIR_Coverage, 16117, 2257 GIR_Done, 2258 // Label 196: @3016 2259 GIM_Reject, 2260 // Label 193: @3017 2261 GIM_Reject, 2262 // Label 178: @3018 2263 GIM_Try, /*On fail goto*//*Label 197*/ 3119, 2264 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, 2265 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, 2266 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, 2267 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, 2268 GIM_Try, /*On fail goto*//*Label 198*/ 3069, // Rule ID 16126 // 2269 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] 2270 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, 2271 GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i64immSExt8, 2272 // MIs[1] Operand 1 2273 // No operand predicates 2274 GIM_CheckIsSafeToFold, /*InsnID*/1, 2275 // (mul:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt8>>:$src2) => (IMUL64rri8:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt8>>:$src2) 2276 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::IMUL64rri8, 2277 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 2278 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 2279 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 2280 GIR_EraseFromParent, /*InsnID*/0, 2281 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 2282 // GIR_Coverage, 16126, 2283 GIR_Done, 2284 // Label 198: @3069 2285 GIM_Try, /*On fail goto*//*Label 199*/ 3102, // Rule ID 16127 // 2286 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] 2287 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, 2288 GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i64immSExt32, 2289 // MIs[1] Operand 1 2290 // No operand predicates 2291 GIM_CheckIsSafeToFold, /*InsnID*/1, 2292 // (mul:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt32>>:$src2) => (IMUL64rri32:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt32>>:$src2) 2293 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::IMUL64rri32, 2294 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 2295 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 2296 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 2297 GIR_EraseFromParent, /*InsnID*/0, 2298 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 2299 // GIR_Coverage, 16127, 2300 GIR_Done, 2301 // Label 199: @3102 2302 GIM_Try, /*On fail goto*//*Label 200*/ 3118, // Rule ID 16118 // 2303 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR64RegClassID, 2304 // (mul:{ *:[i64] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) => (IMUL64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) 2305 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::IMUL64rr, 2306 GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS, 2307 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 2308 // GIR_Coverage, 16118, 2309 GIR_Done, 2310 // Label 200: @3118 2311 GIM_Reject, 2312 // Label 197: @3119 2313 GIM_Reject, 2314 // Label 179: @3120 2315 GIM_Try, /*On fail goto*//*Label 201*/ 3151, // Rule ID 4206 // 2316 GIM_CheckFeatures, GIFBS_HasDQI_HasVLX, 2317 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64, 2318 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, 2319 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, 2320 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, 2321 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, 2322 // (mul:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (VPMULLQZ128rr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) 2323 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMULLQZ128rr, 2324 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 2325 // GIR_Coverage, 4206, 2326 GIR_Done, 2327 // Label 201: @3151 2328 GIM_Reject, 2329 // Label 180: @3152 2330 GIM_Try, /*On fail goto*//*Label 202*/ 3232, 2331 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, 2332 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, 2333 GIM_Try, /*On fail goto*//*Label 203*/ 3185, // Rule ID 2511 // 2334 GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, 2335 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 2336 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, 2337 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 2338 // (mul:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (VPMULLDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) 2339 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMULLDrr, 2340 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 2341 // GIR_Coverage, 2511, 2342 GIR_Done, 2343 // Label 203: @3185 2344 GIM_Try, /*On fail goto*//*Label 204*/ 3208, // Rule ID 2519 // 2345 GIM_CheckFeatures, GIFBS_UseSSE41, 2346 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 2347 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, 2348 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 2349 // (mul:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (PMULLDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) 2350 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PMULLDrr, 2351 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 2352 // GIR_Coverage, 2519, 2353 GIR_Done, 2354 // Label 204: @3208 2355 GIM_Try, /*On fail goto*//*Label 205*/ 3231, // Rule ID 4161 // 2356 GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, 2357 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, 2358 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, 2359 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, 2360 // (mul:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2) => (VPMULLDZ128rr:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2) 2361 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMULLDZ128rr, 2362 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 2363 // GIR_Coverage, 4161, 2364 GIR_Done, 2365 // Label 205: @3231 2366 GIM_Reject, 2367 // Label 202: @3232 2368 GIM_Reject, 2369 // Label 181: @3233 2370 GIM_Try, /*On fail goto*//*Label 206*/ 3264, // Rule ID 4197 // 2371 GIM_CheckFeatures, GIFBS_HasDQI_HasVLX, 2372 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64, 2373 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64, 2374 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, 2375 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, 2376 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, 2377 // (mul:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) => (VPMULLQZ256rr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) 2378 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMULLQZ256rr, 2379 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 2380 // GIR_Coverage, 4197, 2381 GIR_Done, 2382 // Label 206: @3264 2383 GIM_Reject, 2384 // Label 182: @3265 2385 GIM_Try, /*On fail goto*//*Label 207*/ 3345, 2386 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16, 2387 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16, 2388 GIM_Try, /*On fail goto*//*Label 208*/ 3298, // Rule ID 1853 // 2389 GIM_CheckFeatures, GIFBS_HasAVX_NoVLX_Or_NoBWI, 2390 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 2391 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, 2392 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 2393 // (mul:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (VPMULLWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) 2394 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMULLWrr, 2395 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 2396 // GIR_Coverage, 1853, 2397 GIR_Done, 2398 // Label 208: @3298 2399 GIM_Try, /*On fail goto*//*Label 209*/ 3321, // Rule ID 1855 // 2400 GIM_CheckFeatures, GIFBS_UseSSE2, 2401 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 2402 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, 2403 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 2404 // (mul:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (PMULLWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) 2405 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PMULLWrr, 2406 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 2407 // GIR_Coverage, 1855, 2408 GIR_Done, 2409 // Label 209: @3321 2410 GIM_Try, /*On fail goto*//*Label 210*/ 3344, // Rule ID 4182 // 2411 GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, 2412 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, 2413 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, 2414 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, 2415 // (mul:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) => (VPMULLWZ128rr:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) 2416 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMULLWZ128rr, 2417 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 2418 // GIR_Coverage, 4182, 2419 GIR_Done, 2420 // Label 210: @3344 2421 GIM_Reject, 2422 // Label 207: @3345 2423 GIM_Reject, 2424 // Label 183: @3346 2425 GIM_Try, /*On fail goto*//*Label 211*/ 3403, 2426 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32, 2427 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s32, 2428 GIM_Try, /*On fail goto*//*Label 212*/ 3379, // Rule ID 2515 // 2429 GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX, 2430 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, 2431 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, 2432 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, 2433 // (mul:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) => (VPMULLDYrr:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) 2434 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMULLDYrr, 2435 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 2436 // GIR_Coverage, 2515, 2437 GIR_Done, 2438 // Label 212: @3379 2439 GIM_Try, /*On fail goto*//*Label 213*/ 3402, // Rule ID 4152 // 2440 GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, 2441 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, 2442 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, 2443 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, 2444 // (mul:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2) => (VPMULLDZ256rr:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2) 2445 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMULLDZ256rr, 2446 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 2447 // GIR_Coverage, 4152, 2448 GIR_Done, 2449 // Label 213: @3402 2450 GIM_Reject, 2451 // Label 211: @3403 2452 GIM_Reject, 2453 // Label 184: @3404 2454 GIM_Try, /*On fail goto*//*Label 214*/ 3435, // Rule ID 4188 // 2455 GIM_CheckFeatures, GIFBS_HasDQI, 2456 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64, 2457 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s64, 2458 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, 2459 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, 2460 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, 2461 // (mul:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) => (VPMULLQZrr:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) 2462 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMULLQZrr, 2463 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 2464 // GIR_Coverage, 4188, 2465 GIR_Done, 2466 // Label 214: @3435 2467 GIM_Reject, 2468 // Label 185: @3436 2469 GIM_Try, /*On fail goto*//*Label 215*/ 3493, 2470 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s16, 2471 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s16, 2472 GIM_Try, /*On fail goto*//*Label 216*/ 3469, // Rule ID 1857 // 2473 GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX_Or_NoBWI, 2474 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, 2475 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, 2476 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, 2477 // (mul:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) => (VPMULLWYrr:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) 2478 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMULLWYrr, 2479 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 2480 // GIR_Coverage, 1857, 2481 GIR_Done, 2482 // Label 216: @3469 2483 GIM_Try, /*On fail goto*//*Label 217*/ 3492, // Rule ID 4176 // 2484 GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, 2485 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, 2486 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, 2487 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, 2488 // (mul:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) => (VPMULLWZ256rr:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) 2489 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMULLWZ256rr, 2490 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 2491 // GIR_Coverage, 4176, 2492 GIR_Done, 2493 // Label 217: @3492 2494 GIM_Reject, 2495 // Label 215: @3493 2496 GIM_Reject, 2497 // Label 186: @3494 2498 GIM_Try, /*On fail goto*//*Label 218*/ 3525, // Rule ID 4143 // 2499 GIM_CheckFeatures, GIFBS_HasAVX512, 2500 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32, 2501 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s32, 2502 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, 2503 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, 2504 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, 2505 // (mul:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2) => (VPMULLDZrr:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2) 2506 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMULLDZrr, 2507 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 2508 // GIR_Coverage, 4143, 2509 GIR_Done, 2510 // Label 218: @3525 2511 GIM_Reject, 2512 // Label 187: @3526 2513 GIM_Try, /*On fail goto*//*Label 219*/ 3557, // Rule ID 4170 // 2514 GIM_CheckFeatures, GIFBS_HasBWI, 2515 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s16, 2516 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s16, 2517 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, 2518 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, 2519 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, 2520 // (mul:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) => (VPMULLWZrr:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) 2521 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMULLWZrr, 2522 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 2523 // GIR_Coverage, 4170, 2524 GIR_Done, 2525 // Label 219: @3557 2526 GIM_Reject, 2527 // Label 188: @3558 2528 GIM_Reject, 2529 // Label 3: @3559 2530 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/0, 24, /*)*//*default:*//*Label 234*/ 6670, 2531 /*GILLT_s1*//*Label 220*/ 3589, 2532 /*GILLT_s8*//*Label 221*/ 3887, 2533 /*GILLT_s16*//*Label 222*/ 3953, 2534 /*GILLT_s32*//*Label 223*/ 4052, 2535 /*GILLT_s64*//*Label 224*/ 5213, 0, 0, 2536 /*GILLT_v2s1*//*Label 225*/ 6085, 2537 /*GILLT_v2s64*//*Label 226*/ 6178, 2538 /*GILLT_v4s1*//*Label 227*/ 6259, 0, 2539 /*GILLT_v4s64*//*Label 228*/ 6352, 2540 /*GILLT_v8s1*//*Label 229*/ 6433, 0, 0, 2541 /*GILLT_v8s64*//*Label 230*/ 6542, 2542 /*GILLT_v16s1*//*Label 231*/ 6574, 0, 0, 0, 2543 /*GILLT_v32s1*//*Label 232*/ 6606, 0, 0, 2544 /*GILLT_v64s1*//*Label 233*/ 6638, 2545 // Label 220: @3589 2546 GIM_Try, /*On fail goto*//*Label 235*/ 3886, 2547 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s1, 2548 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s1, 2549 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK1RegClassID, 2550 GIM_Try, /*On fail goto*//*Label 236*/ 3704, // Rule ID 13774 // 2551 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] 2552 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR, 2553 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s1, 2554 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s1, 2555 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::VK1RegClassID, 2556 GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, 2557 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK1RegClassID, 2558 GIM_CheckIsSafeToFold, /*InsnID*/1, 2559 // (and:{ *:[v1i1] } (xor:{ *:[v1i1] } VK1:{ *:[v1i1] }:$src1, -1:{ *:[v1i1] }), VK1:{ *:[v1i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v1i1] } (KANDNWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK1:{ *:[v1i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK1:{ *:[v1i1] }:$src2, VK16:{ *:[i32] })), VK1:{ *:[i32] }) 2560 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, 2561 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, 2562 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1, 2563 GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::COPY, 2564 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, 2565 GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2 2566 GIR_ConstrainSelectedInstOperands, /*InsnID*/3, 2567 GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::COPY, 2568 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, 2569 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/1, /*OpIdx*/1, // src1 2570 GIR_ConstrainSelectedInstOperands, /*InsnID*/2, 2571 GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::KANDNWrr, 2572 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, 2573 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, 2574 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/2, /*TempRegFlags*/0, 2575 GIR_ConstrainSelectedInstOperands, /*InsnID*/1, 2576 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 2577 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 2578 GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, 2579 GIR_EraseFromParent, /*InsnID*/0, 2580 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VK1*/8, 2581 // GIR_Coverage, 13774, 2582 GIR_Done, 2583 // Label 236: @3704 2584 GIM_Try, /*On fail goto*//*Label 237*/ 3805, // Rule ID 18358 // 2585 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK1RegClassID, 2586 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] 2587 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR, 2588 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s1, 2589 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s1, 2590 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::VK1RegClassID, 2591 GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, 2592 GIM_CheckIsSafeToFold, /*InsnID*/1, 2593 // (and:{ *:[v1i1] } VK1:{ *:[v1i1] }:$src2, (xor:{ *:[v1i1] } VK1:{ *:[v1i1] }:$src1, -1:{ *:[v1i1] })) => (COPY_TO_REGCLASS:{ *:[v1i1] } (KANDNWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK1:{ *:[v1i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK1:{ *:[v1i1] }:$src2, VK16:{ *:[i32] })), VK1:{ *:[i32] }) 2594 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, 2595 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, 2596 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1, 2597 GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::COPY, 2598 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, 2599 GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/1, // src2 2600 GIR_ConstrainSelectedInstOperands, /*InsnID*/3, 2601 GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::COPY, 2602 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, 2603 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/1, /*OpIdx*/1, // src1 2604 GIR_ConstrainSelectedInstOperands, /*InsnID*/2, 2605 GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::KANDNWrr, 2606 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, 2607 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, 2608 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/2, /*TempRegFlags*/0, 2609 GIR_ConstrainSelectedInstOperands, /*InsnID*/1, 2610 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 2611 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 2612 GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, 2613 GIR_EraseFromParent, /*InsnID*/0, 2614 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VK1*/8, 2615 // GIR_Coverage, 18358, 2616 GIR_Done, 2617 // Label 237: @3805 2618 GIM_Try, /*On fail goto*//*Label 238*/ 3885, // Rule ID 13770 // 2619 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK1RegClassID, 2620 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK1RegClassID, 2621 // (and:{ *:[v1i1] } VK1:{ *:[v1i1] }:$src1, VK1:{ *:[v1i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v1i1] } (KANDWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK1:{ *:[v1i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK1:{ *:[v1i1] }:$src2, VK16:{ *:[i32] })), VK1:{ *:[i32] }) 2622 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, 2623 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, 2624 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1, 2625 GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::COPY, 2626 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, 2627 GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2 2628 GIR_ConstrainSelectedInstOperands, /*InsnID*/3, 2629 GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::COPY, 2630 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, 2631 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1 2632 GIR_ConstrainSelectedInstOperands, /*InsnID*/2, 2633 GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::KANDWrr, 2634 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, 2635 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, 2636 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/2, /*TempRegFlags*/0, 2637 GIR_ConstrainSelectedInstOperands, /*InsnID*/1, 2638 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 2639 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 2640 GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, 2641 GIR_EraseFromParent, /*InsnID*/0, 2642 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VK1*/8, 2643 // GIR_Coverage, 13770, 2644 GIR_Done, 2645 // Label 238: @3885 2646 GIM_Reject, 2647 // Label 235: @3886 2648 GIM_Reject, 2649 // Label 221: @3887 2650 GIM_Try, /*On fail goto*//*Label 239*/ 3952, 2651 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s8, 2652 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8, 2653 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR8RegClassID, 2654 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR8RegClassID, 2655 GIM_Try, /*On fail goto*//*Label 240*/ 3935, // Rule ID 16180 // 2656 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] 2657 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, 2658 // MIs[1] Operand 1 2659 // No operand predicates 2660 GIM_CheckIsSafeToFold, /*InsnID*/1, 2661 // (and:{ *:[i8] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) => (AND8ri:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) 2662 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::AND8ri, 2663 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 2664 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 2665 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 2666 GIR_EraseFromParent, /*InsnID*/0, 2667 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 2668 // GIR_Coverage, 16180, 2669 GIR_Done, 2670 // Label 240: @3935 2671 GIM_Try, /*On fail goto*//*Label 241*/ 3951, // Rule ID 16172 // 2672 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR8RegClassID, 2673 // (and:{ *:[i8] } GR8:{ *:[i8] }:$src1, GR8:{ *:[i8] }:$src2) => (AND8rr:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, GR8:{ *:[i8] }:$src2) 2674 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::AND8rr, 2675 GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS, 2676 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 2677 // GIR_Coverage, 16172, 2678 GIR_Done, 2679 // Label 241: @3951 2680 GIM_Reject, 2681 // Label 239: @3952 2682 GIM_Reject, 2683 // Label 222: @3953 2684 GIM_Try, /*On fail goto*//*Label 242*/ 4051, 2685 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16, 2686 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16, 2687 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR16RegClassID, 2688 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID, 2689 GIM_Try, /*On fail goto*//*Label 243*/ 4004, // Rule ID 16183 // 2690 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] 2691 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, 2692 GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i16immSExt8, 2693 // MIs[1] Operand 1 2694 // No operand predicates 2695 GIM_CheckIsSafeToFold, /*InsnID*/1, 2696 // (and:{ *:[i16] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] })<<P:Predicate_i16immSExt8>>:$src2) => (AND16ri8:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] })<<P:Predicate_i16immSExt8>>:$src2) 2697 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::AND16ri8, 2698 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 2699 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 2700 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 2701 GIR_EraseFromParent, /*InsnID*/0, 2702 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 2703 // GIR_Coverage, 16183, 2704 GIR_Done, 2705 // Label 243: @4004 2706 GIM_Try, /*On fail goto*//*Label 244*/ 4034, // Rule ID 16181 // 2707 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] 2708 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, 2709 // MIs[1] Operand 1 2710 // No operand predicates 2711 GIM_CheckIsSafeToFold, /*InsnID*/1, 2712 // (and:{ *:[i16] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] }):$src2) => (AND16ri:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] }):$src2) 2713 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::AND16ri, 2714 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 2715 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 2716 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 2717 GIR_EraseFromParent, /*InsnID*/0, 2718 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 2719 // GIR_Coverage, 16181, 2720 GIR_Done, 2721 // Label 244: @4034 2722 GIM_Try, /*On fail goto*//*Label 245*/ 4050, // Rule ID 16173 // 2723 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR16RegClassID, 2724 // (and:{ *:[i16] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2) => (AND16rr:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2) 2725 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::AND16rr, 2726 GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS, 2727 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 2728 // GIR_Coverage, 16173, 2729 GIR_Done, 2730 // Label 245: @4050 2731 GIM_Reject, 2732 // Label 242: @4051 2733 GIM_Reject, 2734 // Label 223: @4052 2735 GIM_Try, /*On fail goto*//*Label 246*/ 5212, 2736 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, 2737 GIM_Try, /*On fail goto*//*Label 247*/ 4153, // Rule ID 18214 // 2738 GIM_CheckFeatures, GIFBS_HasBMI2, 2739 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, 2740 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, 2741 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] 2742 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_LSHR, 2743 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, 2744 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s8, 2745 GIM_CheckConstantInt, /*MI*/1, /*Op*/1, -1, 2746 GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2] 2747 GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_TRUNC, 2748 GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s32, 2749 GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/1, // MIs[3] 2750 GIM_CheckOpcode, /*MI*/3, TargetOpcode::G_SUB, 2751 GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_s32, 2752 GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_s32, 2753 GIM_CheckConstantInt, /*MI*/3, /*Op*/1, 32, 2754 GIM_CheckRegBankForClass, /*MI*/3, /*Op*/2, /*RC*/X86::GR32RegClassID, 2755 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR32RegClassID, 2756 GIM_CheckIsSafeToFold, /*InsnID*/1, 2757 GIM_CheckIsSafeToFold, /*InsnID*/2, 2758 GIM_CheckIsSafeToFold, /*InsnID*/3, 2759 // (and:{ *:[i32] } (srl:{ *:[i32] } -1:{ *:[i32] }, (trunc:{ *:[i8] } (sub:{ *:[i32] } 32:{ *:[i32] }, GR32:{ *:[i32] }:$lz))), GR32:{ *:[i32] }:$src) => (BZHI32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src, GR32:{ *:[i32] }:$lz) 2760 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BZHI32rr, 2761 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 2762 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src 2763 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/2, // lz 2764 GIR_EraseFromParent, /*InsnID*/0, 2765 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 2766 // GIR_Coverage, 18214, 2767 GIR_Done, 2768 // Label 247: @4153 2769 GIM_Try, /*On fail goto*//*Label 248*/ 4248, // Rule ID 12253 // 2770 GIM_CheckFeatures, GIFBS_HasBMI2, 2771 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, 2772 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, 2773 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, 2774 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] 2775 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_LSHR, 2776 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, 2777 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s8, 2778 GIM_CheckConstantInt, /*MI*/1, /*Op*/1, -1, 2779 GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2] 2780 GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_TRUNC, 2781 GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s32, 2782 GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/1, // MIs[3] 2783 GIM_CheckOpcode, /*MI*/3, TargetOpcode::G_SUB, 2784 GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_s32, 2785 GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_s32, 2786 GIM_CheckConstantInt, /*MI*/3, /*Op*/1, 32, 2787 GIM_CheckRegBankForClass, /*MI*/3, /*Op*/2, /*RC*/X86::GR32RegClassID, 2788 GIM_CheckIsSafeToFold, /*InsnID*/1, 2789 GIM_CheckIsSafeToFold, /*InsnID*/2, 2790 GIM_CheckIsSafeToFold, /*InsnID*/3, 2791 // (and:{ *:[i32] } GR32:{ *:[i32] }:$src, (srl:{ *:[i32] } -1:{ *:[i32] }, (trunc:{ *:[i8] } (sub:{ *:[i32] } 32:{ *:[i32] }, GR32:{ *:[i32] }:$lz)))) => (BZHI32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src, GR32:{ *:[i32] }:$lz) 2792 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BZHI32rr, 2793 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 2794 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 2795 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/2, // lz 2796 GIR_EraseFromParent, /*InsnID*/0, 2797 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 2798 // GIR_Coverage, 12253, 2799 GIR_Done, 2800 // Label 248: @4248 2801 GIM_Try, /*On fail goto*//*Label 249*/ 4323, // Rule ID 18224 // 2802 GIM_CheckFeatures, GIFBS_HasTBM, 2803 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, 2804 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, 2805 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] 2806 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD, 2807 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, 2808 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, 2809 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR32RegClassID, 2810 GIM_CheckConstantInt, /*MI*/1, /*Op*/2, 1, 2811 GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2] 2812 GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_XOR, 2813 GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s32, 2814 // MIs[2] src 2815 GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1, 2816 GIM_CheckConstantInt, /*MI*/2, /*Op*/2, -1, 2817 GIM_CheckIsSafeToFold, /*InsnID*/1, 2818 GIM_CheckIsSafeToFold, /*InsnID*/2, 2819 // (and:{ *:[i32] } (add:{ *:[i32] } GR32:{ *:[i32] }:$src, 1:{ *:[i32] }), (xor:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] })) => (BLCIC32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) 2820 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCIC32rr, 2821 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 2822 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src 2823 GIR_EraseFromParent, /*InsnID*/0, 2824 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 2825 // GIR_Coverage, 18224, 2826 GIR_Done, 2827 // Label 249: @4323 2828 GIM_Try, /*On fail goto*//*Label 250*/ 4398, // Rule ID 18236 // 2829 GIM_CheckFeatures, GIFBS_HasTBM, 2830 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, 2831 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, 2832 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] 2833 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD, 2834 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, 2835 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, 2836 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR32RegClassID, 2837 GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, 2838 GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2] 2839 GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_XOR, 2840 GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s32, 2841 // MIs[2] src 2842 GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1, 2843 GIM_CheckConstantInt, /*MI*/2, /*Op*/2, -1, 2844 GIM_CheckIsSafeToFold, /*InsnID*/1, 2845 GIM_CheckIsSafeToFold, /*InsnID*/2, 2846 // (and:{ *:[i32] } (add:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] }), (xor:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] })) => (TZMSK32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) 2847 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::TZMSK32rr, 2848 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 2849 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src 2850 GIR_EraseFromParent, /*InsnID*/0, 2851 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 2852 // GIR_Coverage, 18236, 2853 GIR_Done, 2854 // Label 250: @4398 2855 GIM_Try, /*On fail goto*//*Label 251*/ 4473, // Rule ID 12269 // 2856 GIM_CheckFeatures, GIFBS_HasTBM, 2857 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, 2858 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, 2859 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] 2860 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR, 2861 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, 2862 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, 2863 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR32RegClassID, 2864 GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, 2865 GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2] 2866 GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ADD, 2867 GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s32, 2868 // MIs[2] src 2869 GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1, 2870 GIM_CheckConstantInt, /*MI*/2, /*Op*/2, 1, 2871 GIM_CheckIsSafeToFold, /*InsnID*/1, 2872 GIM_CheckIsSafeToFold, /*InsnID*/2, 2873 // (and:{ *:[i32] } (xor:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] }), (add:{ *:[i32] } GR32:{ *:[i32] }:$src, 1:{ *:[i32] })) => (BLCIC32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) 2874 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCIC32rr, 2875 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 2876 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src 2877 GIR_EraseFromParent, /*InsnID*/0, 2878 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 2879 // GIR_Coverage, 12269, 2880 GIR_Done, 2881 // Label 251: @4473 2882 GIM_Try, /*On fail goto*//*Label 252*/ 4548, // Rule ID 12281 // 2883 GIM_CheckFeatures, GIFBS_HasTBM, 2884 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, 2885 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, 2886 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] 2887 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR, 2888 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, 2889 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, 2890 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR32RegClassID, 2891 GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, 2892 GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2] 2893 GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ADD, 2894 GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s32, 2895 // MIs[2] src 2896 GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1, 2897 GIM_CheckConstantInt, /*MI*/2, /*Op*/2, -1, 2898 GIM_CheckIsSafeToFold, /*InsnID*/1, 2899 GIM_CheckIsSafeToFold, /*InsnID*/2, 2900 // (and:{ *:[i32] } (xor:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] }), (add:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] })) => (TZMSK32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) 2901 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::TZMSK32rr, 2902 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 2903 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src 2904 GIR_EraseFromParent, /*InsnID*/0, 2905 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 2906 // GIR_Coverage, 12281, 2907 GIR_Done, 2908 // Label 252: @4548 2909 GIM_Try, /*On fail goto*//*Label 253*/ 4602, // Rule ID 18218 // 2910 GIM_CheckFeatures, GIFBS_HasTBM, 2911 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, 2912 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] 2913 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD, 2914 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, 2915 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, 2916 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR32RegClassID, 2917 GIM_CheckConstantInt, /*MI*/1, /*Op*/2, 1, 2918 // MIs[0] src 2919 GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/1, 2920 GIM_CheckIsSafeToFold, /*InsnID*/1, 2921 // (and:{ *:[i32] } (add:{ *:[i32] } GR32:{ *:[i32] }:$src, 1:{ *:[i32] }), GR32:{ *:[i32] }:$src) => (BLCFILL32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) 2922 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCFILL32rr, 2923 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 2924 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src 2925 GIR_EraseFromParent, /*InsnID*/0, 2926 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 2927 // GIR_Coverage, 18218, 2928 GIR_Done, 2929 // Label 253: @4602 2930 GIM_Try, /*On fail goto*//*Label 254*/ 4656, // Rule ID 18728 // 2931 GIM_CheckFeatures, GIFBS_HasBMI, 2932 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, 2933 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] 2934 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD, 2935 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, 2936 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, 2937 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR32RegClassID, 2938 GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, 2939 // MIs[0] src 2940 GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/1, 2941 GIM_CheckIsSafeToFold, /*InsnID*/1, 2942 // (and:{ *:[i32] } (add:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] }), GR32:{ *:[i32] }:$src) => (BLSR32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) 2943 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLSR32rr, 2944 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 2945 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src 2946 GIR_EraseFromParent, /*InsnID*/0, 2947 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 2948 // GIR_Coverage, 18728, 2949 GIR_Done, 2950 // Label 254: @4656 2951 GIM_Try, /*On fail goto*//*Label 255*/ 4710, // Rule ID 18732 // 2952 GIM_CheckFeatures, GIFBS_HasBMI, 2953 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, 2954 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] 2955 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SUB, 2956 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, 2957 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, 2958 GIM_CheckConstantInt, /*MI*/1, /*Op*/1, 0, 2959 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/X86::GR32RegClassID, 2960 // MIs[0] src 2961 GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/2, 2962 GIM_CheckIsSafeToFold, /*InsnID*/1, 2963 // (and:{ *:[i32] } (sub:{ *:[i32] } 0:{ *:[i32] }, GR32:{ *:[i32] }:$src), GR32:{ *:[i32] }:$src) => (BLSI32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) 2964 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLSI32rr, 2965 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 2966 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src 2967 GIR_EraseFromParent, /*InsnID*/0, 2968 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 2969 // GIR_Coverage, 18732, 2970 GIR_Done, 2971 // Label 255: @4710 2972 GIM_Try, /*On fail goto*//*Label 256*/ 4764, // Rule ID 12263 // 2973 GIM_CheckFeatures, GIFBS_HasTBM, 2974 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, 2975 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, 2976 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, 2977 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] 2978 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD, 2979 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, 2980 // MIs[1] src 2981 GIM_CheckIsSameOperand, /*MI*/1, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1, 2982 GIM_CheckConstantInt, /*MI*/1, /*Op*/2, 1, 2983 GIM_CheckIsSafeToFold, /*InsnID*/1, 2984 // (and:{ *:[i32] } GR32:{ *:[i32] }:$src, (add:{ *:[i32] } GR32:{ *:[i32] }:$src, 1:{ *:[i32] })) => (BLCFILL32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) 2985 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCFILL32rr, 2986 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 2987 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 2988 GIR_EraseFromParent, /*InsnID*/0, 2989 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 2990 // GIR_Coverage, 12263, 2991 GIR_Done, 2992 // Label 256: @4764 2993 GIM_Try, /*On fail goto*//*Label 257*/ 4818, // Rule ID 16451 // 2994 GIM_CheckFeatures, GIFBS_HasBMI, 2995 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, 2996 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, 2997 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, 2998 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] 2999 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD, 3000 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, 3001 // MIs[1] src 3002 GIM_CheckIsSameOperand, /*MI*/1, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1, 3003 GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, 3004 GIM_CheckIsSafeToFold, /*InsnID*/1, 3005 // (and:{ *:[i32] } GR32:{ *:[i32] }:$src, (add:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] })) => (BLSR32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) 3006 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLSR32rr, 3007 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 3008 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 3009 GIR_EraseFromParent, /*InsnID*/0, 3010 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 3011 // GIR_Coverage, 16451, 3012 GIR_Done, 3013 // Label 257: @4818 3014 GIM_Try, /*On fail goto*//*Label 258*/ 4872, // Rule ID 16455 // 3015 GIM_CheckFeatures, GIFBS_HasBMI, 3016 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, 3017 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, 3018 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, 3019 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] 3020 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SUB, 3021 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, 3022 GIM_CheckConstantInt, /*MI*/1, /*Op*/1, 0, 3023 // MIs[1] src 3024 GIM_CheckIsSameOperand, /*MI*/1, /*OpIdx*/2, /*OtherMI*/0, /*OtherOpIdx*/1, 3025 GIM_CheckIsSafeToFold, /*InsnID*/1, 3026 // (and:{ *:[i32] } GR32:{ *:[i32] }:$src, (sub:{ *:[i32] } 0:{ *:[i32] }, GR32:{ *:[i32] }:$src)) => (BLSI32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) 3027 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLSI32rr, 3028 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 3029 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 3030 GIR_EraseFromParent, /*InsnID*/0, 3031 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 3032 // GIR_Coverage, 16455, 3033 GIR_Done, 3034 // Label 258: @4872 3035 GIM_Try, /*On fail goto*//*Label 259*/ 4923, // Rule ID 15956 // 3036 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, 3037 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, 3038 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, 3039 GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 65535, 3040 // (and:{ *:[i32] } GR32:{ *:[i32] }:$src1, 65535:{ *:[i32] }) => (MOVZX32rr16:{ *:[i32] } (EXTRACT_SUBREG:{ *:[i16] } GR32:{ *:[i32] }:$src1, sub_16bit:{ *:[i32] })) 3041 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s16, 3042 GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY, 3043 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, 3044 GIR_CopySubReg, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, /*SubRegIdx*/4, // src1 3045 GIR_ConstrainSelectedInstOperands, /*InsnID*/1, 3046 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::MOVZX32rr16, 3047 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 3048 GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, 3049 GIR_EraseFromParent, /*InsnID*/0, 3050 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 3051 // GIR_Coverage, 15956, 3052 GIR_Done, 3053 // Label 259: @4923 3054 GIM_Try, /*On fail goto*//*Label 260*/ 4974, // Rule ID 15957 // 3055 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, 3056 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, 3057 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, 3058 GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 255, 3059 // (and:{ *:[i32] } GR32:{ *:[i32] }:$src1, 255:{ *:[i32] }) => (MOVZX32rr8:{ *:[i32] } (EXTRACT_SUBREG:{ *:[i8] } GR32:{ *:[i32] }:$src1, sub_8bit:{ *:[i32] })) 3060 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s8, 3061 GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY, 3062 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, 3063 GIR_CopySubReg, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, /*SubRegIdx*/1, // src1 3064 GIR_ConstrainSelectedInstOperands, /*InsnID*/1, 3065 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::MOVZX32rr8, 3066 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 3067 GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, 3068 GIR_EraseFromParent, /*InsnID*/0, 3069 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 3070 // GIR_Coverage, 15957, 3071 GIR_Done, 3072 // Label 260: @4974 3073 GIM_Try, /*On fail goto*//*Label 261*/ 5019, // Rule ID 16184 // 3074 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, 3075 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, 3076 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, 3077 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] 3078 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, 3079 GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i32immSExt8, 3080 // MIs[1] Operand 1 3081 // No operand predicates 3082 GIM_CheckIsSafeToFold, /*InsnID*/1, 3083 // (and:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] })<<P:Predicate_i32immSExt8>>:$src2) => (AND32ri8:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] })<<P:Predicate_i32immSExt8>>:$src2) 3084 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::AND32ri8, 3085 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 3086 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 3087 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 3088 GIR_EraseFromParent, /*InsnID*/0, 3089 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 3090 // GIR_Coverage, 16184, 3091 GIR_Done, 3092 // Label 261: @5019 3093 GIM_Try, /*On fail goto*//*Label 262*/ 5061, // Rule ID 16182 // 3094 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, 3095 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, 3096 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, 3097 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] 3098 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, 3099 // MIs[1] Operand 1 3100 // No operand predicates 3101 GIM_CheckIsSafeToFold, /*InsnID*/1, 3102 // (and:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$src2) => (AND32ri:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$src2) 3103 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::AND32ri, 3104 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 3105 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 3106 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 3107 GIR_EraseFromParent, /*InsnID*/0, 3108 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 3109 // GIR_Coverage, 16182, 3110 GIR_Done, 3111 // Label 262: @5061 3112 GIM_Try, /*On fail goto*//*Label 263*/ 5122, // Rule ID 12283 // 3113 GIM_CheckFeatures, GIFBS_HasBMI, 3114 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, 3115 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, 3116 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] 3117 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR, 3118 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, 3119 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, 3120 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR32RegClassID, 3121 GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, 3122 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR32RegClassID, 3123 GIM_CheckIsSafeToFold, /*InsnID*/1, 3124 // (and:{ *:[i32] } (xor:{ *:[i32] } GR32:{ *:[i32] }:$src1, -1:{ *:[i32] }), GR32:{ *:[i32] }:$src2) => (ANDN32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) 3125 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ANDN32rr, 3126 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 3127 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1 3128 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src2 3129 GIR_EraseFromParent, /*InsnID*/0, 3130 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 3131 // GIR_Coverage, 12283, 3132 GIR_Done, 3133 // Label 263: @5122 3134 GIM_Try, /*On fail goto*//*Label 264*/ 5183, // Rule ID 18238 // 3135 GIM_CheckFeatures, GIFBS_HasBMI, 3136 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, 3137 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, 3138 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, 3139 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] 3140 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR, 3141 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, 3142 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, 3143 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR32RegClassID, 3144 GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, 3145 GIM_CheckIsSafeToFold, /*InsnID*/1, 3146 // (and:{ *:[i32] } GR32:{ *:[i32] }:$src2, (xor:{ *:[i32] } GR32:{ *:[i32] }:$src1, -1:{ *:[i32] })) => (ANDN32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) 3147 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ANDN32rr, 3148 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 3149 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1 3150 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src2 3151 GIR_EraseFromParent, /*InsnID*/0, 3152 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 3153 // GIR_Coverage, 18238, 3154 GIR_Done, 3155 // Label 264: @5183 3156 GIM_Try, /*On fail goto*//*Label 265*/ 5211, // Rule ID 16174 // 3157 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, 3158 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, 3159 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, 3160 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR32RegClassID, 3161 // (and:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) => (AND32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) 3162 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::AND32rr, 3163 GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS, 3164 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 3165 // GIR_Coverage, 16174, 3166 GIR_Done, 3167 // Label 265: @5211 3168 GIM_Reject, 3169 // Label 246: @5212 3170 GIM_Reject, 3171 // Label 224: @5213 3172 GIM_Try, /*On fail goto*//*Label 266*/ 6084, 3173 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, 3174 GIM_Try, /*On fail goto*//*Label 267*/ 5294, // Rule ID 18225 // 3175 GIM_CheckFeatures, GIFBS_HasTBM, 3176 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, 3177 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, 3178 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] 3179 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD, 3180 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, 3181 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, 3182 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR64RegClassID, 3183 GIM_CheckConstantInt, /*MI*/1, /*Op*/2, 1, 3184 GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2] 3185 GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_XOR, 3186 GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s64, 3187 // MIs[2] src 3188 GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1, 3189 GIM_CheckConstantInt, /*MI*/2, /*Op*/2, -1, 3190 GIM_CheckIsSafeToFold, /*InsnID*/1, 3191 GIM_CheckIsSafeToFold, /*InsnID*/2, 3192 // (and:{ *:[i64] } (add:{ *:[i64] } GR64:{ *:[i64] }:$src, 1:{ *:[i64] }), (xor:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] })) => (BLCIC64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) 3193 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCIC64rr, 3194 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 3195 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src 3196 GIR_EraseFromParent, /*InsnID*/0, 3197 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 3198 // GIR_Coverage, 18225, 3199 GIR_Done, 3200 // Label 267: @5294 3201 GIM_Try, /*On fail goto*//*Label 268*/ 5369, // Rule ID 18237 // 3202 GIM_CheckFeatures, GIFBS_HasTBM, 3203 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, 3204 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, 3205 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] 3206 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD, 3207 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, 3208 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, 3209 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR64RegClassID, 3210 GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, 3211 GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2] 3212 GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_XOR, 3213 GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s64, 3214 // MIs[2] src 3215 GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1, 3216 GIM_CheckConstantInt, /*MI*/2, /*Op*/2, -1, 3217 GIM_CheckIsSafeToFold, /*InsnID*/1, 3218 GIM_CheckIsSafeToFold, /*InsnID*/2, 3219 // (and:{ *:[i64] } (add:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] }), (xor:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] })) => (TZMSK64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) 3220 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::TZMSK64rr, 3221 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 3222 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src 3223 GIR_EraseFromParent, /*InsnID*/0, 3224 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 3225 // GIR_Coverage, 18237, 3226 GIR_Done, 3227 // Label 268: @5369 3228 GIM_Try, /*On fail goto*//*Label 269*/ 5444, // Rule ID 12270 // 3229 GIM_CheckFeatures, GIFBS_HasTBM, 3230 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, 3231 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, 3232 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] 3233 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR, 3234 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, 3235 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, 3236 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR64RegClassID, 3237 GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, 3238 GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2] 3239 GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ADD, 3240 GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s64, 3241 // MIs[2] src 3242 GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1, 3243 GIM_CheckConstantInt, /*MI*/2, /*Op*/2, 1, 3244 GIM_CheckIsSafeToFold, /*InsnID*/1, 3245 GIM_CheckIsSafeToFold, /*InsnID*/2, 3246 // (and:{ *:[i64] } (xor:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] }), (add:{ *:[i64] } GR64:{ *:[i64] }:$src, 1:{ *:[i64] })) => (BLCIC64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) 3247 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCIC64rr, 3248 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 3249 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src 3250 GIR_EraseFromParent, /*InsnID*/0, 3251 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 3252 // GIR_Coverage, 12270, 3253 GIR_Done, 3254 // Label 269: @5444 3255 GIM_Try, /*On fail goto*//*Label 270*/ 5519, // Rule ID 12282 // 3256 GIM_CheckFeatures, GIFBS_HasTBM, 3257 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, 3258 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, 3259 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] 3260 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR, 3261 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, 3262 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, 3263 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR64RegClassID, 3264 GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, 3265 GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2] 3266 GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ADD, 3267 GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s64, 3268 // MIs[2] src 3269 GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1, 3270 GIM_CheckConstantInt, /*MI*/2, /*Op*/2, -1, 3271 GIM_CheckIsSafeToFold, /*InsnID*/1, 3272 GIM_CheckIsSafeToFold, /*InsnID*/2, 3273 // (and:{ *:[i64] } (xor:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] }), (add:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] })) => (TZMSK64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) 3274 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::TZMSK64rr, 3275 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 3276 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src 3277 GIR_EraseFromParent, /*InsnID*/0, 3278 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 3279 // GIR_Coverage, 12282, 3280 GIR_Done, 3281 // Label 270: @5519 3282 GIM_Try, /*On fail goto*//*Label 271*/ 5573, // Rule ID 18219 // 3283 GIM_CheckFeatures, GIFBS_HasTBM, 3284 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, 3285 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] 3286 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD, 3287 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, 3288 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, 3289 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR64RegClassID, 3290 GIM_CheckConstantInt, /*MI*/1, /*Op*/2, 1, 3291 // MIs[0] src 3292 GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/1, 3293 GIM_CheckIsSafeToFold, /*InsnID*/1, 3294 // (and:{ *:[i64] } (add:{ *:[i64] } GR64:{ *:[i64] }:$src, 1:{ *:[i64] }), GR64:{ *:[i64] }:$src) => (BLCFILL64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) 3295 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCFILL64rr, 3296 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 3297 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src 3298 GIR_EraseFromParent, /*InsnID*/0, 3299 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 3300 // GIR_Coverage, 18219, 3301 GIR_Done, 3302 // Label 271: @5573 3303 GIM_Try, /*On fail goto*//*Label 272*/ 5627, // Rule ID 18729 // 3304 GIM_CheckFeatures, GIFBS_HasBMI, 3305 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, 3306 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] 3307 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD, 3308 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, 3309 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, 3310 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR64RegClassID, 3311 GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, 3312 // MIs[0] src 3313 GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/1, 3314 GIM_CheckIsSafeToFold, /*InsnID*/1, 3315 // (and:{ *:[i64] } (add:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] }), GR64:{ *:[i64] }:$src) => (BLSR64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) 3316 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLSR64rr, 3317 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 3318 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src 3319 GIR_EraseFromParent, /*InsnID*/0, 3320 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 3321 // GIR_Coverage, 18729, 3322 GIR_Done, 3323 // Label 272: @5627 3324 GIM_Try, /*On fail goto*//*Label 273*/ 5681, // Rule ID 18733 // 3325 GIM_CheckFeatures, GIFBS_HasBMI, 3326 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, 3327 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] 3328 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SUB, 3329 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, 3330 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, 3331 GIM_CheckConstantInt, /*MI*/1, /*Op*/1, 0, 3332 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/X86::GR64RegClassID, 3333 // MIs[0] src 3334 GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/2, 3335 GIM_CheckIsSafeToFold, /*InsnID*/1, 3336 // (and:{ *:[i64] } (sub:{ *:[i64] } 0:{ *:[i64] }, GR64:{ *:[i64] }:$src), GR64:{ *:[i64] }:$src) => (BLSI64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) 3337 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLSI64rr, 3338 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 3339 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src 3340 GIR_EraseFromParent, /*InsnID*/0, 3341 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 3342 // GIR_Coverage, 18733, 3343 GIR_Done, 3344 // Label 273: @5681 3345 GIM_Try, /*On fail goto*//*Label 274*/ 5735, // Rule ID 12264 // 3346 GIM_CheckFeatures, GIFBS_HasTBM, 3347 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, 3348 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, 3349 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, 3350 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] 3351 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD, 3352 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, 3353 // MIs[1] src 3354 GIM_CheckIsSameOperand, /*MI*/1, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1, 3355 GIM_CheckConstantInt, /*MI*/1, /*Op*/2, 1, 3356 GIM_CheckIsSafeToFold, /*InsnID*/1, 3357 // (and:{ *:[i64] } GR64:{ *:[i64] }:$src, (add:{ *:[i64] } GR64:{ *:[i64] }:$src, 1:{ *:[i64] })) => (BLCFILL64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) 3358 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCFILL64rr, 3359 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 3360 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 3361 GIR_EraseFromParent, /*InsnID*/0, 3362 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 3363 // GIR_Coverage, 12264, 3364 GIR_Done, 3365 // Label 274: @5735 3366 GIM_Try, /*On fail goto*//*Label 275*/ 5789, // Rule ID 16452 // 3367 GIM_CheckFeatures, GIFBS_HasBMI, 3368 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, 3369 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, 3370 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, 3371 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] 3372 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD, 3373 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, 3374 // MIs[1] src 3375 GIM_CheckIsSameOperand, /*MI*/1, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1, 3376 GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, 3377 GIM_CheckIsSafeToFold, /*InsnID*/1, 3378 // (and:{ *:[i64] } GR64:{ *:[i64] }:$src, (add:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] })) => (BLSR64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) 3379 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLSR64rr, 3380 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 3381 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 3382 GIR_EraseFromParent, /*InsnID*/0, 3383 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 3384 // GIR_Coverage, 16452, 3385 GIR_Done, 3386 // Label 275: @5789 3387 GIM_Try, /*On fail goto*//*Label 276*/ 5843, // Rule ID 16456 // 3388 GIM_CheckFeatures, GIFBS_HasBMI, 3389 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, 3390 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, 3391 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, 3392 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] 3393 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SUB, 3394 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, 3395 GIM_CheckConstantInt, /*MI*/1, /*Op*/1, 0, 3396 // MIs[1] src 3397 GIM_CheckIsSameOperand, /*MI*/1, /*OpIdx*/2, /*OtherMI*/0, /*OtherOpIdx*/1, 3398 GIM_CheckIsSafeToFold, /*InsnID*/1, 3399 // (and:{ *:[i64] } GR64:{ *:[i64] }:$src, (sub:{ *:[i64] } 0:{ *:[i64] }, GR64:{ *:[i64] }:$src)) => (BLSI64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) 3400 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLSI64rr, 3401 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 3402 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 3403 GIR_EraseFromParent, /*InsnID*/0, 3404 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 3405 // GIR_Coverage, 16456, 3406 GIR_Done, 3407 // Label 276: @5843 3408 GIM_Try, /*On fail goto*//*Label 277*/ 5888, // Rule ID 16185 // 3409 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, 3410 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, 3411 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, 3412 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] 3413 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, 3414 GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i64immSExt8, 3415 // MIs[1] Operand 1 3416 // No operand predicates 3417 GIM_CheckIsSafeToFold, /*InsnID*/1, 3418 // (and:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt8>>:$src2) => (AND64ri8:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt8>>:$src2) 3419 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::AND64ri8, 3420 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 3421 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 3422 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 3423 GIR_EraseFromParent, /*InsnID*/0, 3424 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 3425 // GIR_Coverage, 16185, 3426 GIR_Done, 3427 // Label 277: @5888 3428 GIM_Try, /*On fail goto*//*Label 278*/ 5933, // Rule ID 16186 // 3429 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, 3430 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, 3431 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, 3432 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] 3433 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, 3434 GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i64immSExt32, 3435 // MIs[1] Operand 1 3436 // No operand predicates 3437 GIM_CheckIsSafeToFold, /*InsnID*/1, 3438 // (and:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt32>>:$src2) => (AND64ri32:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt32>>:$src2) 3439 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::AND64ri32, 3440 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 3441 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 3442 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 3443 GIR_EraseFromParent, /*InsnID*/0, 3444 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 3445 // GIR_Coverage, 16186, 3446 GIR_Done, 3447 // Label 278: @5933 3448 GIM_Try, /*On fail goto*//*Label 279*/ 5994, // Rule ID 12284 // 3449 GIM_CheckFeatures, GIFBS_HasBMI, 3450 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, 3451 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, 3452 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] 3453 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR, 3454 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, 3455 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, 3456 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR64RegClassID, 3457 GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, 3458 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR64RegClassID, 3459 GIM_CheckIsSafeToFold, /*InsnID*/1, 3460 // (and:{ *:[i64] } (xor:{ *:[i64] } GR64:{ *:[i64] }:$src1, -1:{ *:[i64] }), GR64:{ *:[i64] }:$src2) => (ANDN64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) 3461 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ANDN64rr, 3462 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 3463 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1 3464 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src2 3465 GIR_EraseFromParent, /*InsnID*/0, 3466 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 3467 // GIR_Coverage, 12284, 3468 GIR_Done, 3469 // Label 279: @5994 3470 GIM_Try, /*On fail goto*//*Label 280*/ 6055, // Rule ID 18239 // 3471 GIM_CheckFeatures, GIFBS_HasBMI, 3472 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, 3473 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, 3474 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, 3475 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] 3476 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR, 3477 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, 3478 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, 3479 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR64RegClassID, 3480 GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, 3481 GIM_CheckIsSafeToFold, /*InsnID*/1, 3482 // (and:{ *:[i64] } GR64:{ *:[i64] }:$src2, (xor:{ *:[i64] } GR64:{ *:[i64] }:$src1, -1:{ *:[i64] })) => (ANDN64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) 3483 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ANDN64rr, 3484 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 3485 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1 3486 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src2 3487 GIR_EraseFromParent, /*InsnID*/0, 3488 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 3489 // GIR_Coverage, 18239, 3490 GIR_Done, 3491 // Label 280: @6055 3492 GIM_Try, /*On fail goto*//*Label 281*/ 6083, // Rule ID 16175 // 3493 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, 3494 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, 3495 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, 3496 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR64RegClassID, 3497 // (and:{ *:[i64] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) => (AND64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) 3498 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::AND64rr, 3499 GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS, 3500 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 3501 // GIR_Coverage, 16175, 3502 GIR_Done, 3503 // Label 281: @6083 3504 GIM_Reject, 3505 // Label 266: @6084 3506 GIM_Reject, 3507 // Label 225: @6085 3508 GIM_Try, /*On fail goto*//*Label 282*/ 6177, // Rule ID 13771 // 3509 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s1, 3510 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s1, 3511 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK1RegClassID, 3512 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK2RegClassID, 3513 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK2RegClassID, 3514 // (and:{ *:[v2i1] } VK2:{ *:[v2i1] }:$src1, VK2:{ *:[v2i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v2i1] } (KANDWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK2:{ *:[v2i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK2:{ *:[v2i1] }:$src2, VK16:{ *:[i32] })), VK1:{ *:[i32] }) 3515 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, 3516 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, 3517 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1, 3518 GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::COPY, 3519 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, 3520 GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2 3521 GIR_ConstrainSelectedInstOperands, /*InsnID*/3, 3522 GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::COPY, 3523 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, 3524 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1 3525 GIR_ConstrainSelectedInstOperands, /*InsnID*/2, 3526 GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::KANDWrr, 3527 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, 3528 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, 3529 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/2, /*TempRegFlags*/0, 3530 GIR_ConstrainSelectedInstOperands, /*InsnID*/1, 3531 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 3532 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 3533 GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, 3534 GIR_EraseFromParent, /*InsnID*/0, 3535 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VK1*/8, 3536 // GIR_Coverage, 13771, 3537 GIR_Done, 3538 // Label 282: @6177 3539 GIM_Reject, 3540 // Label 226: @6178 3541 GIM_Try, /*On fail goto*//*Label 283*/ 6258, 3542 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64, 3543 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, 3544 GIM_Try, /*On fail goto*//*Label 284*/ 6211, // Rule ID 1545 // 3545 GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, 3546 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 3547 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, 3548 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 3549 // (and:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (VPANDrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) 3550 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPANDrr, 3551 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 3552 // GIR_Coverage, 1545, 3553 GIR_Done, 3554 // Label 284: @6211 3555 GIM_Try, /*On fail goto*//*Label 285*/ 6234, // Rule ID 1547 // 3556 GIM_CheckFeatures, GIFBS_UseSSE2, 3557 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 3558 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, 3559 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 3560 // (and:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (PANDrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) 3561 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PANDrr, 3562 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 3563 // GIR_Coverage, 1547, 3564 GIR_Done, 3565 // Label 285: @6234 3566 GIM_Try, /*On fail goto*//*Label 286*/ 6257, // Rule ID 4890 // 3567 GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, 3568 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, 3569 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, 3570 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, 3571 // (and:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (VPANDQZ128rr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) 3572 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPANDQZ128rr, 3573 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 3574 // GIR_Coverage, 4890, 3575 GIR_Done, 3576 // Label 286: @6257 3577 GIM_Reject, 3578 // Label 283: @6258 3579 GIM_Reject, 3580 // Label 227: @6259 3581 GIM_Try, /*On fail goto*//*Label 287*/ 6351, // Rule ID 13772 // 3582 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s1, 3583 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s1, 3584 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK1RegClassID, 3585 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK4RegClassID, 3586 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK4RegClassID, 3587 // (and:{ *:[v4i1] } VK4:{ *:[v4i1] }:$src1, VK4:{ *:[v4i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v4i1] } (KANDWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK4:{ *:[v4i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK4:{ *:[v4i1] }:$src2, VK16:{ *:[i32] })), VK1:{ *:[i32] }) 3588 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, 3589 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, 3590 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1, 3591 GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::COPY, 3592 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, 3593 GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2 3594 GIR_ConstrainSelectedInstOperands, /*InsnID*/3, 3595 GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::COPY, 3596 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, 3597 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1 3598 GIR_ConstrainSelectedInstOperands, /*InsnID*/2, 3599 GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::KANDWrr, 3600 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, 3601 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, 3602 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/2, /*TempRegFlags*/0, 3603 GIR_ConstrainSelectedInstOperands, /*InsnID*/1, 3604 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 3605 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 3606 GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, 3607 GIR_EraseFromParent, /*InsnID*/0, 3608 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VK1*/8, 3609 // GIR_Coverage, 13772, 3610 GIR_Done, 3611 // Label 287: @6351 3612 GIM_Reject, 3613 // Label 228: @6352 3614 GIM_Try, /*On fail goto*//*Label 288*/ 6432, 3615 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64, 3616 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64, 3617 GIM_Try, /*On fail goto*//*Label 289*/ 6385, // Rule ID 1549 // 3618 GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX, 3619 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, 3620 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, 3621 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, 3622 // (and:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) => (VPANDYrr:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) 3623 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPANDYrr, 3624 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 3625 // GIR_Coverage, 1549, 3626 GIR_Done, 3627 // Label 289: @6385 3628 GIM_Try, /*On fail goto*//*Label 290*/ 6408, // Rule ID 4881 // 3629 GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, 3630 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, 3631 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, 3632 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, 3633 // (and:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) => (VPANDQZ256rr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) 3634 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPANDQZ256rr, 3635 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 3636 // GIR_Coverage, 4881, 3637 GIR_Done, 3638 // Label 290: @6408 3639 GIM_Try, /*On fail goto*//*Label 291*/ 6431, // Rule ID 12544 // 3640 GIM_CheckFeatures, GIFBS_HasAVX1Only, 3641 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, 3642 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, 3643 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, 3644 // (and:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) => (VANDPSYrr:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) 3645 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VANDPSYrr, 3646 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 3647 // GIR_Coverage, 12544, 3648 GIR_Done, 3649 // Label 291: @6431 3650 GIM_Reject, 3651 // Label 288: @6432 3652 GIM_Reject, 3653 // Label 229: @6433 3654 GIM_Try, /*On fail goto*//*Label 292*/ 6541, 3655 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s1, 3656 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s1, 3657 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK8RegClassID, 3658 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK8RegClassID, 3659 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK8RegClassID, 3660 GIM_Try, /*On fail goto*//*Label 293*/ 6466, // Rule ID 3605 // 3661 GIM_CheckFeatures, GIFBS_HasDQI, 3662 // (and:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src1, VK8:{ *:[v8i1] }:$src2) => (KANDBrr:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src1, VK8:{ *:[v8i1] }:$src2) 3663 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::KANDBrr, 3664 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 3665 // GIR_Coverage, 3605, 3666 GIR_Done, 3667 // Label 293: @6466 3668 GIM_Try, /*On fail goto*//*Label 294*/ 6540, // Rule ID 13769 // 3669 GIM_CheckFeatures, GIFBS_NoDQI, 3670 // (and:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src1, VK8:{ *:[v8i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v8i1] } (KANDWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK8:{ *:[v8i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK8:{ *:[v8i1] }:$src2, VK16:{ *:[i32] })), VK8:{ *:[i32] }) 3671 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, 3672 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, 3673 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1, 3674 GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::COPY, 3675 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, 3676 GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2 3677 GIR_ConstrainSelectedInstOperands, /*InsnID*/3, 3678 GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::COPY, 3679 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, 3680 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1 3681 GIR_ConstrainSelectedInstOperands, /*InsnID*/2, 3682 GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::KANDWrr, 3683 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, 3684 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, 3685 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/2, /*TempRegFlags*/0, 3686 GIR_ConstrainSelectedInstOperands, /*InsnID*/1, 3687 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 3688 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 3689 GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, 3690 GIR_EraseFromParent, /*InsnID*/0, 3691 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VK8*/12, 3692 // GIR_Coverage, 13769, 3693 GIR_Done, 3694 // Label 294: @6540 3695 GIM_Reject, 3696 // Label 292: @6541 3697 GIM_Reject, 3698 // Label 230: @6542 3699 GIM_Try, /*On fail goto*//*Label 295*/ 6573, // Rule ID 4872 // 3700 GIM_CheckFeatures, GIFBS_HasAVX512, 3701 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64, 3702 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s64, 3703 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, 3704 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, 3705 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, 3706 // (and:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) => (VPANDQZrr:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) 3707 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPANDQZrr, 3708 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 3709 // GIR_Coverage, 4872, 3710 GIR_Done, 3711 // Label 295: @6573 3712 GIM_Reject, 3713 // Label 231: @6574 3714 GIM_Try, /*On fail goto*//*Label 296*/ 6605, // Rule ID 3606 // 3715 GIM_CheckFeatures, GIFBS_HasAVX512, 3716 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s1, 3717 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s1, 3718 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK16RegClassID, 3719 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK16RegClassID, 3720 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK16RegClassID, 3721 // (and:{ *:[v16i1] } VK16:{ *:[v16i1] }:$src1, VK16:{ *:[v16i1] }:$src2) => (KANDWrr:{ *:[v16i1] } VK16:{ *:[v16i1] }:$src1, VK16:{ *:[v16i1] }:$src2) 3722 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::KANDWrr, 3723 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 3724 // GIR_Coverage, 3606, 3725 GIR_Done, 3726 // Label 296: @6605 3727 GIM_Reject, 3728 // Label 232: @6606 3729 GIM_Try, /*On fail goto*//*Label 297*/ 6637, // Rule ID 3607 // 3730 GIM_CheckFeatures, GIFBS_HasBWI, 3731 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s1, 3732 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s1, 3733 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK32RegClassID, 3734 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK32RegClassID, 3735 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK32RegClassID, 3736 // (and:{ *:[v32i1] } VK32:{ *:[v32i1] }:$src1, VK32:{ *:[v32i1] }:$src2) => (KANDDrr:{ *:[v32i1] } VK32:{ *:[v32i1] }:$src1, VK32:{ *:[v32i1] }:$src2) 3737 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::KANDDrr, 3738 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 3739 // GIR_Coverage, 3607, 3740 GIR_Done, 3741 // Label 297: @6637 3742 GIM_Reject, 3743 // Label 233: @6638 3744 GIM_Try, /*On fail goto*//*Label 298*/ 6669, // Rule ID 3608 // 3745 GIM_CheckFeatures, GIFBS_HasBWI, 3746 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v64s1, 3747 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v64s1, 3748 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK64RegClassID, 3749 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK64RegClassID, 3750 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK64RegClassID, 3751 // (and:{ *:[v64i1] } VK64:{ *:[v64i1] }:$src1, VK64:{ *:[v64i1] }:$src2) => (KANDQrr:{ *:[v64i1] } VK64:{ *:[v64i1] }:$src1, VK64:{ *:[v64i1] }:$src2) 3752 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::KANDQrr, 3753 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 3754 // GIR_Coverage, 3608, 3755 GIR_Done, 3756 // Label 298: @6669 3757 GIM_Reject, 3758 // Label 234: @6670 3759 GIM_Reject, 3760 // Label 4: @6671 3761 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/0, 24, /*)*//*default:*//*Label 313*/ 9341, 3762 /*GILLT_s1*//*Label 299*/ 6701, 3763 /*GILLT_s8*//*Label 300*/ 6794, 3764 /*GILLT_s16*//*Label 301*/ 6860, 3765 /*GILLT_s32*//*Label 302*/ 6959, 3766 /*GILLT_s64*//*Label 303*/ 7856, 0, 0, 3767 /*GILLT_v2s1*//*Label 304*/ 8756, 3768 /*GILLT_v2s64*//*Label 305*/ 8849, 3769 /*GILLT_v4s1*//*Label 306*/ 8930, 0, 3770 /*GILLT_v4s64*//*Label 307*/ 9023, 3771 /*GILLT_v8s1*//*Label 308*/ 9104, 0, 0, 3772 /*GILLT_v8s64*//*Label 309*/ 9213, 3773 /*GILLT_v16s1*//*Label 310*/ 9245, 0, 0, 0, 3774 /*GILLT_v32s1*//*Label 311*/ 9277, 0, 0, 3775 /*GILLT_v64s1*//*Label 312*/ 9309, 3776 // Label 299: @6701 3777 GIM_Try, /*On fail goto*//*Label 314*/ 6793, // Rule ID 13778 // 3778 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s1, 3779 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s1, 3780 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK1RegClassID, 3781 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK1RegClassID, 3782 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK1RegClassID, 3783 // (or:{ *:[v1i1] } VK1:{ *:[v1i1] }:$src1, VK1:{ *:[v1i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v1i1] } (KORWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK1:{ *:[v1i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK1:{ *:[v1i1] }:$src2, VK16:{ *:[i32] })), VK1:{ *:[i32] }) 3784 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, 3785 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, 3786 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1, 3787 GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::COPY, 3788 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, 3789 GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2 3790 GIR_ConstrainSelectedInstOperands, /*InsnID*/3, 3791 GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::COPY, 3792 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, 3793 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1 3794 GIR_ConstrainSelectedInstOperands, /*InsnID*/2, 3795 GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::KORWrr, 3796 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, 3797 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, 3798 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/2, /*TempRegFlags*/0, 3799 GIR_ConstrainSelectedInstOperands, /*InsnID*/1, 3800 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 3801 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 3802 GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, 3803 GIR_EraseFromParent, /*InsnID*/0, 3804 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VK1*/8, 3805 // GIR_Coverage, 13778, 3806 GIR_Done, 3807 // Label 314: @6793 3808 GIM_Reject, 3809 // Label 300: @6794 3810 GIM_Try, /*On fail goto*//*Label 315*/ 6859, 3811 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s8, 3812 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8, 3813 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR8RegClassID, 3814 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR8RegClassID, 3815 GIM_Try, /*On fail goto*//*Label 316*/ 6842, // Rule ID 16150 // 3816 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] 3817 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, 3818 // MIs[1] Operand 1 3819 // No operand predicates 3820 GIM_CheckIsSafeToFold, /*InsnID*/1, 3821 // (or:{ *:[i8] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) => (OR8ri:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) 3822 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::OR8ri, 3823 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 3824 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 3825 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 3826 GIR_EraseFromParent, /*InsnID*/0, 3827 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 3828 // GIR_Coverage, 16150, 3829 GIR_Done, 3830 // Label 316: @6842 3831 GIM_Try, /*On fail goto*//*Label 317*/ 6858, // Rule ID 16142 // 3832 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR8RegClassID, 3833 // (or:{ *:[i8] } GR8:{ *:[i8] }:$src1, GR8:{ *:[i8] }:$src2) => (OR8rr:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, GR8:{ *:[i8] }:$src2) 3834 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::OR8rr, 3835 GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS, 3836 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 3837 // GIR_Coverage, 16142, 3838 GIR_Done, 3839 // Label 317: @6858 3840 GIM_Reject, 3841 // Label 315: @6859 3842 GIM_Reject, 3843 // Label 301: @6860 3844 GIM_Try, /*On fail goto*//*Label 318*/ 6958, 3845 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16, 3846 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16, 3847 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR16RegClassID, 3848 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID, 3849 GIM_Try, /*On fail goto*//*Label 319*/ 6911, // Rule ID 16153 // 3850 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] 3851 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, 3852 GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i16immSExt8, 3853 // MIs[1] Operand 1 3854 // No operand predicates 3855 GIM_CheckIsSafeToFold, /*InsnID*/1, 3856 // (or:{ *:[i16] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] })<<P:Predicate_i16immSExt8>>:$src2) => (OR16ri8:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] })<<P:Predicate_i16immSExt8>>:$src2) 3857 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::OR16ri8, 3858 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 3859 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 3860 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 3861 GIR_EraseFromParent, /*InsnID*/0, 3862 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 3863 // GIR_Coverage, 16153, 3864 GIR_Done, 3865 // Label 319: @6911 3866 GIM_Try, /*On fail goto*//*Label 320*/ 6941, // Rule ID 16151 // 3867 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] 3868 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, 3869 // MIs[1] Operand 1 3870 // No operand predicates 3871 GIM_CheckIsSafeToFold, /*InsnID*/1, 3872 // (or:{ *:[i16] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] }):$src2) => (OR16ri:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] }):$src2) 3873 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::OR16ri, 3874 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 3875 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 3876 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 3877 GIR_EraseFromParent, /*InsnID*/0, 3878 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 3879 // GIR_Coverage, 16151, 3880 GIR_Done, 3881 // Label 320: @6941 3882 GIM_Try, /*On fail goto*//*Label 321*/ 6957, // Rule ID 16143 // 3883 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR16RegClassID, 3884 // (or:{ *:[i16] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2) => (OR16rr:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2) 3885 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::OR16rr, 3886 GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS, 3887 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 3888 // GIR_Coverage, 16143, 3889 GIR_Done, 3890 // Label 321: @6957 3891 GIM_Reject, 3892 // Label 318: @6958 3893 GIM_Reject, 3894 // Label 302: @6959 3895 GIM_Try, /*On fail goto*//*Label 322*/ 7855, 3896 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, 3897 GIM_Try, /*On fail goto*//*Label 323*/ 7040, // Rule ID 18232 // 3898 GIM_CheckFeatures, GIFBS_HasTBM, 3899 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, 3900 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, 3901 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] 3902 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD, 3903 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, 3904 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, 3905 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR32RegClassID, 3906 GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, 3907 GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2] 3908 GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_XOR, 3909 GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s32, 3910 // MIs[2] src 3911 GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1, 3912 GIM_CheckConstantInt, /*MI*/2, /*Op*/2, -1, 3913 GIM_CheckIsSafeToFold, /*InsnID*/1, 3914 GIM_CheckIsSafeToFold, /*InsnID*/2, 3915 // (or:{ *:[i32] } (add:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] }), (xor:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] })) => (BLSIC32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) 3916 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLSIC32rr, 3917 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 3918 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src 3919 GIR_EraseFromParent, /*InsnID*/0, 3920 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 3921 // GIR_Coverage, 18232, 3922 GIR_Done, 3923 // Label 323: @7040 3924 GIM_Try, /*On fail goto*//*Label 324*/ 7115, // Rule ID 18234 // 3925 GIM_CheckFeatures, GIFBS_HasTBM, 3926 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, 3927 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, 3928 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] 3929 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD, 3930 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, 3931 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, 3932 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR32RegClassID, 3933 GIM_CheckConstantInt, /*MI*/1, /*Op*/2, 1, 3934 GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2] 3935 GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_XOR, 3936 GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s32, 3937 // MIs[2] src 3938 GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1, 3939 GIM_CheckConstantInt, /*MI*/2, /*Op*/2, -1, 3940 GIM_CheckIsSafeToFold, /*InsnID*/1, 3941 GIM_CheckIsSafeToFold, /*InsnID*/2, 3942 // (or:{ *:[i32] } (add:{ *:[i32] } GR32:{ *:[i32] }:$src, 1:{ *:[i32] }), (xor:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] })) => (T1MSKC32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) 3943 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::T1MSKC32rr, 3944 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 3945 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src 3946 GIR_EraseFromParent, /*InsnID*/0, 3947 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 3948 // GIR_Coverage, 18234, 3949 GIR_Done, 3950 // Label 324: @7115 3951 GIM_Try, /*On fail goto*//*Label 325*/ 7190, // Rule ID 18220 // 3952 GIM_CheckFeatures, GIFBS_HasTBM, 3953 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, 3954 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] 3955 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR, 3956 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, 3957 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, 3958 GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2] 3959 GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ADD, 3960 GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s32, 3961 GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s32, 3962 GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/X86::GR32RegClassID, 3963 GIM_CheckConstantInt, /*MI*/2, /*Op*/2, 1, 3964 GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, 3965 // MIs[0] src 3966 GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1, 3967 GIM_CheckIsSafeToFold, /*InsnID*/1, 3968 GIM_CheckIsSafeToFold, /*InsnID*/2, 3969 // (or:{ *:[i32] } (xor:{ *:[i32] } (add:{ *:[i32] } GR32:{ *:[i32] }:$src, 1:{ *:[i32] }), -1:{ *:[i32] }), GR32:{ *:[i32] }:$src) => (BLCI32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) 3970 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCI32rr, 3971 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 3972 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // src 3973 GIR_EraseFromParent, /*InsnID*/0, 3974 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 3975 // GIR_Coverage, 18220, 3976 GIR_Done, 3977 // Label 325: @7190 3978 GIM_Try, /*On fail goto*//*Label 326*/ 7265, // Rule ID 12277 // 3979 GIM_CheckFeatures, GIFBS_HasTBM, 3980 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, 3981 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, 3982 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] 3983 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR, 3984 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, 3985 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, 3986 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR32RegClassID, 3987 GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, 3988 GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2] 3989 GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ADD, 3990 GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s32, 3991 // MIs[2] src 3992 GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1, 3993 GIM_CheckConstantInt, /*MI*/2, /*Op*/2, -1, 3994 GIM_CheckIsSafeToFold, /*InsnID*/1, 3995 GIM_CheckIsSafeToFold, /*InsnID*/2, 3996 // (or:{ *:[i32] } (xor:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] }), (add:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] })) => (BLSIC32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) 3997 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLSIC32rr, 3998 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 3999 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src 4000 GIR_EraseFromParent, /*InsnID*/0, 4001 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 4002 // GIR_Coverage, 12277, 4003 GIR_Done, 4004 // Label 326: @7265 4005 GIM_Try, /*On fail goto*//*Label 327*/ 7340, // Rule ID 12279 // 4006 GIM_CheckFeatures, GIFBS_HasTBM, 4007 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, 4008 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, 4009 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] 4010 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR, 4011 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, 4012 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, 4013 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR32RegClassID, 4014 GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, 4015 GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2] 4016 GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ADD, 4017 GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s32, 4018 // MIs[2] src 4019 GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1, 4020 GIM_CheckConstantInt, /*MI*/2, /*Op*/2, 1, 4021 GIM_CheckIsSafeToFold, /*InsnID*/1, 4022 GIM_CheckIsSafeToFold, /*InsnID*/2, 4023 // (or:{ *:[i32] } (xor:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] }), (add:{ *:[i32] } GR32:{ *:[i32] }:$src, 1:{ *:[i32] })) => (T1MSKC32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) 4024 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::T1MSKC32rr, 4025 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 4026 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src 4027 GIR_EraseFromParent, /*InsnID*/0, 4028 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 4029 // GIR_Coverage, 12279, 4030 GIR_Done, 4031 // Label 327: @7340 4032 GIM_Try, /*On fail goto*//*Label 328*/ 7415, // Rule ID 12265 // 4033 GIM_CheckFeatures, GIFBS_HasTBM, 4034 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, 4035 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, 4036 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, 4037 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] 4038 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR, 4039 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, 4040 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, 4041 GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2] 4042 GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ADD, 4043 GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s32, 4044 // MIs[2] src 4045 GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1, 4046 GIM_CheckConstantInt, /*MI*/2, /*Op*/2, 1, 4047 GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, 4048 GIM_CheckIsSafeToFold, /*InsnID*/1, 4049 GIM_CheckIsSafeToFold, /*InsnID*/2, 4050 // (or:{ *:[i32] } GR32:{ *:[i32] }:$src, (xor:{ *:[i32] } (add:{ *:[i32] } GR32:{ *:[i32] }:$src, 1:{ *:[i32] }), -1:{ *:[i32] })) => (BLCI32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) 4051 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCI32rr, 4052 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 4053 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 4054 GIR_EraseFromParent, /*InsnID*/0, 4055 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 4056 // GIR_Coverage, 12265, 4057 GIR_Done, 4058 // Label 328: @7415 4059 GIM_Try, /*On fail goto*//*Label 329*/ 7469, // Rule ID 18228 // 4060 GIM_CheckFeatures, GIFBS_HasTBM, 4061 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, 4062 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] 4063 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD, 4064 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, 4065 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, 4066 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR32RegClassID, 4067 GIM_CheckConstantInt, /*MI*/1, /*Op*/2, 1, 4068 // MIs[0] src 4069 GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/1, 4070 GIM_CheckIsSafeToFold, /*InsnID*/1, 4071 // (or:{ *:[i32] } (add:{ *:[i32] } GR32:{ *:[i32] }:$src, 1:{ *:[i32] }), GR32:{ *:[i32] }:$src) => (BLCS32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) 4072 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCS32rr, 4073 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 4074 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src 4075 GIR_EraseFromParent, /*InsnID*/0, 4076 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 4077 // GIR_Coverage, 18228, 4078 GIR_Done, 4079 // Label 329: @7469 4080 GIM_Try, /*On fail goto*//*Label 330*/ 7523, // Rule ID 18230 // 4081 GIM_CheckFeatures, GIFBS_HasTBM, 4082 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, 4083 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] 4084 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD, 4085 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, 4086 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, 4087 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR32RegClassID, 4088 GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, 4089 // MIs[0] src 4090 GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/1, 4091 GIM_CheckIsSafeToFold, /*InsnID*/1, 4092 // (or:{ *:[i32] } (add:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] }), GR32:{ *:[i32] }:$src) => (BLSFILL32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) 4093 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLSFILL32rr, 4094 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 4095 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src 4096 GIR_EraseFromParent, /*InsnID*/0, 4097 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 4098 // GIR_Coverage, 18230, 4099 GIR_Done, 4100 // Label 330: @7523 4101 GIM_Try, /*On fail goto*//*Label 331*/ 7577, // Rule ID 18222 // 4102 GIM_CheckFeatures, GIFBS_HasTBM, 4103 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, 4104 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] 4105 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SUB, 4106 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, 4107 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, 4108 GIM_CheckConstantInt, /*MI*/1, /*Op*/1, -2, 4109 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/X86::GR32RegClassID, 4110 // MIs[0] src 4111 GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/2, 4112 GIM_CheckIsSafeToFold, /*InsnID*/1, 4113 // (or:{ *:[i32] } (sub:{ *:[i32] } -2:{ *:[i32] }, GR32:{ *:[i32] }:$src), GR32:{ *:[i32] }:$src) => (BLCI32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) 4114 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCI32rr, 4115 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 4116 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src 4117 GIR_EraseFromParent, /*InsnID*/0, 4118 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 4119 // GIR_Coverage, 18222, 4120 GIR_Done, 4121 // Label 331: @7577 4122 GIM_Try, /*On fail goto*//*Label 332*/ 7631, // Rule ID 12273 // 4123 GIM_CheckFeatures, GIFBS_HasTBM, 4124 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, 4125 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, 4126 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, 4127 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] 4128 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD, 4129 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, 4130 // MIs[1] src 4131 GIM_CheckIsSameOperand, /*MI*/1, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1, 4132 GIM_CheckConstantInt, /*MI*/1, /*Op*/2, 1, 4133 GIM_CheckIsSafeToFold, /*InsnID*/1, 4134 // (or:{ *:[i32] } GR32:{ *:[i32] }:$src, (add:{ *:[i32] } GR32:{ *:[i32] }:$src, 1:{ *:[i32] })) => (BLCS32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) 4135 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCS32rr, 4136 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 4137 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 4138 GIR_EraseFromParent, /*InsnID*/0, 4139 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 4140 // GIR_Coverage, 12273, 4141 GIR_Done, 4142 // Label 332: @7631 4143 GIM_Try, /*On fail goto*//*Label 333*/ 7685, // Rule ID 12275 // 4144 GIM_CheckFeatures, GIFBS_HasTBM, 4145 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, 4146 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, 4147 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, 4148 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] 4149 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD, 4150 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, 4151 // MIs[1] src 4152 GIM_CheckIsSameOperand, /*MI*/1, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1, 4153 GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, 4154 GIM_CheckIsSafeToFold, /*InsnID*/1, 4155 // (or:{ *:[i32] } GR32:{ *:[i32] }:$src, (add:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] })) => (BLSFILL32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) 4156 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLSFILL32rr, 4157 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 4158 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 4159 GIR_EraseFromParent, /*InsnID*/0, 4160 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 4161 // GIR_Coverage, 12275, 4162 GIR_Done, 4163 // Label 333: @7685 4164 GIM_Try, /*On fail goto*//*Label 334*/ 7739, // Rule ID 12267 // 4165 GIM_CheckFeatures, GIFBS_HasTBM, 4166 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, 4167 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, 4168 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, 4169 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] 4170 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SUB, 4171 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, 4172 GIM_CheckConstantInt, /*MI*/1, /*Op*/1, -2, 4173 // MIs[1] src 4174 GIM_CheckIsSameOperand, /*MI*/1, /*OpIdx*/2, /*OtherMI*/0, /*OtherOpIdx*/1, 4175 GIM_CheckIsSafeToFold, /*InsnID*/1, 4176 // (or:{ *:[i32] } GR32:{ *:[i32] }:$src, (sub:{ *:[i32] } -2:{ *:[i32] }, GR32:{ *:[i32] }:$src)) => (BLCI32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) 4177 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCI32rr, 4178 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 4179 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 4180 GIR_EraseFromParent, /*InsnID*/0, 4181 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 4182 // GIR_Coverage, 12267, 4183 GIR_Done, 4184 // Label 334: @7739 4185 GIM_Try, /*On fail goto*//*Label 335*/ 7784, // Rule ID 16154 // 4186 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, 4187 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, 4188 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, 4189 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] 4190 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, 4191 GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i32immSExt8, 4192 // MIs[1] Operand 1 4193 // No operand predicates 4194 GIM_CheckIsSafeToFold, /*InsnID*/1, 4195 // (or:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] })<<P:Predicate_i32immSExt8>>:$src2) => (OR32ri8:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] })<<P:Predicate_i32immSExt8>>:$src2) 4196 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::OR32ri8, 4197 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 4198 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 4199 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 4200 GIR_EraseFromParent, /*InsnID*/0, 4201 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 4202 // GIR_Coverage, 16154, 4203 GIR_Done, 4204 // Label 335: @7784 4205 GIM_Try, /*On fail goto*//*Label 336*/ 7826, // Rule ID 16152 // 4206 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, 4207 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, 4208 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, 4209 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] 4210 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, 4211 // MIs[1] Operand 1 4212 // No operand predicates 4213 GIM_CheckIsSafeToFold, /*InsnID*/1, 4214 // (or:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$src2) => (OR32ri:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$src2) 4215 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::OR32ri, 4216 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 4217 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 4218 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 4219 GIR_EraseFromParent, /*InsnID*/0, 4220 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 4221 // GIR_Coverage, 16152, 4222 GIR_Done, 4223 // Label 336: @7826 4224 GIM_Try, /*On fail goto*//*Label 337*/ 7854, // Rule ID 16144 // 4225 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, 4226 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, 4227 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, 4228 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR32RegClassID, 4229 // (or:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) => (OR32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) 4230 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::OR32rr, 4231 GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS, 4232 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 4233 // GIR_Coverage, 16144, 4234 GIR_Done, 4235 // Label 337: @7854 4236 GIM_Reject, 4237 // Label 322: @7855 4238 GIM_Reject, 4239 // Label 303: @7856 4240 GIM_Try, /*On fail goto*//*Label 338*/ 8755, 4241 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, 4242 GIM_Try, /*On fail goto*//*Label 339*/ 7937, // Rule ID 18233 // 4243 GIM_CheckFeatures, GIFBS_HasTBM, 4244 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, 4245 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, 4246 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] 4247 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD, 4248 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, 4249 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, 4250 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR64RegClassID, 4251 GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, 4252 GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2] 4253 GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_XOR, 4254 GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s64, 4255 // MIs[2] src 4256 GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1, 4257 GIM_CheckConstantInt, /*MI*/2, /*Op*/2, -1, 4258 GIM_CheckIsSafeToFold, /*InsnID*/1, 4259 GIM_CheckIsSafeToFold, /*InsnID*/2, 4260 // (or:{ *:[i64] } (add:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] }), (xor:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] })) => (BLSIC64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) 4261 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLSIC64rr, 4262 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 4263 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src 4264 GIR_EraseFromParent, /*InsnID*/0, 4265 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 4266 // GIR_Coverage, 18233, 4267 GIR_Done, 4268 // Label 339: @7937 4269 GIM_Try, /*On fail goto*//*Label 340*/ 8012, // Rule ID 18235 // 4270 GIM_CheckFeatures, GIFBS_HasTBM, 4271 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, 4272 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, 4273 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] 4274 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD, 4275 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, 4276 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, 4277 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR64RegClassID, 4278 GIM_CheckConstantInt, /*MI*/1, /*Op*/2, 1, 4279 GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2] 4280 GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_XOR, 4281 GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s64, 4282 // MIs[2] src 4283 GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1, 4284 GIM_CheckConstantInt, /*MI*/2, /*Op*/2, -1, 4285 GIM_CheckIsSafeToFold, /*InsnID*/1, 4286 GIM_CheckIsSafeToFold, /*InsnID*/2, 4287 // (or:{ *:[i64] } (add:{ *:[i64] } GR64:{ *:[i64] }:$src, 1:{ *:[i64] }), (xor:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] })) => (T1MSKC64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) 4288 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::T1MSKC64rr, 4289 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 4290 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src 4291 GIR_EraseFromParent, /*InsnID*/0, 4292 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 4293 // GIR_Coverage, 18235, 4294 GIR_Done, 4295 // Label 340: @8012 4296 GIM_Try, /*On fail goto*//*Label 341*/ 8087, // Rule ID 18221 // 4297 GIM_CheckFeatures, GIFBS_HasTBM, 4298 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, 4299 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] 4300 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR, 4301 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, 4302 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, 4303 GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2] 4304 GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ADD, 4305 GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s64, 4306 GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s64, 4307 GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/X86::GR64RegClassID, 4308 GIM_CheckConstantInt, /*MI*/2, /*Op*/2, 1, 4309 GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, 4310 // MIs[0] src 4311 GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1, 4312 GIM_CheckIsSafeToFold, /*InsnID*/1, 4313 GIM_CheckIsSafeToFold, /*InsnID*/2, 4314 // (or:{ *:[i64] } (xor:{ *:[i64] } (add:{ *:[i64] } GR64:{ *:[i64] }:$src, 1:{ *:[i64] }), -1:{ *:[i64] }), GR64:{ *:[i64] }:$src) => (BLCI64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) 4315 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCI64rr, 4316 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 4317 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // src 4318 GIR_EraseFromParent, /*InsnID*/0, 4319 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 4320 // GIR_Coverage, 18221, 4321 GIR_Done, 4322 // Label 341: @8087 4323 GIM_Try, /*On fail goto*//*Label 342*/ 8162, // Rule ID 12278 // 4324 GIM_CheckFeatures, GIFBS_HasTBM, 4325 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, 4326 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, 4327 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] 4328 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR, 4329 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, 4330 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, 4331 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR64RegClassID, 4332 GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, 4333 GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2] 4334 GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ADD, 4335 GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s64, 4336 // MIs[2] src 4337 GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1, 4338 GIM_CheckConstantInt, /*MI*/2, /*Op*/2, -1, 4339 GIM_CheckIsSafeToFold, /*InsnID*/1, 4340 GIM_CheckIsSafeToFold, /*InsnID*/2, 4341 // (or:{ *:[i64] } (xor:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] }), (add:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] })) => (BLSIC64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) 4342 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLSIC64rr, 4343 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 4344 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src 4345 GIR_EraseFromParent, /*InsnID*/0, 4346 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 4347 // GIR_Coverage, 12278, 4348 GIR_Done, 4349 // Label 342: @8162 4350 GIM_Try, /*On fail goto*//*Label 343*/ 8237, // Rule ID 12280 // 4351 GIM_CheckFeatures, GIFBS_HasTBM, 4352 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, 4353 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, 4354 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] 4355 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR, 4356 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, 4357 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, 4358 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR64RegClassID, 4359 GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, 4360 GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2] 4361 GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ADD, 4362 GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s64, 4363 // MIs[2] src 4364 GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1, 4365 GIM_CheckConstantInt, /*MI*/2, /*Op*/2, 1, 4366 GIM_CheckIsSafeToFold, /*InsnID*/1, 4367 GIM_CheckIsSafeToFold, /*InsnID*/2, 4368 // (or:{ *:[i64] } (xor:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] }), (add:{ *:[i64] } GR64:{ *:[i64] }:$src, 1:{ *:[i64] })) => (T1MSKC64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) 4369 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::T1MSKC64rr, 4370 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 4371 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src 4372 GIR_EraseFromParent, /*InsnID*/0, 4373 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 4374 // GIR_Coverage, 12280, 4375 GIR_Done, 4376 // Label 343: @8237 4377 GIM_Try, /*On fail goto*//*Label 344*/ 8312, // Rule ID 12266 // 4378 GIM_CheckFeatures, GIFBS_HasTBM, 4379 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, 4380 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, 4381 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, 4382 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] 4383 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR, 4384 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, 4385 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, 4386 GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2] 4387 GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ADD, 4388 GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s64, 4389 // MIs[2] src 4390 GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1, 4391 GIM_CheckConstantInt, /*MI*/2, /*Op*/2, 1, 4392 GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, 4393 GIM_CheckIsSafeToFold, /*InsnID*/1, 4394 GIM_CheckIsSafeToFold, /*InsnID*/2, 4395 // (or:{ *:[i64] } GR64:{ *:[i64] }:$src, (xor:{ *:[i64] } (add:{ *:[i64] } GR64:{ *:[i64] }:$src, 1:{ *:[i64] }), -1:{ *:[i64] })) => (BLCI64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) 4396 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCI64rr, 4397 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 4398 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 4399 GIR_EraseFromParent, /*InsnID*/0, 4400 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 4401 // GIR_Coverage, 12266, 4402 GIR_Done, 4403 // Label 344: @8312 4404 GIM_Try, /*On fail goto*//*Label 345*/ 8366, // Rule ID 18229 // 4405 GIM_CheckFeatures, GIFBS_HasTBM, 4406 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, 4407 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] 4408 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD, 4409 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, 4410 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, 4411 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR64RegClassID, 4412 GIM_CheckConstantInt, /*MI*/1, /*Op*/2, 1, 4413 // MIs[0] src 4414 GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/1, 4415 GIM_CheckIsSafeToFold, /*InsnID*/1, 4416 // (or:{ *:[i64] } (add:{ *:[i64] } GR64:{ *:[i64] }:$src, 1:{ *:[i64] }), GR64:{ *:[i64] }:$src) => (BLCS64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) 4417 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCS64rr, 4418 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 4419 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src 4420 GIR_EraseFromParent, /*InsnID*/0, 4421 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 4422 // GIR_Coverage, 18229, 4423 GIR_Done, 4424 // Label 345: @8366 4425 GIM_Try, /*On fail goto*//*Label 346*/ 8420, // Rule ID 18231 // 4426 GIM_CheckFeatures, GIFBS_HasTBM, 4427 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, 4428 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] 4429 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD, 4430 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, 4431 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, 4432 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR64RegClassID, 4433 GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, 4434 // MIs[0] src 4435 GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/1, 4436 GIM_CheckIsSafeToFold, /*InsnID*/1, 4437 // (or:{ *:[i64] } (add:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] }), GR64:{ *:[i64] }:$src) => (BLSFILL64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) 4438 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLSFILL64rr, 4439 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 4440 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src 4441 GIR_EraseFromParent, /*InsnID*/0, 4442 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 4443 // GIR_Coverage, 18231, 4444 GIR_Done, 4445 // Label 346: @8420 4446 GIM_Try, /*On fail goto*//*Label 347*/ 8474, // Rule ID 18223 // 4447 GIM_CheckFeatures, GIFBS_HasTBM, 4448 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, 4449 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] 4450 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SUB, 4451 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, 4452 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, 4453 GIM_CheckConstantInt, /*MI*/1, /*Op*/1, -2, 4454 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/X86::GR64RegClassID, 4455 // MIs[0] src 4456 GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/2, 4457 GIM_CheckIsSafeToFold, /*InsnID*/1, 4458 // (or:{ *:[i64] } (sub:{ *:[i64] } -2:{ *:[i64] }, GR64:{ *:[i64] }:$src), GR64:{ *:[i64] }:$src) => (BLCI64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) 4459 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCI64rr, 4460 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 4461 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src 4462 GIR_EraseFromParent, /*InsnID*/0, 4463 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 4464 // GIR_Coverage, 18223, 4465 GIR_Done, 4466 // Label 347: @8474 4467 GIM_Try, /*On fail goto*//*Label 348*/ 8528, // Rule ID 12274 // 4468 GIM_CheckFeatures, GIFBS_HasTBM, 4469 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, 4470 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, 4471 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, 4472 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] 4473 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD, 4474 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, 4475 // MIs[1] src 4476 GIM_CheckIsSameOperand, /*MI*/1, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1, 4477 GIM_CheckConstantInt, /*MI*/1, /*Op*/2, 1, 4478 GIM_CheckIsSafeToFold, /*InsnID*/1, 4479 // (or:{ *:[i64] } GR64:{ *:[i64] }:$src, (add:{ *:[i64] } GR64:{ *:[i64] }:$src, 1:{ *:[i64] })) => (BLCS64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) 4480 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCS64rr, 4481 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 4482 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 4483 GIR_EraseFromParent, /*InsnID*/0, 4484 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 4485 // GIR_Coverage, 12274, 4486 GIR_Done, 4487 // Label 348: @8528 4488 GIM_Try, /*On fail goto*//*Label 349*/ 8582, // Rule ID 12276 // 4489 GIM_CheckFeatures, GIFBS_HasTBM, 4490 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, 4491 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, 4492 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, 4493 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] 4494 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD, 4495 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, 4496 // MIs[1] src 4497 GIM_CheckIsSameOperand, /*MI*/1, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1, 4498 GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, 4499 GIM_CheckIsSafeToFold, /*InsnID*/1, 4500 // (or:{ *:[i64] } GR64:{ *:[i64] }:$src, (add:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] })) => (BLSFILL64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) 4501 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLSFILL64rr, 4502 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 4503 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 4504 GIR_EraseFromParent, /*InsnID*/0, 4505 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 4506 // GIR_Coverage, 12276, 4507 GIR_Done, 4508 // Label 349: @8582 4509 GIM_Try, /*On fail goto*//*Label 350*/ 8636, // Rule ID 12268 // 4510 GIM_CheckFeatures, GIFBS_HasTBM, 4511 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, 4512 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, 4513 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, 4514 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] 4515 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SUB, 4516 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, 4517 GIM_CheckConstantInt, /*MI*/1, /*Op*/1, -2, 4518 // MIs[1] src 4519 GIM_CheckIsSameOperand, /*MI*/1, /*OpIdx*/2, /*OtherMI*/0, /*OtherOpIdx*/1, 4520 GIM_CheckIsSafeToFold, /*InsnID*/1, 4521 // (or:{ *:[i64] } GR64:{ *:[i64] }:$src, (sub:{ *:[i64] } -2:{ *:[i64] }, GR64:{ *:[i64] }:$src)) => (BLCI64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) 4522 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCI64rr, 4523 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 4524 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 4525 GIR_EraseFromParent, /*InsnID*/0, 4526 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 4527 // GIR_Coverage, 12268, 4528 GIR_Done, 4529 // Label 350: @8636 4530 GIM_Try, /*On fail goto*//*Label 351*/ 8681, // Rule ID 16155 // 4531 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, 4532 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, 4533 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, 4534 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] 4535 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, 4536 GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i64immSExt8, 4537 // MIs[1] Operand 1 4538 // No operand predicates 4539 GIM_CheckIsSafeToFold, /*InsnID*/1, 4540 // (or:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt8>>:$src2) => (OR64ri8:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt8>>:$src2) 4541 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::OR64ri8, 4542 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 4543 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 4544 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 4545 GIR_EraseFromParent, /*InsnID*/0, 4546 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 4547 // GIR_Coverage, 16155, 4548 GIR_Done, 4549 // Label 351: @8681 4550 GIM_Try, /*On fail goto*//*Label 352*/ 8726, // Rule ID 16156 // 4551 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, 4552 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, 4553 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, 4554 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] 4555 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, 4556 GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i64immSExt32, 4557 // MIs[1] Operand 1 4558 // No operand predicates 4559 GIM_CheckIsSafeToFold, /*InsnID*/1, 4560 // (or:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt32>>:$src2) => (OR64ri32:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt32>>:$src2) 4561 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::OR64ri32, 4562 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 4563 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 4564 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 4565 GIR_EraseFromParent, /*InsnID*/0, 4566 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 4567 // GIR_Coverage, 16156, 4568 GIR_Done, 4569 // Label 352: @8726 4570 GIM_Try, /*On fail goto*//*Label 353*/ 8754, // Rule ID 16145 // 4571 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, 4572 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, 4573 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, 4574 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR64RegClassID, 4575 // (or:{ *:[i64] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) => (OR64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) 4576 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::OR64rr, 4577 GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS, 4578 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 4579 // GIR_Coverage, 16145, 4580 GIR_Done, 4581 // Label 353: @8754 4582 GIM_Reject, 4583 // Label 338: @8755 4584 GIM_Reject, 4585 // Label 304: @8756 4586 GIM_Try, /*On fail goto*//*Label 354*/ 8848, // Rule ID 13779 // 4587 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s1, 4588 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s1, 4589 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK1RegClassID, 4590 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK2RegClassID, 4591 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK2RegClassID, 4592 // (or:{ *:[v2i1] } VK2:{ *:[v2i1] }:$src1, VK2:{ *:[v2i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v2i1] } (KORWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK2:{ *:[v2i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK2:{ *:[v2i1] }:$src2, VK16:{ *:[i32] })), VK1:{ *:[i32] }) 4593 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, 4594 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, 4595 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1, 4596 GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::COPY, 4597 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, 4598 GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2 4599 GIR_ConstrainSelectedInstOperands, /*InsnID*/3, 4600 GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::COPY, 4601 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, 4602 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1 4603 GIR_ConstrainSelectedInstOperands, /*InsnID*/2, 4604 GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::KORWrr, 4605 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, 4606 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, 4607 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/2, /*TempRegFlags*/0, 4608 GIR_ConstrainSelectedInstOperands, /*InsnID*/1, 4609 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 4610 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 4611 GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, 4612 GIR_EraseFromParent, /*InsnID*/0, 4613 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VK1*/8, 4614 // GIR_Coverage, 13779, 4615 GIR_Done, 4616 // Label 354: @8848 4617 GIM_Reject, 4618 // Label 305: @8849 4619 GIM_Try, /*On fail goto*//*Label 355*/ 8929, 4620 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64, 4621 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, 4622 GIM_Try, /*On fail goto*//*Label 356*/ 8882, // Rule ID 1551 // 4623 GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, 4624 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 4625 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, 4626 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 4627 // (or:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (VPORrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) 4628 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPORrr, 4629 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 4630 // GIR_Coverage, 1551, 4631 GIR_Done, 4632 // Label 356: @8882 4633 GIM_Try, /*On fail goto*//*Label 357*/ 8905, // Rule ID 1553 // 4634 GIM_CheckFeatures, GIFBS_UseSSE2, 4635 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 4636 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, 4637 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 4638 // (or:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (PORrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) 4639 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PORrr, 4640 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 4641 // GIR_Coverage, 1553, 4642 GIR_Done, 4643 // Label 357: @8905 4644 GIM_Try, /*On fail goto*//*Label 358*/ 8928, // Rule ID 4938 // 4645 GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, 4646 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, 4647 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, 4648 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, 4649 // (or:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (VPORQZ128rr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) 4650 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPORQZ128rr, 4651 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 4652 // GIR_Coverage, 4938, 4653 GIR_Done, 4654 // Label 358: @8928 4655 GIM_Reject, 4656 // Label 355: @8929 4657 GIM_Reject, 4658 // Label 306: @8930 4659 GIM_Try, /*On fail goto*//*Label 359*/ 9022, // Rule ID 13780 // 4660 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s1, 4661 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s1, 4662 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK1RegClassID, 4663 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK4RegClassID, 4664 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK4RegClassID, 4665 // (or:{ *:[v4i1] } VK4:{ *:[v4i1] }:$src1, VK4:{ *:[v4i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v4i1] } (KORWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK4:{ *:[v4i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK4:{ *:[v4i1] }:$src2, VK16:{ *:[i32] })), VK1:{ *:[i32] }) 4666 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, 4667 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, 4668 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1, 4669 GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::COPY, 4670 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, 4671 GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2 4672 GIR_ConstrainSelectedInstOperands, /*InsnID*/3, 4673 GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::COPY, 4674 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, 4675 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1 4676 GIR_ConstrainSelectedInstOperands, /*InsnID*/2, 4677 GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::KORWrr, 4678 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, 4679 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, 4680 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/2, /*TempRegFlags*/0, 4681 GIR_ConstrainSelectedInstOperands, /*InsnID*/1, 4682 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 4683 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 4684 GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, 4685 GIR_EraseFromParent, /*InsnID*/0, 4686 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VK1*/8, 4687 // GIR_Coverage, 13780, 4688 GIR_Done, 4689 // Label 359: @9022 4690 GIM_Reject, 4691 // Label 307: @9023 4692 GIM_Try, /*On fail goto*//*Label 360*/ 9103, 4693 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64, 4694 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64, 4695 GIM_Try, /*On fail goto*//*Label 361*/ 9056, // Rule ID 1555 // 4696 GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX, 4697 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, 4698 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, 4699 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, 4700 // (or:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) => (VPORYrr:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) 4701 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPORYrr, 4702 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 4703 // GIR_Coverage, 1555, 4704 GIR_Done, 4705 // Label 361: @9056 4706 GIM_Try, /*On fail goto*//*Label 362*/ 9079, // Rule ID 4929 // 4707 GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, 4708 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, 4709 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, 4710 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, 4711 // (or:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) => (VPORQZ256rr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) 4712 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPORQZ256rr, 4713 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 4714 // GIR_Coverage, 4929, 4715 GIR_Done, 4716 // Label 362: @9079 4717 GIM_Try, /*On fail goto*//*Label 363*/ 9102, // Rule ID 12545 // 4718 GIM_CheckFeatures, GIFBS_HasAVX1Only, 4719 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, 4720 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, 4721 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, 4722 // (or:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) => (VORPSYrr:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) 4723 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VORPSYrr, 4724 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 4725 // GIR_Coverage, 12545, 4726 GIR_Done, 4727 // Label 363: @9102 4728 GIM_Reject, 4729 // Label 360: @9103 4730 GIM_Reject, 4731 // Label 308: @9104 4732 GIM_Try, /*On fail goto*//*Label 364*/ 9212, 4733 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s1, 4734 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s1, 4735 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK8RegClassID, 4736 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK8RegClassID, 4737 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK8RegClassID, 4738 GIM_Try, /*On fail goto*//*Label 365*/ 9137, // Rule ID 3609 // 4739 GIM_CheckFeatures, GIFBS_HasDQI, 4740 // (or:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src1, VK8:{ *:[v8i1] }:$src2) => (KORBrr:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src1, VK8:{ *:[v8i1] }:$src2) 4741 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::KORBrr, 4742 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 4743 // GIR_Coverage, 3609, 4744 GIR_Done, 4745 // Label 365: @9137 4746 GIM_Try, /*On fail goto*//*Label 366*/ 9211, // Rule ID 13777 // 4747 GIM_CheckFeatures, GIFBS_NoDQI, 4748 // (or:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src1, VK8:{ *:[v8i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v8i1] } (KORWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK8:{ *:[v8i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK8:{ *:[v8i1] }:$src2, VK16:{ *:[i32] })), VK8:{ *:[i32] }) 4749 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, 4750 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, 4751 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1, 4752 GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::COPY, 4753 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, 4754 GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2 4755 GIR_ConstrainSelectedInstOperands, /*InsnID*/3, 4756 GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::COPY, 4757 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, 4758 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1 4759 GIR_ConstrainSelectedInstOperands, /*InsnID*/2, 4760 GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::KORWrr, 4761 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, 4762 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, 4763 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/2, /*TempRegFlags*/0, 4764 GIR_ConstrainSelectedInstOperands, /*InsnID*/1, 4765 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 4766 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 4767 GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, 4768 GIR_EraseFromParent, /*InsnID*/0, 4769 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VK8*/12, 4770 // GIR_Coverage, 13777, 4771 GIR_Done, 4772 // Label 366: @9211 4773 GIM_Reject, 4774 // Label 364: @9212 4775 GIM_Reject, 4776 // Label 309: @9213 4777 GIM_Try, /*On fail goto*//*Label 367*/ 9244, // Rule ID 4920 // 4778 GIM_CheckFeatures, GIFBS_HasAVX512, 4779 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64, 4780 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s64, 4781 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, 4782 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, 4783 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, 4784 // (or:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) => (VPORQZrr:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) 4785 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPORQZrr, 4786 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 4787 // GIR_Coverage, 4920, 4788 GIR_Done, 4789 // Label 367: @9244 4790 GIM_Reject, 4791 // Label 310: @9245 4792 GIM_Try, /*On fail goto*//*Label 368*/ 9276, // Rule ID 3610 // 4793 GIM_CheckFeatures, GIFBS_HasAVX512, 4794 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s1, 4795 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s1, 4796 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK16RegClassID, 4797 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK16RegClassID, 4798 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK16RegClassID, 4799 // (or:{ *:[v16i1] } VK16:{ *:[v16i1] }:$src1, VK16:{ *:[v16i1] }:$src2) => (KORWrr:{ *:[v16i1] } VK16:{ *:[v16i1] }:$src1, VK16:{ *:[v16i1] }:$src2) 4800 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::KORWrr, 4801 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 4802 // GIR_Coverage, 3610, 4803 GIR_Done, 4804 // Label 368: @9276 4805 GIM_Reject, 4806 // Label 311: @9277 4807 GIM_Try, /*On fail goto*//*Label 369*/ 9308, // Rule ID 3611 // 4808 GIM_CheckFeatures, GIFBS_HasBWI, 4809 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s1, 4810 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s1, 4811 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK32RegClassID, 4812 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK32RegClassID, 4813 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK32RegClassID, 4814 // (or:{ *:[v32i1] } VK32:{ *:[v32i1] }:$src1, VK32:{ *:[v32i1] }:$src2) => (KORDrr:{ *:[v32i1] } VK32:{ *:[v32i1] }:$src1, VK32:{ *:[v32i1] }:$src2) 4815 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::KORDrr, 4816 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 4817 // GIR_Coverage, 3611, 4818 GIR_Done, 4819 // Label 369: @9308 4820 GIM_Reject, 4821 // Label 312: @9309 4822 GIM_Try, /*On fail goto*//*Label 370*/ 9340, // Rule ID 3612 // 4823 GIM_CheckFeatures, GIFBS_HasBWI, 4824 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v64s1, 4825 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v64s1, 4826 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK64RegClassID, 4827 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK64RegClassID, 4828 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK64RegClassID, 4829 // (or:{ *:[v64i1] } VK64:{ *:[v64i1] }:$src1, VK64:{ *:[v64i1] }:$src2) => (KORQrr:{ *:[v64i1] } VK64:{ *:[v64i1] }:$src1, VK64:{ *:[v64i1] }:$src2) 4830 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::KORQrr, 4831 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 4832 // GIR_Coverage, 3612, 4833 GIR_Done, 4834 // Label 370: @9340 4835 GIM_Reject, 4836 // Label 313: @9341 4837 GIM_Reject, 4838 // Label 5: @9342 4839 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/0, 24, /*)*//*default:*//*Label 385*/ 11314, 4840 /*GILLT_s1*//*Label 371*/ 9372, 4841 /*GILLT_s8*//*Label 372*/ 9771, 4842 /*GILLT_s16*//*Label 373*/ 9859, 4843 /*GILLT_s32*//*Label 374*/ 9980, 4844 /*GILLT_s64*//*Label 375*/ 10353, 0, 0, 4845 /*GILLT_v2s1*//*Label 376*/ 10729, 4846 /*GILLT_v2s64*//*Label 377*/ 10822, 4847 /*GILLT_v4s1*//*Label 378*/ 10903, 0, 4848 /*GILLT_v4s64*//*Label 379*/ 10996, 4849 /*GILLT_v8s1*//*Label 380*/ 11077, 0, 0, 4850 /*GILLT_v8s64*//*Label 381*/ 11186, 4851 /*GILLT_v16s1*//*Label 382*/ 11218, 0, 0, 0, 4852 /*GILLT_v32s1*//*Label 383*/ 11250, 0, 0, 4853 /*GILLT_v64s1*//*Label 384*/ 11282, 4854 // Label 371: @9372 4855 GIM_Try, /*On fail goto*//*Label 386*/ 9770, 4856 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s1, 4857 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s1, 4858 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK1RegClassID, 4859 GIM_Try, /*On fail goto*//*Label 387*/ 9487, // Rule ID 18370 // 4860 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] 4861 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR, 4862 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s1, 4863 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s1, 4864 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::VK1RegClassID, 4865 GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, 4866 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK1RegClassID, 4867 GIM_CheckIsSafeToFold, /*InsnID*/1, 4868 // (xor:{ *:[v1i1] } (xor:{ *:[v1i1] } VK1:{ *:[v1i1] }:$src1, -1:{ *:[v1i1] }), VK1:{ *:[v1i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v1i1] } (KXNORWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK1:{ *:[v1i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK1:{ *:[v1i1] }:$src2, VK16:{ *:[i32] })), VK1:{ *:[i32] }) 4869 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, 4870 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, 4871 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1, 4872 GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::COPY, 4873 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, 4874 GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2 4875 GIR_ConstrainSelectedInstOperands, /*InsnID*/3, 4876 GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::COPY, 4877 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, 4878 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/1, /*OpIdx*/1, // src1 4879 GIR_ConstrainSelectedInstOperands, /*InsnID*/2, 4880 GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::KXNORWrr, 4881 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, 4882 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, 4883 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/2, /*TempRegFlags*/0, 4884 GIR_ConstrainSelectedInstOperands, /*InsnID*/1, 4885 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 4886 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 4887 GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, 4888 GIR_EraseFromParent, /*InsnID*/0, 4889 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VK1*/8, 4890 // GIR_Coverage, 18370, 4891 GIR_Done, 4892 // Label 387: @9487 4893 GIM_Try, /*On fail goto*//*Label 388*/ 9588, // Rule ID 13782 // 4894 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] 4895 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR, 4896 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s1, 4897 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s1, 4898 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::VK1RegClassID, 4899 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/X86::VK1RegClassID, 4900 GIM_CheckConstantInt, /*MI*/0, /*Op*/2, -1, 4901 GIM_CheckIsSafeToFold, /*InsnID*/1, 4902 // (xor:{ *:[v1i1] } (xor:{ *:[v1i1] } VK1:{ *:[v1i1] }:$src1, VK1:{ *:[v1i1] }:$src2), -1:{ *:[v1i1] }) => (COPY_TO_REGCLASS:{ *:[v1i1] } (KXNORWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK1:{ *:[v1i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK1:{ *:[v1i1] }:$src2, VK16:{ *:[i32] })), VK1:{ *:[i32] }) 4903 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, 4904 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, 4905 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1, 4906 GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::COPY, 4907 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, 4908 GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/1, /*OpIdx*/2, // src2 4909 GIR_ConstrainSelectedInstOperands, /*InsnID*/3, 4910 GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::COPY, 4911 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, 4912 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/1, /*OpIdx*/1, // src1 4913 GIR_ConstrainSelectedInstOperands, /*InsnID*/2, 4914 GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::KXNORWrr, 4915 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, 4916 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, 4917 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/2, /*TempRegFlags*/0, 4918 GIR_ConstrainSelectedInstOperands, /*InsnID*/1, 4919 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 4920 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 4921 GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, 4922 GIR_EraseFromParent, /*InsnID*/0, 4923 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VK1*/8, 4924 // GIR_Coverage, 13782, 4925 GIR_Done, 4926 // Label 388: @9588 4927 GIM_Try, /*On fail goto*//*Label 389*/ 9689, // Rule ID 18371 // 4928 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK1RegClassID, 4929 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] 4930 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR, 4931 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s1, 4932 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s1, 4933 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::VK1RegClassID, 4934 GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, 4935 GIM_CheckIsSafeToFold, /*InsnID*/1, 4936 // (xor:{ *:[v1i1] } VK1:{ *:[v1i1] }:$src2, (xor:{ *:[v1i1] } VK1:{ *:[v1i1] }:$src1, -1:{ *:[v1i1] })) => (COPY_TO_REGCLASS:{ *:[v1i1] } (KXNORWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK1:{ *:[v1i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK1:{ *:[v1i1] }:$src2, VK16:{ *:[i32] })), VK1:{ *:[i32] }) 4937 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, 4938 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, 4939 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1, 4940 GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::COPY, 4941 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, 4942 GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/1, // src2 4943 GIR_ConstrainSelectedInstOperands, /*InsnID*/3, 4944 GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::COPY, 4945 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, 4946 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/1, /*OpIdx*/1, // src1 4947 GIR_ConstrainSelectedInstOperands, /*InsnID*/2, 4948 GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::KXNORWrr, 4949 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, 4950 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, 4951 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/2, /*TempRegFlags*/0, 4952 GIR_ConstrainSelectedInstOperands, /*InsnID*/1, 4953 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 4954 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 4955 GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, 4956 GIR_EraseFromParent, /*InsnID*/0, 4957 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VK1*/8, 4958 // GIR_Coverage, 18371, 4959 GIR_Done, 4960 // Label 389: @9689 4961 GIM_Try, /*On fail goto*//*Label 390*/ 9769, // Rule ID 13786 // 4962 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK1RegClassID, 4963 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK1RegClassID, 4964 // (xor:{ *:[v1i1] } VK1:{ *:[v1i1] }:$src1, VK1:{ *:[v1i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v1i1] } (KXORWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK1:{ *:[v1i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK1:{ *:[v1i1] }:$src2, VK16:{ *:[i32] })), VK1:{ *:[i32] }) 4965 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, 4966 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, 4967 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1, 4968 GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::COPY, 4969 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, 4970 GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2 4971 GIR_ConstrainSelectedInstOperands, /*InsnID*/3, 4972 GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::COPY, 4973 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, 4974 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1 4975 GIR_ConstrainSelectedInstOperands, /*InsnID*/2, 4976 GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::KXORWrr, 4977 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, 4978 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, 4979 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/2, /*TempRegFlags*/0, 4980 GIR_ConstrainSelectedInstOperands, /*InsnID*/1, 4981 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 4982 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 4983 GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, 4984 GIR_EraseFromParent, /*InsnID*/0, 4985 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VK1*/8, 4986 // GIR_Coverage, 13786, 4987 GIR_Done, 4988 // Label 390: @9769 4989 GIM_Reject, 4990 // Label 386: @9770 4991 GIM_Reject, 4992 // Label 372: @9771 4993 GIM_Try, /*On fail goto*//*Label 391*/ 9858, 4994 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s8, 4995 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8, 4996 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR8RegClassID, 4997 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR8RegClassID, 4998 GIM_Try, /*On fail goto*//*Label 392*/ 9811, // Rule ID 152 // 4999 GIM_CheckConstantInt, /*MI*/0, /*Op*/2, -1, 5000 // (xor:{ *:[i8] } GR8:{ *:[i8] }:$src1, -1:{ *:[i8] }) => (NOT8r:{ *:[i8] } GR8:{ *:[i8] }:$src1) 5001 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::NOT8r, 5002 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 5003 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 5004 GIR_EraseFromParent, /*InsnID*/0, 5005 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 5006 // GIR_Coverage, 152, 5007 GIR_Done, 5008 // Label 392: @9811 5009 GIM_Try, /*On fail goto*//*Label 393*/ 9841, // Rule ID 16165 // 5010 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] 5011 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, 5012 // MIs[1] Operand 1 5013 // No operand predicates 5014 GIM_CheckIsSafeToFold, /*InsnID*/1, 5015 // (xor:{ *:[i8] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) => (XOR8ri:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) 5016 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::XOR8ri, 5017 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 5018 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 5019 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 5020 GIR_EraseFromParent, /*InsnID*/0, 5021 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 5022 // GIR_Coverage, 16165, 5023 GIR_Done, 5024 // Label 393: @9841 5025 GIM_Try, /*On fail goto*//*Label 394*/ 9857, // Rule ID 16157 // 5026 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR8RegClassID, 5027 // (xor:{ *:[i8] } GR8:{ *:[i8] }:$src1, GR8:{ *:[i8] }:$src2) => (XOR8rr:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, GR8:{ *:[i8] }:$src2) 5028 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::XOR8rr, 5029 GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS, 5030 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 5031 // GIR_Coverage, 16157, 5032 GIR_Done, 5033 // Label 394: @9857 5034 GIM_Reject, 5035 // Label 391: @9858 5036 GIM_Reject, 5037 // Label 373: @9859 5038 GIM_Try, /*On fail goto*//*Label 395*/ 9979, 5039 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16, 5040 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16, 5041 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR16RegClassID, 5042 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID, 5043 GIM_Try, /*On fail goto*//*Label 396*/ 9899, // Rule ID 153 // 5044 GIM_CheckConstantInt, /*MI*/0, /*Op*/2, -1, 5045 // (xor:{ *:[i16] } GR16:{ *:[i16] }:$src1, -1:{ *:[i16] }) => (NOT16r:{ *:[i16] } GR16:{ *:[i16] }:$src1) 5046 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::NOT16r, 5047 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 5048 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 5049 GIR_EraseFromParent, /*InsnID*/0, 5050 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 5051 // GIR_Coverage, 153, 5052 GIR_Done, 5053 // Label 396: @9899 5054 GIM_Try, /*On fail goto*//*Label 397*/ 9932, // Rule ID 16168 // 5055 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] 5056 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, 5057 GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i16immSExt8, 5058 // MIs[1] Operand 1 5059 // No operand predicates 5060 GIM_CheckIsSafeToFold, /*InsnID*/1, 5061 // (xor:{ *:[i16] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] })<<P:Predicate_i16immSExt8>>:$src2) => (XOR16ri8:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] })<<P:Predicate_i16immSExt8>>:$src2) 5062 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::XOR16ri8, 5063 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 5064 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 5065 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 5066 GIR_EraseFromParent, /*InsnID*/0, 5067 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 5068 // GIR_Coverage, 16168, 5069 GIR_Done, 5070 // Label 397: @9932 5071 GIM_Try, /*On fail goto*//*Label 398*/ 9962, // Rule ID 16166 // 5072 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] 5073 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, 5074 // MIs[1] Operand 1 5075 // No operand predicates 5076 GIM_CheckIsSafeToFold, /*InsnID*/1, 5077 // (xor:{ *:[i16] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] }):$src2) => (XOR16ri:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] }):$src2) 5078 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::XOR16ri, 5079 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 5080 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 5081 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 5082 GIR_EraseFromParent, /*InsnID*/0, 5083 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 5084 // GIR_Coverage, 16166, 5085 GIR_Done, 5086 // Label 398: @9962 5087 GIM_Try, /*On fail goto*//*Label 399*/ 9978, // Rule ID 16158 // 5088 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR16RegClassID, 5089 // (xor:{ *:[i16] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2) => (XOR16rr:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2) 5090 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::XOR16rr, 5091 GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS, 5092 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 5093 // GIR_Coverage, 16158, 5094 GIR_Done, 5095 // Label 399: @9978 5096 GIM_Reject, 5097 // Label 395: @9979 5098 GIM_Reject, 5099 // Label 374: @9980 5100 GIM_Try, /*On fail goto*//*Label 400*/ 10352, 5101 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, 5102 GIM_Try, /*On fail goto*//*Label 401*/ 10040, // Rule ID 18226 // 5103 GIM_CheckFeatures, GIFBS_HasTBM, 5104 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, 5105 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] 5106 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD, 5107 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, 5108 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, 5109 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR32RegClassID, 5110 GIM_CheckConstantInt, /*MI*/1, /*Op*/2, 1, 5111 // MIs[0] src 5112 GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/1, 5113 GIM_CheckIsSafeToFold, /*InsnID*/1, 5114 // (xor:{ *:[i32] } (add:{ *:[i32] } GR32:{ *:[i32] }:$src, 1:{ *:[i32] }), GR32:{ *:[i32] }:$src) => (BLCMSK32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) 5115 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCMSK32rr, 5116 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 5117 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src 5118 GIR_EraseFromParent, /*InsnID*/0, 5119 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 5120 // GIR_Coverage, 18226, 5121 GIR_Done, 5122 // Label 401: @10040 5123 GIM_Try, /*On fail goto*//*Label 402*/ 10094, // Rule ID 18730 // 5124 GIM_CheckFeatures, GIFBS_HasBMI, 5125 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, 5126 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] 5127 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD, 5128 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, 5129 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, 5130 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR32RegClassID, 5131 GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, 5132 // MIs[0] src 5133 GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/1, 5134 GIM_CheckIsSafeToFold, /*InsnID*/1, 5135 // (xor:{ *:[i32] } (add:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] }), GR32:{ *:[i32] }:$src) => (BLSMSK32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) 5136 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLSMSK32rr, 5137 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 5138 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src 5139 GIR_EraseFromParent, /*InsnID*/0, 5140 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 5141 // GIR_Coverage, 18730, 5142 GIR_Done, 5143 // Label 402: @10094 5144 GIM_Try, /*On fail goto*//*Label 403*/ 10148, // Rule ID 12271 // 5145 GIM_CheckFeatures, GIFBS_HasTBM, 5146 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, 5147 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, 5148 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, 5149 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] 5150 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD, 5151 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, 5152 // MIs[1] src 5153 GIM_CheckIsSameOperand, /*MI*/1, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1, 5154 GIM_CheckConstantInt, /*MI*/1, /*Op*/2, 1, 5155 GIM_CheckIsSafeToFold, /*InsnID*/1, 5156 // (xor:{ *:[i32] } GR32:{ *:[i32] }:$src, (add:{ *:[i32] } GR32:{ *:[i32] }:$src, 1:{ *:[i32] })) => (BLCMSK32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) 5157 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCMSK32rr, 5158 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 5159 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 5160 GIR_EraseFromParent, /*InsnID*/0, 5161 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 5162 // GIR_Coverage, 12271, 5163 GIR_Done, 5164 // Label 403: @10148 5165 GIM_Try, /*On fail goto*//*Label 404*/ 10202, // Rule ID 16453 // 5166 GIM_CheckFeatures, GIFBS_HasBMI, 5167 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, 5168 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, 5169 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, 5170 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] 5171 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD, 5172 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, 5173 // MIs[1] src 5174 GIM_CheckIsSameOperand, /*MI*/1, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1, 5175 GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, 5176 GIM_CheckIsSafeToFold, /*InsnID*/1, 5177 // (xor:{ *:[i32] } GR32:{ *:[i32] }:$src, (add:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] })) => (BLSMSK32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) 5178 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLSMSK32rr, 5179 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 5180 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 5181 GIR_EraseFromParent, /*InsnID*/0, 5182 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 5183 // GIR_Coverage, 16453, 5184 GIR_Done, 5185 // Label 404: @10202 5186 GIM_Try, /*On fail goto*//*Label 405*/ 10236, // Rule ID 154 // 5187 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, 5188 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, 5189 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, 5190 GIM_CheckConstantInt, /*MI*/0, /*Op*/2, -1, 5191 // (xor:{ *:[i32] } GR32:{ *:[i32] }:$src1, -1:{ *:[i32] }) => (NOT32r:{ *:[i32] } GR32:{ *:[i32] }:$src1) 5192 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::NOT32r, 5193 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 5194 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 5195 GIR_EraseFromParent, /*InsnID*/0, 5196 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 5197 // GIR_Coverage, 154, 5198 GIR_Done, 5199 // Label 405: @10236 5200 GIM_Try, /*On fail goto*//*Label 406*/ 10281, // Rule ID 16169 // 5201 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, 5202 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, 5203 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, 5204 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] 5205 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, 5206 GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i32immSExt8, 5207 // MIs[1] Operand 1 5208 // No operand predicates 5209 GIM_CheckIsSafeToFold, /*InsnID*/1, 5210 // (xor:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] })<<P:Predicate_i32immSExt8>>:$src2) => (XOR32ri8:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] })<<P:Predicate_i32immSExt8>>:$src2) 5211 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::XOR32ri8, 5212 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 5213 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 5214 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 5215 GIR_EraseFromParent, /*InsnID*/0, 5216 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 5217 // GIR_Coverage, 16169, 5218 GIR_Done, 5219 // Label 406: @10281 5220 GIM_Try, /*On fail goto*//*Label 407*/ 10323, // Rule ID 16167 // 5221 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, 5222 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, 5223 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, 5224 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] 5225 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, 5226 // MIs[1] Operand 1 5227 // No operand predicates 5228 GIM_CheckIsSafeToFold, /*InsnID*/1, 5229 // (xor:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$src2) => (XOR32ri:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$src2) 5230 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::XOR32ri, 5231 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 5232 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 5233 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 5234 GIR_EraseFromParent, /*InsnID*/0, 5235 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 5236 // GIR_Coverage, 16167, 5237 GIR_Done, 5238 // Label 407: @10323 5239 GIM_Try, /*On fail goto*//*Label 408*/ 10351, // Rule ID 16159 // 5240 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, 5241 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, 5242 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, 5243 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR32RegClassID, 5244 // (xor:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) => (XOR32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) 5245 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::XOR32rr, 5246 GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS, 5247 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 5248 // GIR_Coverage, 16159, 5249 GIR_Done, 5250 // Label 408: @10351 5251 GIM_Reject, 5252 // Label 400: @10352 5253 GIM_Reject, 5254 // Label 375: @10353 5255 GIM_Try, /*On fail goto*//*Label 409*/ 10728, 5256 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, 5257 GIM_Try, /*On fail goto*//*Label 410*/ 10413, // Rule ID 18227 // 5258 GIM_CheckFeatures, GIFBS_HasTBM, 5259 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, 5260 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] 5261 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD, 5262 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, 5263 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, 5264 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR64RegClassID, 5265 GIM_CheckConstantInt, /*MI*/1, /*Op*/2, 1, 5266 // MIs[0] src 5267 GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/1, 5268 GIM_CheckIsSafeToFold, /*InsnID*/1, 5269 // (xor:{ *:[i64] } (add:{ *:[i64] } GR64:{ *:[i64] }:$src, 1:{ *:[i64] }), GR64:{ *:[i64] }:$src) => (BLCMSK64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) 5270 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCMSK64rr, 5271 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 5272 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src 5273 GIR_EraseFromParent, /*InsnID*/0, 5274 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 5275 // GIR_Coverage, 18227, 5276 GIR_Done, 5277 // Label 410: @10413 5278 GIM_Try, /*On fail goto*//*Label 411*/ 10467, // Rule ID 18731 // 5279 GIM_CheckFeatures, GIFBS_HasBMI, 5280 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, 5281 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] 5282 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD, 5283 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, 5284 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, 5285 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR64RegClassID, 5286 GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, 5287 // MIs[0] src 5288 GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/1, 5289 GIM_CheckIsSafeToFold, /*InsnID*/1, 5290 // (xor:{ *:[i64] } (add:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] }), GR64:{ *:[i64] }:$src) => (BLSMSK64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) 5291 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLSMSK64rr, 5292 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 5293 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src 5294 GIR_EraseFromParent, /*InsnID*/0, 5295 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 5296 // GIR_Coverage, 18731, 5297 GIR_Done, 5298 // Label 411: @10467 5299 GIM_Try, /*On fail goto*//*Label 412*/ 10521, // Rule ID 12272 // 5300 GIM_CheckFeatures, GIFBS_HasTBM, 5301 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, 5302 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, 5303 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, 5304 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] 5305 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD, 5306 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, 5307 // MIs[1] src 5308 GIM_CheckIsSameOperand, /*MI*/1, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1, 5309 GIM_CheckConstantInt, /*MI*/1, /*Op*/2, 1, 5310 GIM_CheckIsSafeToFold, /*InsnID*/1, 5311 // (xor:{ *:[i64] } GR64:{ *:[i64] }:$src, (add:{ *:[i64] } GR64:{ *:[i64] }:$src, 1:{ *:[i64] })) => (BLCMSK64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) 5312 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCMSK64rr, 5313 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 5314 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 5315 GIR_EraseFromParent, /*InsnID*/0, 5316 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 5317 // GIR_Coverage, 12272, 5318 GIR_Done, 5319 // Label 412: @10521 5320 GIM_Try, /*On fail goto*//*Label 413*/ 10575, // Rule ID 16454 // 5321 GIM_CheckFeatures, GIFBS_HasBMI, 5322 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, 5323 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, 5324 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, 5325 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] 5326 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD, 5327 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, 5328 // MIs[1] src 5329 GIM_CheckIsSameOperand, /*MI*/1, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1, 5330 GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, 5331 GIM_CheckIsSafeToFold, /*InsnID*/1, 5332 // (xor:{ *:[i64] } GR64:{ *:[i64] }:$src, (add:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] })) => (BLSMSK64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) 5333 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLSMSK64rr, 5334 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 5335 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 5336 GIR_EraseFromParent, /*InsnID*/0, 5337 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 5338 // GIR_Coverage, 16454, 5339 GIR_Done, 5340 // Label 413: @10575 5341 GIM_Try, /*On fail goto*//*Label 414*/ 10609, // Rule ID 155 // 5342 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, 5343 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, 5344 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, 5345 GIM_CheckConstantInt, /*MI*/0, /*Op*/2, -1, 5346 // (xor:{ *:[i64] } GR64:{ *:[i64] }:$src1, -1:{ *:[i64] }) => (NOT64r:{ *:[i64] } GR64:{ *:[i64] }:$src1) 5347 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::NOT64r, 5348 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 5349 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 5350 GIR_EraseFromParent, /*InsnID*/0, 5351 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 5352 // GIR_Coverage, 155, 5353 GIR_Done, 5354 // Label 414: @10609 5355 GIM_Try, /*On fail goto*//*Label 415*/ 10654, // Rule ID 16170 // 5356 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, 5357 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, 5358 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, 5359 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] 5360 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, 5361 GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i64immSExt8, 5362 // MIs[1] Operand 1 5363 // No operand predicates 5364 GIM_CheckIsSafeToFold, /*InsnID*/1, 5365 // (xor:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt8>>:$src2) => (XOR64ri8:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt8>>:$src2) 5366 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::XOR64ri8, 5367 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 5368 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 5369 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 5370 GIR_EraseFromParent, /*InsnID*/0, 5371 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 5372 // GIR_Coverage, 16170, 5373 GIR_Done, 5374 // Label 415: @10654 5375 GIM_Try, /*On fail goto*//*Label 416*/ 10699, // Rule ID 16171 // 5376 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, 5377 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, 5378 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, 5379 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] 5380 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, 5381 GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i64immSExt32, 5382 // MIs[1] Operand 1 5383 // No operand predicates 5384 GIM_CheckIsSafeToFold, /*InsnID*/1, 5385 // (xor:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt32>>:$src2) => (XOR64ri32:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt32>>:$src2) 5386 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::XOR64ri32, 5387 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 5388 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 5389 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 5390 GIR_EraseFromParent, /*InsnID*/0, 5391 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 5392 // GIR_Coverage, 16171, 5393 GIR_Done, 5394 // Label 416: @10699 5395 GIM_Try, /*On fail goto*//*Label 417*/ 10727, // Rule ID 16160 // 5396 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, 5397 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, 5398 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, 5399 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR64RegClassID, 5400 // (xor:{ *:[i64] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) => (XOR64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) 5401 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::XOR64rr, 5402 GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS, 5403 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 5404 // GIR_Coverage, 16160, 5405 GIR_Done, 5406 // Label 417: @10727 5407 GIM_Reject, 5408 // Label 409: @10728 5409 GIM_Reject, 5410 // Label 376: @10729 5411 GIM_Try, /*On fail goto*//*Label 418*/ 10821, // Rule ID 13787 // 5412 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s1, 5413 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s1, 5414 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK1RegClassID, 5415 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK2RegClassID, 5416 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK2RegClassID, 5417 // (xor:{ *:[v2i1] } VK2:{ *:[v2i1] }:$src1, VK2:{ *:[v2i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v2i1] } (KXORWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK2:{ *:[v2i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK2:{ *:[v2i1] }:$src2, VK16:{ *:[i32] })), VK1:{ *:[i32] }) 5418 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, 5419 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, 5420 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1, 5421 GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::COPY, 5422 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, 5423 GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2 5424 GIR_ConstrainSelectedInstOperands, /*InsnID*/3, 5425 GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::COPY, 5426 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, 5427 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1 5428 GIR_ConstrainSelectedInstOperands, /*InsnID*/2, 5429 GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::KXORWrr, 5430 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, 5431 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, 5432 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/2, /*TempRegFlags*/0, 5433 GIR_ConstrainSelectedInstOperands, /*InsnID*/1, 5434 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 5435 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 5436 GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, 5437 GIR_EraseFromParent, /*InsnID*/0, 5438 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VK1*/8, 5439 // GIR_Coverage, 13787, 5440 GIR_Done, 5441 // Label 418: @10821 5442 GIM_Reject, 5443 // Label 377: @10822 5444 GIM_Try, /*On fail goto*//*Label 419*/ 10902, 5445 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64, 5446 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, 5447 GIM_Try, /*On fail goto*//*Label 420*/ 10855, // Rule ID 1557 // 5448 GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, 5449 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 5450 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, 5451 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 5452 // (xor:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (VPXORrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) 5453 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPXORrr, 5454 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 5455 // GIR_Coverage, 1557, 5456 GIR_Done, 5457 // Label 420: @10855 5458 GIM_Try, /*On fail goto*//*Label 421*/ 10878, // Rule ID 1559 // 5459 GIM_CheckFeatures, GIFBS_UseSSE2, 5460 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 5461 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, 5462 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 5463 // (xor:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (PXORrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) 5464 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PXORrr, 5465 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 5466 // GIR_Coverage, 1559, 5467 GIR_Done, 5468 // Label 421: @10878 5469 GIM_Try, /*On fail goto*//*Label 422*/ 10901, // Rule ID 4986 // 5470 GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, 5471 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, 5472 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, 5473 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, 5474 // (xor:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (VPXORQZ128rr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) 5475 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPXORQZ128rr, 5476 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 5477 // GIR_Coverage, 4986, 5478 GIR_Done, 5479 // Label 422: @10901 5480 GIM_Reject, 5481 // Label 419: @10902 5482 GIM_Reject, 5483 // Label 378: @10903 5484 GIM_Try, /*On fail goto*//*Label 423*/ 10995, // Rule ID 13788 // 5485 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s1, 5486 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s1, 5487 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK1RegClassID, 5488 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK4RegClassID, 5489 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK4RegClassID, 5490 // (xor:{ *:[v4i1] } VK4:{ *:[v4i1] }:$src1, VK4:{ *:[v4i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v4i1] } (KXORWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK4:{ *:[v4i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK4:{ *:[v4i1] }:$src2, VK16:{ *:[i32] })), VK1:{ *:[i32] }) 5491 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, 5492 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, 5493 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1, 5494 GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::COPY, 5495 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, 5496 GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2 5497 GIR_ConstrainSelectedInstOperands, /*InsnID*/3, 5498 GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::COPY, 5499 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, 5500 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1 5501 GIR_ConstrainSelectedInstOperands, /*InsnID*/2, 5502 GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::KXORWrr, 5503 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, 5504 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, 5505 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/2, /*TempRegFlags*/0, 5506 GIR_ConstrainSelectedInstOperands, /*InsnID*/1, 5507 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 5508 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 5509 GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, 5510 GIR_EraseFromParent, /*InsnID*/0, 5511 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VK1*/8, 5512 // GIR_Coverage, 13788, 5513 GIR_Done, 5514 // Label 423: @10995 5515 GIM_Reject, 5516 // Label 379: @10996 5517 GIM_Try, /*On fail goto*//*Label 424*/ 11076, 5518 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64, 5519 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64, 5520 GIM_Try, /*On fail goto*//*Label 425*/ 11029, // Rule ID 1561 // 5521 GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX, 5522 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, 5523 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, 5524 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, 5525 // (xor:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) => (VPXORYrr:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) 5526 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPXORYrr, 5527 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 5528 // GIR_Coverage, 1561, 5529 GIR_Done, 5530 // Label 425: @11029 5531 GIM_Try, /*On fail goto*//*Label 426*/ 11052, // Rule ID 4977 // 5532 GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, 5533 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, 5534 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, 5535 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, 5536 // (xor:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) => (VPXORQZ256rr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) 5537 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPXORQZ256rr, 5538 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 5539 // GIR_Coverage, 4977, 5540 GIR_Done, 5541 // Label 426: @11052 5542 GIM_Try, /*On fail goto*//*Label 427*/ 11075, // Rule ID 12546 // 5543 GIM_CheckFeatures, GIFBS_HasAVX1Only, 5544 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, 5545 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, 5546 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, 5547 // (xor:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) => (VXORPSYrr:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) 5548 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VXORPSYrr, 5549 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 5550 // GIR_Coverage, 12546, 5551 GIR_Done, 5552 // Label 427: @11075 5553 GIM_Reject, 5554 // Label 424: @11076 5555 GIM_Reject, 5556 // Label 380: @11077 5557 GIM_Try, /*On fail goto*//*Label 428*/ 11185, 5558 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s1, 5559 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s1, 5560 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK8RegClassID, 5561 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK8RegClassID, 5562 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK8RegClassID, 5563 GIM_Try, /*On fail goto*//*Label 429*/ 11110, // Rule ID 3617 // 5564 GIM_CheckFeatures, GIFBS_HasDQI, 5565 // (xor:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src1, VK8:{ *:[v8i1] }:$src2) => (KXORBrr:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src1, VK8:{ *:[v8i1] }:$src2) 5566 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::KXORBrr, 5567 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 5568 // GIR_Coverage, 3617, 5569 GIR_Done, 5570 // Label 429: @11110 5571 GIM_Try, /*On fail goto*//*Label 430*/ 11184, // Rule ID 13785 // 5572 GIM_CheckFeatures, GIFBS_NoDQI, 5573 // (xor:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src1, VK8:{ *:[v8i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v8i1] } (KXORWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK8:{ *:[v8i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK8:{ *:[v8i1] }:$src2, VK16:{ *:[i32] })), VK8:{ *:[i32] }) 5574 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, 5575 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, 5576 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1, 5577 GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::COPY, 5578 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, 5579 GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2 5580 GIR_ConstrainSelectedInstOperands, /*InsnID*/3, 5581 GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::COPY, 5582 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, 5583 GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1 5584 GIR_ConstrainSelectedInstOperands, /*InsnID*/2, 5585 GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::KXORWrr, 5586 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, 5587 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, 5588 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/2, /*TempRegFlags*/0, 5589 GIR_ConstrainSelectedInstOperands, /*InsnID*/1, 5590 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 5591 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 5592 GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, 5593 GIR_EraseFromParent, /*InsnID*/0, 5594 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VK8*/12, 5595 // GIR_Coverage, 13785, 5596 GIR_Done, 5597 // Label 430: @11184 5598 GIM_Reject, 5599 // Label 428: @11185 5600 GIM_Reject, 5601 // Label 381: @11186 5602 GIM_Try, /*On fail goto*//*Label 431*/ 11217, // Rule ID 4968 // 5603 GIM_CheckFeatures, GIFBS_HasAVX512, 5604 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64, 5605 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s64, 5606 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, 5607 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, 5608 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, 5609 // (xor:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) => (VPXORQZrr:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) 5610 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPXORQZrr, 5611 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 5612 // GIR_Coverage, 4968, 5613 GIR_Done, 5614 // Label 431: @11217 5615 GIM_Reject, 5616 // Label 382: @11218 5617 GIM_Try, /*On fail goto*//*Label 432*/ 11249, // Rule ID 3618 // 5618 GIM_CheckFeatures, GIFBS_HasAVX512, 5619 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s1, 5620 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s1, 5621 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK16RegClassID, 5622 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK16RegClassID, 5623 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK16RegClassID, 5624 // (xor:{ *:[v16i1] } VK16:{ *:[v16i1] }:$src1, VK16:{ *:[v16i1] }:$src2) => (KXORWrr:{ *:[v16i1] } VK16:{ *:[v16i1] }:$src1, VK16:{ *:[v16i1] }:$src2) 5625 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::KXORWrr, 5626 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 5627 // GIR_Coverage, 3618, 5628 GIR_Done, 5629 // Label 432: @11249 5630 GIM_Reject, 5631 // Label 383: @11250 5632 GIM_Try, /*On fail goto*//*Label 433*/ 11281, // Rule ID 3619 // 5633 GIM_CheckFeatures, GIFBS_HasBWI, 5634 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s1, 5635 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s1, 5636 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK32RegClassID, 5637 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK32RegClassID, 5638 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK32RegClassID, 5639 // (xor:{ *:[v32i1] } VK32:{ *:[v32i1] }:$src1, VK32:{ *:[v32i1] }:$src2) => (KXORDrr:{ *:[v32i1] } VK32:{ *:[v32i1] }:$src1, VK32:{ *:[v32i1] }:$src2) 5640 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::KXORDrr, 5641 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 5642 // GIR_Coverage, 3619, 5643 GIR_Done, 5644 // Label 433: @11281 5645 GIM_Reject, 5646 // Label 384: @11282 5647 GIM_Try, /*On fail goto*//*Label 434*/ 11313, // Rule ID 3620 // 5648 GIM_CheckFeatures, GIFBS_HasBWI, 5649 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v64s1, 5650 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v64s1, 5651 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK64RegClassID, 5652 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK64RegClassID, 5653 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK64RegClassID, 5654 // (xor:{ *:[v64i1] } VK64:{ *:[v64i1] }:$src1, VK64:{ *:[v64i1] }:$src2) => (KXORQrr:{ *:[v64i1] } VK64:{ *:[v64i1] }:$src1, VK64:{ *:[v64i1] }:$src2) 5655 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::KXORQrr, 5656 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 5657 // GIR_Coverage, 3620, 5658 GIR_Done, 5659 // Label 434: @11313 5660 GIM_Reject, 5661 // Label 385: @11314 5662 GIM_Reject, 5663 // Label 6: @11315 5664 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/3, 25, /*)*//*default:*//*Label 451*/ 14607, 5665 /*GILLT_s32*//*Label 435*/ 11343, 5666 /*GILLT_s64*//*Label 436*/ 11505, 0, 0, 0, 5667 /*GILLT_v2s64*//*Label 437*/ 11667, 0, 5668 /*GILLT_v4s32*//*Label 438*/ 11988, 5669 /*GILLT_v4s64*//*Label 439*/ 12309, 0, 5670 /*GILLT_v8s16*//*Label 440*/ 12630, 5671 /*GILLT_v8s32*//*Label 441*/ 12791, 5672 /*GILLT_v8s64*//*Label 442*/ 13112, 0, 5673 /*GILLT_v16s8*//*Label 443*/ 13433, 5674 /*GILLT_v16s16*//*Label 444*/ 13594, 5675 /*GILLT_v16s32*//*Label 445*/ 13755, 5676 /*GILLT_v32s1*//*Label 446*/ 14076, 5677 /*GILLT_v32s8*//*Label 447*/ 14100, 5678 /*GILLT_v32s16*//*Label 448*/ 14261, 5679 /*GILLT_v64s1*//*Label 449*/ 14422, 5680 /*GILLT_v64s8*//*Label 450*/ 14446, 5681 // Label 435: @11343 5682 GIM_Try, /*On fail goto*//*Label 452*/ 11366, // Rule ID 2198 // 5683 GIM_CheckFeatures, GIFBS_UseAVX, 5684 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, 5685 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID, 5686 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, 5687 // (bitconvert:{ *:[f32] } GR32:{ *:[i32] }:$src) => (VMOVDI2SSrr:{ *:[f32] } GR32:{ *:[i32] }:$src) 5688 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMOVDI2SSrr, 5689 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 5690 // GIR_Coverage, 2198, 5691 GIR_Done, 5692 // Label 452: @11366 5693 GIM_Try, /*On fail goto*//*Label 453*/ 11389, // Rule ID 2200 // 5694 GIM_CheckFeatures, GIFBS_UseSSE2, 5695 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, 5696 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID, 5697 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, 5698 // (bitconvert:{ *:[f32] } GR32:{ *:[i32] }:$src) => (MOVDI2SSrr:{ *:[f32] } GR32:{ *:[i32] }:$src) 5699 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::MOVDI2SSrr, 5700 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 5701 // GIR_Coverage, 2200, 5702 GIR_Done, 5703 // Label 453: @11389 5704 GIM_Try, /*On fail goto*//*Label 454*/ 11412, // Rule ID 2214 // 5705 GIM_CheckFeatures, GIFBS_UseAVX, 5706 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, 5707 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, 5708 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID, 5709 // (bitconvert:{ *:[i32] } FR32:{ *:[f32] }:$src) => (VMOVSS2DIrr:{ *:[i32] } FR32:{ *:[f32] }:$src) 5710 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMOVSS2DIrr, 5711 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 5712 // GIR_Coverage, 2214, 5713 GIR_Done, 5714 // Label 454: @11412 5715 GIM_Try, /*On fail goto*//*Label 455*/ 11435, // Rule ID 2216 // 5716 GIM_CheckFeatures, GIFBS_UseSSE2, 5717 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, 5718 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, 5719 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID, 5720 // (bitconvert:{ *:[i32] } FR32:{ *:[f32] }:$src) => (MOVSS2DIrr:{ *:[i32] } FR32:{ *:[f32] }:$src) 5721 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::MOVSS2DIrr, 5722 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 5723 // GIR_Coverage, 2216, 5724 GIR_Done, 5725 // Label 455: @11435 5726 GIM_Try, /*On fail goto*//*Label 456*/ 11458, // Rule ID 3790 // 5727 GIM_CheckFeatures, GIFBS_HasAVX512, 5728 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, 5729 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32XRegClassID, 5730 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, 5731 // (bitconvert:{ *:[f32] } GR32:{ *:[i32] }:$src) => (VMOVDI2SSZrr:{ *:[f32] } GR32:{ *:[i32] }:$src) 5732 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMOVDI2SSZrr, 5733 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 5734 // GIR_Coverage, 3790, 5735 GIR_Done, 5736 // Label 456: @11458 5737 GIM_Try, /*On fail goto*//*Label 457*/ 11481, // Rule ID 3796 // 5738 GIM_CheckFeatures, GIFBS_HasAVX512, 5739 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, 5740 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, 5741 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32XRegClassID, 5742 // (bitconvert:{ *:[i32] } FR32X:{ *:[f32] }:$src) => (VMOVSS2DIZrr:{ *:[i32] } FR32X:{ *:[f32] }:$src) 5743 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMOVSS2DIZrr, 5744 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 5745 // GIR_Coverage, 3796, 5746 GIR_Done, 5747 // Label 457: @11481 5748 GIM_Try, /*On fail goto*//*Label 458*/ 11504, // Rule ID 13743 // 5749 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s1, 5750 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, 5751 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK32RegClassID, 5752 // (bitconvert:{ *:[i32] } VK32:{ *:[v32i1] }:$src) => (COPY_TO_REGCLASS:{ *:[i32] } VK32:{ *:[v32i1] }:$src, GR32:{ *:[i32] }) 5753 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/TargetOpcode::COPY, 5754 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC GR32*/27, 5755 // GIR_Coverage, 13743, 5756 GIR_Done, 5757 // Label 458: @11504 5758 GIM_Reject, 5759 // Label 436: @11505 5760 GIM_Try, /*On fail goto*//*Label 459*/ 11528, // Rule ID 2193 // 5761 GIM_CheckFeatures, GIFBS_UseAVX, 5762 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, 5763 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64RegClassID, 5764 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, 5765 // (bitconvert:{ *:[f64] } GR64:{ *:[i64] }:$src) => (VMOV64toSDrr:{ *:[f64] } GR64:{ *:[i64] }:$src) 5766 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMOV64toSDrr, 5767 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 5768 // GIR_Coverage, 2193, 5769 GIR_Done, 5770 // Label 459: @11528 5771 GIM_Try, /*On fail goto*//*Label 460*/ 11551, // Rule ID 2197 // 5772 GIM_CheckFeatures, GIFBS_UseSSE2, 5773 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, 5774 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64RegClassID, 5775 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, 5776 // (bitconvert:{ *:[f64] } GR64:{ *:[i64] }:$src) => (MOV64toSDrr:{ *:[f64] } GR64:{ *:[i64] }:$src) 5777 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::MOV64toSDrr, 5778 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 5779 // GIR_Coverage, 2197, 5780 GIR_Done, 5781 // Label 460: @11551 5782 GIM_Try, /*On fail goto*//*Label 461*/ 11574, // Rule ID 2209 // 5783 GIM_CheckFeatures, GIFBS_UseAVX, 5784 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, 5785 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, 5786 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64RegClassID, 5787 // (bitconvert:{ *:[i64] } FR64:{ *:[f64] }:$src) => (VMOVSDto64rr:{ *:[i64] } FR64:{ *:[f64] }:$src) 5788 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMOVSDto64rr, 5789 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 5790 // GIR_Coverage, 2209, 5791 GIR_Done, 5792 // Label 461: @11574 5793 GIM_Try, /*On fail goto*//*Label 462*/ 11597, // Rule ID 2212 // 5794 GIM_CheckFeatures, GIFBS_UseSSE2, 5795 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, 5796 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, 5797 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64RegClassID, 5798 // (bitconvert:{ *:[i64] } FR64:{ *:[f64] }:$src) => (MOVSDto64rr:{ *:[i64] } FR64:{ *:[f64] }:$src) 5799 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::MOVSDto64rr, 5800 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 5801 // GIR_Coverage, 2212, 5802 GIR_Done, 5803 // Label 462: @11597 5804 GIM_Try, /*On fail goto*//*Label 463*/ 11620, // Rule ID 3786 // 5805 GIM_CheckFeatures, GIFBS_HasAVX512, 5806 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, 5807 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64XRegClassID, 5808 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, 5809 // (bitconvert:{ *:[f64] } GR64:{ *:[i64] }:$src) => (VMOV64toSDZrr:{ *:[f64] } GR64:{ *:[i64] }:$src) 5810 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMOV64toSDZrr, 5811 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 5812 // GIR_Coverage, 3786, 5813 GIR_Done, 5814 // Label 463: @11620 5815 GIM_Try, /*On fail goto*//*Label 464*/ 11643, // Rule ID 3788 // 5816 GIM_CheckFeatures, GIFBS_HasAVX512, 5817 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, 5818 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, 5819 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64XRegClassID, 5820 // (bitconvert:{ *:[i64] } FR64X:{ *:[f64] }:$src) => (VMOVSDto64Zrr:{ *:[i64] } FR64X:{ *:[f64] }:$src) 5821 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMOVSDto64Zrr, 5822 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 5823 // GIR_Coverage, 3788, 5824 GIR_Done, 5825 // Label 464: @11643 5826 GIM_Try, /*On fail goto*//*Label 465*/ 11666, // Rule ID 13745 // 5827 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v64s1, 5828 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, 5829 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK64RegClassID, 5830 // (bitconvert:{ *:[i64] } VK64:{ *:[v64i1] }:$src) => (COPY_TO_REGCLASS:{ *:[i64] } VK64:{ *:[v64i1] }:$src, GR64:{ *:[i32] }) 5831 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/TargetOpcode::COPY, 5832 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC GR64*/45, 5833 // GIR_Coverage, 13745, 5834 GIR_Done, 5835 // Label 465: @11666 5836 GIM_Reject, 5837 // Label 437: @11667 5838 GIM_Try, /*On fail goto*//*Label 466*/ 11699, // Rule ID 16198 // 5839 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, 5840 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 5841 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, 5842 // (bitconvert:{ *:[v2i64] } VR128:{ *:[v4i32] }:$src) => VR128:{ *:[v2i64] }:$src 5843 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 5844 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 5845 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 5846 GIR_EraseFromParent, /*InsnID*/0, 5847 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VR128*/74, 5848 // GIR_Coverage, 16198, 5849 GIR_Done, 5850 // Label 466: @11699 5851 GIM_Try, /*On fail goto*//*Label 467*/ 11731, // Rule ID 16199 // 5852 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16, 5853 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 5854 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, 5855 // (bitconvert:{ *:[v2i64] } VR128:{ *:[v8i16] }:$src) => VR128:{ *:[v2i64] }:$src 5856 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 5857 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 5858 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 5859 GIR_EraseFromParent, /*InsnID*/0, 5860 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VR128*/74, 5861 // GIR_Coverage, 16199, 5862 GIR_Done, 5863 // Label 467: @11731 5864 GIM_Try, /*On fail goto*//*Label 468*/ 11763, // Rule ID 16200 // 5865 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8, 5866 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 5867 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, 5868 // (bitconvert:{ *:[v2i64] } VR128:{ *:[v16i8] }:$src) => VR128:{ *:[v2i64] }:$src 5869 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 5870 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 5871 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 5872 GIR_EraseFromParent, /*InsnID*/0, 5873 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VR128*/74, 5874 // GIR_Coverage, 16200, 5875 GIR_Done, 5876 // Label 468: @11763 5877 GIM_Try, /*On fail goto*//*Label 469*/ 11795, // Rule ID 16201 // 5878 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64, 5879 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 5880 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, 5881 // (bitconvert:{ *:[v2i64] } VR128:{ *:[v2f64] }:$src) => VR128:{ *:[v2i64] }:$src 5882 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 5883 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 5884 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 5885 GIR_EraseFromParent, /*InsnID*/0, 5886 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VR128*/74, 5887 // GIR_Coverage, 16201, 5888 GIR_Done, 5889 // Label 469: @11795 5890 GIM_Try, /*On fail goto*//*Label 470*/ 11827, // Rule ID 16202 // 5891 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, 5892 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 5893 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, 5894 // (bitconvert:{ *:[v2i64] } VR128:{ *:[v4f32] }:$src) => VR128:{ *:[v2i64] }:$src 5895 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 5896 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 5897 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 5898 GIR_EraseFromParent, /*InsnID*/0, 5899 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VR128*/74, 5900 // GIR_Coverage, 16202, 5901 GIR_Done, 5902 // Label 470: @11827 5903 GIM_Try, /*On fail goto*//*Label 471*/ 11859, // Rule ID 16223 // 5904 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64, 5905 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 5906 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, 5907 // (bitconvert:{ *:[v2f64] } VR128:{ *:[v2i64] }:$src) => VR128:{ *:[v2f64] }:$src 5908 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 5909 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 5910 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 5911 GIR_EraseFromParent, /*InsnID*/0, 5912 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VR128*/74, 5913 // GIR_Coverage, 16223, 5914 GIR_Done, 5915 // Label 471: @11859 5916 GIM_Try, /*On fail goto*//*Label 472*/ 11891, // Rule ID 16224 // 5917 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, 5918 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 5919 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, 5920 // (bitconvert:{ *:[v2f64] } VR128:{ *:[v4i32] }:$src) => VR128:{ *:[v2f64] }:$src 5921 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 5922 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 5923 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 5924 GIR_EraseFromParent, /*InsnID*/0, 5925 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VR128*/74, 5926 // GIR_Coverage, 16224, 5927 GIR_Done, 5928 // Label 472: @11891 5929 GIM_Try, /*On fail goto*//*Label 473*/ 11923, // Rule ID 16225 // 5930 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16, 5931 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 5932 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, 5933 // (bitconvert:{ *:[v2f64] } VR128:{ *:[v8i16] }:$src) => VR128:{ *:[v2f64] }:$src 5934 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 5935 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 5936 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 5937 GIR_EraseFromParent, /*InsnID*/0, 5938 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VR128*/74, 5939 // GIR_Coverage, 16225, 5940 GIR_Done, 5941 // Label 473: @11923 5942 GIM_Try, /*On fail goto*//*Label 474*/ 11955, // Rule ID 16226 // 5943 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8, 5944 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 5945 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, 5946 // (bitconvert:{ *:[v2f64] } VR128:{ *:[v16i8] }:$src) => VR128:{ *:[v2f64] }:$src 5947 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 5948 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 5949 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 5950 GIR_EraseFromParent, /*InsnID*/0, 5951 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VR128*/74, 5952 // GIR_Coverage, 16226, 5953 GIR_Done, 5954 // Label 474: @11955 5955 GIM_Try, /*On fail goto*//*Label 475*/ 11987, // Rule ID 16227 // 5956 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, 5957 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 5958 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, 5959 // (bitconvert:{ *:[v2f64] } VR128:{ *:[v4f32] }:$src) => VR128:{ *:[v2f64] }:$src 5960 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 5961 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 5962 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 5963 GIR_EraseFromParent, /*InsnID*/0, 5964 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VR128*/74, 5965 // GIR_Coverage, 16227, 5966 GIR_Done, 5967 // Label 475: @11987 5968 GIM_Reject, 5969 // Label 438: @11988 5970 GIM_Try, /*On fail goto*//*Label 476*/ 12020, // Rule ID 16203 // 5971 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64, 5972 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 5973 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, 5974 // (bitconvert:{ *:[v4i32] } VR128:{ *:[v2i64] }:$src) => VR128:{ *:[v4i32] }:$src 5975 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 5976 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 5977 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 5978 GIR_EraseFromParent, /*InsnID*/0, 5979 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VR128*/74, 5980 // GIR_Coverage, 16203, 5981 GIR_Done, 5982 // Label 476: @12020 5983 GIM_Try, /*On fail goto*//*Label 477*/ 12052, // Rule ID 16204 // 5984 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16, 5985 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 5986 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, 5987 // (bitconvert:{ *:[v4i32] } VR128:{ *:[v8i16] }:$src) => VR128:{ *:[v4i32] }:$src 5988 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 5989 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 5990 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 5991 GIR_EraseFromParent, /*InsnID*/0, 5992 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VR128*/74, 5993 // GIR_Coverage, 16204, 5994 GIR_Done, 5995 // Label 477: @12052 5996 GIM_Try, /*On fail goto*//*Label 478*/ 12084, // Rule ID 16205 // 5997 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8, 5998 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 5999 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, 6000 // (bitconvert:{ *:[v4i32] } VR128:{ *:[v16i8] }:$src) => VR128:{ *:[v4i32] }:$src 6001 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 6002 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 6003 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 6004 GIR_EraseFromParent, /*InsnID*/0, 6005 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VR128*/74, 6006 // GIR_Coverage, 16205, 6007 GIR_Done, 6008 // Label 478: @12084 6009 GIM_Try, /*On fail goto*//*Label 479*/ 12116, // Rule ID 16206 // 6010 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64, 6011 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 6012 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, 6013 // (bitconvert:{ *:[v4i32] } VR128:{ *:[v2f64] }:$src) => VR128:{ *:[v4i32] }:$src 6014 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 6015 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 6016 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 6017 GIR_EraseFromParent, /*InsnID*/0, 6018 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VR128*/74, 6019 // GIR_Coverage, 16206, 6020 GIR_Done, 6021 // Label 479: @12116 6022 GIM_Try, /*On fail goto*//*Label 480*/ 12148, // Rule ID 16207 // 6023 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, 6024 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 6025 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, 6026 // (bitconvert:{ *:[v4i32] } VR128:{ *:[v4f32] }:$src) => VR128:{ *:[v4i32] }:$src 6027 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 6028 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 6029 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 6030 GIR_EraseFromParent, /*InsnID*/0, 6031 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VR128*/74, 6032 // GIR_Coverage, 16207, 6033 GIR_Done, 6034 // Label 480: @12148 6035 GIM_Try, /*On fail goto*//*Label 481*/ 12180, // Rule ID 16218 // 6036 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64, 6037 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 6038 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, 6039 // (bitconvert:{ *:[v4f32] } VR128:{ *:[v2i64] }:$src) => VR128:{ *:[v4f32] }:$src 6040 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 6041 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 6042 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 6043 GIR_EraseFromParent, /*InsnID*/0, 6044 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VR128*/74, 6045 // GIR_Coverage, 16218, 6046 GIR_Done, 6047 // Label 481: @12180 6048 GIM_Try, /*On fail goto*//*Label 482*/ 12212, // Rule ID 16219 // 6049 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, 6050 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 6051 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, 6052 // (bitconvert:{ *:[v4f32] } VR128:{ *:[v4i32] }:$src) => VR128:{ *:[v4f32] }:$src 6053 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 6054 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 6055 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 6056 GIR_EraseFromParent, /*InsnID*/0, 6057 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VR128*/74, 6058 // GIR_Coverage, 16219, 6059 GIR_Done, 6060 // Label 482: @12212 6061 GIM_Try, /*On fail goto*//*Label 483*/ 12244, // Rule ID 16220 // 6062 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16, 6063 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 6064 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, 6065 // (bitconvert:{ *:[v4f32] } VR128:{ *:[v8i16] }:$src) => VR128:{ *:[v4f32] }:$src 6066 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 6067 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 6068 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 6069 GIR_EraseFromParent, /*InsnID*/0, 6070 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VR128*/74, 6071 // GIR_Coverage, 16220, 6072 GIR_Done, 6073 // Label 483: @12244 6074 GIM_Try, /*On fail goto*//*Label 484*/ 12276, // Rule ID 16221 // 6075 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8, 6076 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 6077 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, 6078 // (bitconvert:{ *:[v4f32] } VR128:{ *:[v16i8] }:$src) => VR128:{ *:[v4f32] }:$src 6079 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 6080 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 6081 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 6082 GIR_EraseFromParent, /*InsnID*/0, 6083 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VR128*/74, 6084 // GIR_Coverage, 16221, 6085 GIR_Done, 6086 // Label 484: @12276 6087 GIM_Try, /*On fail goto*//*Label 485*/ 12308, // Rule ID 16222 // 6088 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64, 6089 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 6090 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, 6091 // (bitconvert:{ *:[v4f32] } VR128:{ *:[v2f64] }:$src) => VR128:{ *:[v4f32] }:$src 6092 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 6093 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 6094 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 6095 GIR_EraseFromParent, /*InsnID*/0, 6096 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VR128*/74, 6097 // GIR_Coverage, 16222, 6098 GIR_Done, 6099 // Label 485: @12308 6100 GIM_Reject, 6101 // Label 439: @12309 6102 GIM_Try, /*On fail goto*//*Label 486*/ 12341, // Rule ID 16228 // 6103 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32, 6104 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, 6105 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, 6106 // (bitconvert:{ *:[v4i64] } VR256:{ *:[v8i32] }:$src) => VR256:{ *:[v4i64] }:$src 6107 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 6108 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 6109 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 6110 GIR_EraseFromParent, /*InsnID*/0, 6111 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VR256*/79, 6112 // GIR_Coverage, 16228, 6113 GIR_Done, 6114 // Label 486: @12341 6115 GIM_Try, /*On fail goto*//*Label 487*/ 12373, // Rule ID 16229 // 6116 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s16, 6117 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, 6118 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, 6119 // (bitconvert:{ *:[v4i64] } VR256:{ *:[v16i16] }:$src) => VR256:{ *:[v4i64] }:$src 6120 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 6121 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 6122 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 6123 GIR_EraseFromParent, /*InsnID*/0, 6124 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VR256*/79, 6125 // GIR_Coverage, 16229, 6126 GIR_Done, 6127 // Label 487: @12373 6128 GIM_Try, /*On fail goto*//*Label 488*/ 12405, // Rule ID 16230 // 6129 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s8, 6130 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, 6131 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, 6132 // (bitconvert:{ *:[v4i64] } VR256:{ *:[v32i8] }:$src) => VR256:{ *:[v4i64] }:$src 6133 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 6134 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 6135 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 6136 GIR_EraseFromParent, /*InsnID*/0, 6137 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VR256*/79, 6138 // GIR_Coverage, 16230, 6139 GIR_Done, 6140 // Label 488: @12405 6141 GIM_Try, /*On fail goto*//*Label 489*/ 12437, // Rule ID 16231 // 6142 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32, 6143 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, 6144 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, 6145 // (bitconvert:{ *:[v4i64] } VR256:{ *:[v8f32] }:$src) => VR256:{ *:[v4i64] }:$src 6146 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 6147 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 6148 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 6149 GIR_EraseFromParent, /*InsnID*/0, 6150 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VR256*/79, 6151 // GIR_Coverage, 16231, 6152 GIR_Done, 6153 // Label 489: @12437 6154 GIM_Try, /*On fail goto*//*Label 490*/ 12469, // Rule ID 16232 // 6155 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64, 6156 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, 6157 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, 6158 // (bitconvert:{ *:[v4i64] } VR256:{ *:[v4f64] }:$src) => VR256:{ *:[v4i64] }:$src 6159 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 6160 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 6161 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 6162 GIR_EraseFromParent, /*InsnID*/0, 6163 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VR256*/79, 6164 // GIR_Coverage, 16232, 6165 GIR_Done, 6166 // Label 490: @12469 6167 GIM_Try, /*On fail goto*//*Label 491*/ 12501, // Rule ID 16253 // 6168 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64, 6169 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, 6170 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, 6171 // (bitconvert:{ *:[v4f64] } VR256:{ *:[v4i64] }:$src) => VR256:{ *:[v4f64] }:$src 6172 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 6173 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 6174 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 6175 GIR_EraseFromParent, /*InsnID*/0, 6176 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VR256*/79, 6177 // GIR_Coverage, 16253, 6178 GIR_Done, 6179 // Label 491: @12501 6180 GIM_Try, /*On fail goto*//*Label 492*/ 12533, // Rule ID 16254 // 6181 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32, 6182 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, 6183 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, 6184 // (bitconvert:{ *:[v4f64] } VR256:{ *:[v8i32] }:$src) => VR256:{ *:[v4f64] }:$src 6185 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 6186 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 6187 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 6188 GIR_EraseFromParent, /*InsnID*/0, 6189 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VR256*/79, 6190 // GIR_Coverage, 16254, 6191 GIR_Done, 6192 // Label 492: @12533 6193 GIM_Try, /*On fail goto*//*Label 493*/ 12565, // Rule ID 16255 // 6194 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s16, 6195 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, 6196 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, 6197 // (bitconvert:{ *:[v4f64] } VR256:{ *:[v16i16] }:$src) => VR256:{ *:[v4f64] }:$src 6198 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 6199 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 6200 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 6201 GIR_EraseFromParent, /*InsnID*/0, 6202 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VR256*/79, 6203 // GIR_Coverage, 16255, 6204 GIR_Done, 6205 // Label 493: @12565 6206 GIM_Try, /*On fail goto*//*Label 494*/ 12597, // Rule ID 16256 // 6207 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s8, 6208 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, 6209 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, 6210 // (bitconvert:{ *:[v4f64] } VR256:{ *:[v32i8] }:$src) => VR256:{ *:[v4f64] }:$src 6211 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 6212 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 6213 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 6214 GIR_EraseFromParent, /*InsnID*/0, 6215 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VR256*/79, 6216 // GIR_Coverage, 16256, 6217 GIR_Done, 6218 // Label 494: @12597 6219 GIM_Try, /*On fail goto*//*Label 495*/ 12629, // Rule ID 16257 // 6220 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32, 6221 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, 6222 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, 6223 // (bitconvert:{ *:[v4f64] } VR256:{ *:[v8f32] }:$src) => VR256:{ *:[v4f64] }:$src 6224 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 6225 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 6226 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 6227 GIR_EraseFromParent, /*InsnID*/0, 6228 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VR256*/79, 6229 // GIR_Coverage, 16257, 6230 GIR_Done, 6231 // Label 495: @12629 6232 GIM_Reject, 6233 // Label 440: @12630 6234 GIM_Try, /*On fail goto*//*Label 496*/ 12662, // Rule ID 16208 // 6235 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64, 6236 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 6237 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, 6238 // (bitconvert:{ *:[v8i16] } VR128:{ *:[v2i64] }:$src) => VR128:{ *:[v8i16] }:$src 6239 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 6240 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 6241 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 6242 GIR_EraseFromParent, /*InsnID*/0, 6243 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VR128*/74, 6244 // GIR_Coverage, 16208, 6245 GIR_Done, 6246 // Label 496: @12662 6247 GIM_Try, /*On fail goto*//*Label 497*/ 12694, // Rule ID 16209 // 6248 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, 6249 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 6250 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, 6251 // (bitconvert:{ *:[v8i16] } VR128:{ *:[v4i32] }:$src) => VR128:{ *:[v8i16] }:$src 6252 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 6253 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 6254 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 6255 GIR_EraseFromParent, /*InsnID*/0, 6256 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VR128*/74, 6257 // GIR_Coverage, 16209, 6258 GIR_Done, 6259 // Label 497: @12694 6260 GIM_Try, /*On fail goto*//*Label 498*/ 12726, // Rule ID 16210 // 6261 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8, 6262 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 6263 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, 6264 // (bitconvert:{ *:[v8i16] } VR128:{ *:[v16i8] }:$src) => VR128:{ *:[v8i16] }:$src 6265 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 6266 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 6267 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 6268 GIR_EraseFromParent, /*InsnID*/0, 6269 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VR128*/74, 6270 // GIR_Coverage, 16210, 6271 GIR_Done, 6272 // Label 498: @12726 6273 GIM_Try, /*On fail goto*//*Label 499*/ 12758, // Rule ID 16211 // 6274 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64, 6275 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 6276 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, 6277 // (bitconvert:{ *:[v8i16] } VR128:{ *:[v2f64] }:$src) => VR128:{ *:[v8i16] }:$src 6278 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 6279 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 6280 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 6281 GIR_EraseFromParent, /*InsnID*/0, 6282 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VR128*/74, 6283 // GIR_Coverage, 16211, 6284 GIR_Done, 6285 // Label 499: @12758 6286 GIM_Try, /*On fail goto*//*Label 500*/ 12790, // Rule ID 16212 // 6287 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, 6288 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 6289 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, 6290 // (bitconvert:{ *:[v8i16] } VR128:{ *:[v4f32] }:$src) => VR128:{ *:[v8i16] }:$src 6291 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 6292 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 6293 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 6294 GIR_EraseFromParent, /*InsnID*/0, 6295 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VR128*/74, 6296 // GIR_Coverage, 16212, 6297 GIR_Done, 6298 // Label 500: @12790 6299 GIM_Reject, 6300 // Label 441: @12791 6301 GIM_Try, /*On fail goto*//*Label 501*/ 12823, // Rule ID 16233 // 6302 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64, 6303 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, 6304 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, 6305 // (bitconvert:{ *:[v8i32] } VR256:{ *:[v4i64] }:$src) => VR256:{ *:[v8i32] }:$src 6306 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 6307 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 6308 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 6309 GIR_EraseFromParent, /*InsnID*/0, 6310 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VR256*/79, 6311 // GIR_Coverage, 16233, 6312 GIR_Done, 6313 // Label 501: @12823 6314 GIM_Try, /*On fail goto*//*Label 502*/ 12855, // Rule ID 16234 // 6315 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s16, 6316 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, 6317 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, 6318 // (bitconvert:{ *:[v8i32] } VR256:{ *:[v16i16] }:$src) => VR256:{ *:[v8i32] }:$src 6319 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 6320 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 6321 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 6322 GIR_EraseFromParent, /*InsnID*/0, 6323 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VR256*/79, 6324 // GIR_Coverage, 16234, 6325 GIR_Done, 6326 // Label 502: @12855 6327 GIM_Try, /*On fail goto*//*Label 503*/ 12887, // Rule ID 16235 // 6328 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s8, 6329 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, 6330 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, 6331 // (bitconvert:{ *:[v8i32] } VR256:{ *:[v32i8] }:$src) => VR256:{ *:[v8i32] }:$src 6332 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 6333 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 6334 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 6335 GIR_EraseFromParent, /*InsnID*/0, 6336 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VR256*/79, 6337 // GIR_Coverage, 16235, 6338 GIR_Done, 6339 // Label 503: @12887 6340 GIM_Try, /*On fail goto*//*Label 504*/ 12919, // Rule ID 16236 // 6341 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64, 6342 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, 6343 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, 6344 // (bitconvert:{ *:[v8i32] } VR256:{ *:[v4f64] }:$src) => VR256:{ *:[v8i32] }:$src 6345 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 6346 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 6347 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 6348 GIR_EraseFromParent, /*InsnID*/0, 6349 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VR256*/79, 6350 // GIR_Coverage, 16236, 6351 GIR_Done, 6352 // Label 504: @12919 6353 GIM_Try, /*On fail goto*//*Label 505*/ 12951, // Rule ID 16237 // 6354 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32, 6355 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, 6356 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, 6357 // (bitconvert:{ *:[v8i32] } VR256:{ *:[v8f32] }:$src) => VR256:{ *:[v8i32] }:$src 6358 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 6359 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 6360 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 6361 GIR_EraseFromParent, /*InsnID*/0, 6362 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VR256*/79, 6363 // GIR_Coverage, 16237, 6364 GIR_Done, 6365 // Label 505: @12951 6366 GIM_Try, /*On fail goto*//*Label 506*/ 12983, // Rule ID 16248 // 6367 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64, 6368 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, 6369 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, 6370 // (bitconvert:{ *:[v8f32] } VR256:{ *:[v4i64] }:$src) => VR256:{ *:[v8f32] }:$src 6371 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 6372 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 6373 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 6374 GIR_EraseFromParent, /*InsnID*/0, 6375 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VR256*/79, 6376 // GIR_Coverage, 16248, 6377 GIR_Done, 6378 // Label 506: @12983 6379 GIM_Try, /*On fail goto*//*Label 507*/ 13015, // Rule ID 16249 // 6380 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32, 6381 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, 6382 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, 6383 // (bitconvert:{ *:[v8f32] } VR256:{ *:[v8i32] }:$src) => VR256:{ *:[v8f32] }:$src 6384 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 6385 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 6386 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 6387 GIR_EraseFromParent, /*InsnID*/0, 6388 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VR256*/79, 6389 // GIR_Coverage, 16249, 6390 GIR_Done, 6391 // Label 507: @13015 6392 GIM_Try, /*On fail goto*//*Label 508*/ 13047, // Rule ID 16250 // 6393 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s16, 6394 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, 6395 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, 6396 // (bitconvert:{ *:[v8f32] } VR256:{ *:[v16i16] }:$src) => VR256:{ *:[v8f32] }:$src 6397 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 6398 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 6399 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 6400 GIR_EraseFromParent, /*InsnID*/0, 6401 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VR256*/79, 6402 // GIR_Coverage, 16250, 6403 GIR_Done, 6404 // Label 508: @13047 6405 GIM_Try, /*On fail goto*//*Label 509*/ 13079, // Rule ID 16251 // 6406 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s8, 6407 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, 6408 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, 6409 // (bitconvert:{ *:[v8f32] } VR256:{ *:[v32i8] }:$src) => VR256:{ *:[v8f32] }:$src 6410 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 6411 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 6412 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 6413 GIR_EraseFromParent, /*InsnID*/0, 6414 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VR256*/79, 6415 // GIR_Coverage, 16251, 6416 GIR_Done, 6417 // Label 509: @13079 6418 GIM_Try, /*On fail goto*//*Label 510*/ 13111, // Rule ID 16252 // 6419 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64, 6420 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, 6421 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, 6422 // (bitconvert:{ *:[v8f32] } VR256:{ *:[v4f64] }:$src) => VR256:{ *:[v8f32] }:$src 6423 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 6424 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 6425 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 6426 GIR_EraseFromParent, /*InsnID*/0, 6427 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VR256*/79, 6428 // GIR_Coverage, 16252, 6429 GIR_Done, 6430 // Label 510: @13111 6431 GIM_Reject, 6432 // Label 442: @13112 6433 GIM_Try, /*On fail goto*//*Label 511*/ 13144, // Rule ID 16258 // 6434 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64, 6435 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, 6436 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, 6437 // (bitconvert:{ *:[v8f64] } VR512:{ *:[v8i64] }:$src) => VR512:{ *:[v8f64] }:$src 6438 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 6439 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 6440 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 6441 GIR_EraseFromParent, /*InsnID*/0, 6442 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VR512*/82, 6443 // GIR_Coverage, 16258, 6444 GIR_Done, 6445 // Label 511: @13144 6446 GIM_Try, /*On fail goto*//*Label 512*/ 13176, // Rule ID 16259 // 6447 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32, 6448 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, 6449 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, 6450 // (bitconvert:{ *:[v8f64] } VR512:{ *:[v16i32] }:$src) => VR512:{ *:[v8f64] }:$src 6451 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 6452 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 6453 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 6454 GIR_EraseFromParent, /*InsnID*/0, 6455 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VR512*/82, 6456 // GIR_Coverage, 16259, 6457 GIR_Done, 6458 // Label 512: @13176 6459 GIM_Try, /*On fail goto*//*Label 513*/ 13208, // Rule ID 16260 // 6460 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s16, 6461 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, 6462 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, 6463 // (bitconvert:{ *:[v8f64] } VR512:{ *:[v32i16] }:$src) => VR512:{ *:[v8f64] }:$src 6464 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 6465 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 6466 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 6467 GIR_EraseFromParent, /*InsnID*/0, 6468 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VR512*/82, 6469 // GIR_Coverage, 16260, 6470 GIR_Done, 6471 // Label 513: @13208 6472 GIM_Try, /*On fail goto*//*Label 514*/ 13240, // Rule ID 16261 // 6473 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v64s8, 6474 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, 6475 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, 6476 // (bitconvert:{ *:[v8f64] } VR512:{ *:[v64i8] }:$src) => VR512:{ *:[v8f64] }:$src 6477 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 6478 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 6479 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 6480 GIR_EraseFromParent, /*InsnID*/0, 6481 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VR512*/82, 6482 // GIR_Coverage, 16261, 6483 GIR_Done, 6484 // Label 514: @13240 6485 GIM_Try, /*On fail goto*//*Label 515*/ 13272, // Rule ID 16262 // 6486 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32, 6487 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, 6488 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, 6489 // (bitconvert:{ *:[v8f64] } VR512:{ *:[v16f32] }:$src) => VR512:{ *:[v8f64] }:$src 6490 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 6491 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 6492 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 6493 GIR_EraseFromParent, /*InsnID*/0, 6494 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VR512*/82, 6495 // GIR_Coverage, 16262, 6496 GIR_Done, 6497 // Label 515: @13272 6498 GIM_Try, /*On fail goto*//*Label 516*/ 13304, // Rule ID 16268 // 6499 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32, 6500 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, 6501 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, 6502 // (bitconvert:{ *:[v8i64] } VR512:{ *:[v16i32] }:$src) => VR512:{ *:[v8i64] }:$src 6503 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 6504 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 6505 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 6506 GIR_EraseFromParent, /*InsnID*/0, 6507 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VR512*/82, 6508 // GIR_Coverage, 16268, 6509 GIR_Done, 6510 // Label 516: @13304 6511 GIM_Try, /*On fail goto*//*Label 517*/ 13336, // Rule ID 16269 // 6512 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s16, 6513 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, 6514 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, 6515 // (bitconvert:{ *:[v8i64] } VR512:{ *:[v32i16] }:$src) => VR512:{ *:[v8i64] }:$src 6516 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 6517 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 6518 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 6519 GIR_EraseFromParent, /*InsnID*/0, 6520 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VR512*/82, 6521 // GIR_Coverage, 16269, 6522 GIR_Done, 6523 // Label 517: @13336 6524 GIM_Try, /*On fail goto*//*Label 518*/ 13368, // Rule ID 16270 // 6525 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v64s8, 6526 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, 6527 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, 6528 // (bitconvert:{ *:[v8i64] } VR512:{ *:[v64i8] }:$src) => VR512:{ *:[v8i64] }:$src 6529 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 6530 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 6531 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 6532 GIR_EraseFromParent, /*InsnID*/0, 6533 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VR512*/82, 6534 // GIR_Coverage, 16270, 6535 GIR_Done, 6536 // Label 518: @13368 6537 GIM_Try, /*On fail goto*//*Label 519*/ 13400, // Rule ID 16271 // 6538 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64, 6539 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, 6540 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, 6541 // (bitconvert:{ *:[v8i64] } VR512:{ *:[v8f64] }:$src) => VR512:{ *:[v8i64] }:$src 6542 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 6543 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 6544 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 6545 GIR_EraseFromParent, /*InsnID*/0, 6546 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VR512*/82, 6547 // GIR_Coverage, 16271, 6548 GIR_Done, 6549 // Label 519: @13400 6550 GIM_Try, /*On fail goto*//*Label 520*/ 13432, // Rule ID 16272 // 6551 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32, 6552 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, 6553 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, 6554 // (bitconvert:{ *:[v8i64] } VR512:{ *:[v16f32] }:$src) => VR512:{ *:[v8i64] }:$src 6555 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 6556 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 6557 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 6558 GIR_EraseFromParent, /*InsnID*/0, 6559 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VR512*/82, 6560 // GIR_Coverage, 16272, 6561 GIR_Done, 6562 // Label 520: @13432 6563 GIM_Reject, 6564 // Label 443: @13433 6565 GIM_Try, /*On fail goto*//*Label 521*/ 13465, // Rule ID 16213 // 6566 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64, 6567 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 6568 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, 6569 // (bitconvert:{ *:[v16i8] } VR128:{ *:[v2i64] }:$src) => VR128:{ *:[v16i8] }:$src 6570 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 6571 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 6572 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 6573 GIR_EraseFromParent, /*InsnID*/0, 6574 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VR128*/74, 6575 // GIR_Coverage, 16213, 6576 GIR_Done, 6577 // Label 521: @13465 6578 GIM_Try, /*On fail goto*//*Label 522*/ 13497, // Rule ID 16214 // 6579 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, 6580 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 6581 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, 6582 // (bitconvert:{ *:[v16i8] } VR128:{ *:[v4i32] }:$src) => VR128:{ *:[v16i8] }:$src 6583 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 6584 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 6585 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 6586 GIR_EraseFromParent, /*InsnID*/0, 6587 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VR128*/74, 6588 // GIR_Coverage, 16214, 6589 GIR_Done, 6590 // Label 522: @13497 6591 GIM_Try, /*On fail goto*//*Label 523*/ 13529, // Rule ID 16215 // 6592 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16, 6593 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 6594 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, 6595 // (bitconvert:{ *:[v16i8] } VR128:{ *:[v8i16] }:$src) => VR128:{ *:[v16i8] }:$src 6596 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 6597 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 6598 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 6599 GIR_EraseFromParent, /*InsnID*/0, 6600 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VR128*/74, 6601 // GIR_Coverage, 16215, 6602 GIR_Done, 6603 // Label 523: @13529 6604 GIM_Try, /*On fail goto*//*Label 524*/ 13561, // Rule ID 16216 // 6605 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64, 6606 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 6607 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, 6608 // (bitconvert:{ *:[v16i8] } VR128:{ *:[v2f64] }:$src) => VR128:{ *:[v16i8] }:$src 6609 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 6610 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 6611 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 6612 GIR_EraseFromParent, /*InsnID*/0, 6613 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VR128*/74, 6614 // GIR_Coverage, 16216, 6615 GIR_Done, 6616 // Label 524: @13561 6617 GIM_Try, /*On fail goto*//*Label 525*/ 13593, // Rule ID 16217 // 6618 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, 6619 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 6620 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, 6621 // (bitconvert:{ *:[v16i8] } VR128:{ *:[v4f32] }:$src) => VR128:{ *:[v16i8] }:$src 6622 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 6623 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 6624 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 6625 GIR_EraseFromParent, /*InsnID*/0, 6626 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VR128*/74, 6627 // GIR_Coverage, 16217, 6628 GIR_Done, 6629 // Label 525: @13593 6630 GIM_Reject, 6631 // Label 444: @13594 6632 GIM_Try, /*On fail goto*//*Label 526*/ 13626, // Rule ID 16238 // 6633 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64, 6634 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, 6635 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, 6636 // (bitconvert:{ *:[v16i16] } VR256:{ *:[v4i64] }:$src) => VR256:{ *:[v16i16] }:$src 6637 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 6638 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 6639 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 6640 GIR_EraseFromParent, /*InsnID*/0, 6641 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VR256*/79, 6642 // GIR_Coverage, 16238, 6643 GIR_Done, 6644 // Label 526: @13626 6645 GIM_Try, /*On fail goto*//*Label 527*/ 13658, // Rule ID 16239 // 6646 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32, 6647 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, 6648 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, 6649 // (bitconvert:{ *:[v16i16] } VR256:{ *:[v8i32] }:$src) => VR256:{ *:[v16i16] }:$src 6650 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 6651 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 6652 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 6653 GIR_EraseFromParent, /*InsnID*/0, 6654 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VR256*/79, 6655 // GIR_Coverage, 16239, 6656 GIR_Done, 6657 // Label 527: @13658 6658 GIM_Try, /*On fail goto*//*Label 528*/ 13690, // Rule ID 16240 // 6659 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s8, 6660 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, 6661 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, 6662 // (bitconvert:{ *:[v16i16] } VR256:{ *:[v32i8] }:$src) => VR256:{ *:[v16i16] }:$src 6663 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 6664 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 6665 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 6666 GIR_EraseFromParent, /*InsnID*/0, 6667 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VR256*/79, 6668 // GIR_Coverage, 16240, 6669 GIR_Done, 6670 // Label 528: @13690 6671 GIM_Try, /*On fail goto*//*Label 529*/ 13722, // Rule ID 16241 // 6672 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64, 6673 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, 6674 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, 6675 // (bitconvert:{ *:[v16i16] } VR256:{ *:[v4f64] }:$src) => VR256:{ *:[v16i16] }:$src 6676 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 6677 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 6678 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 6679 GIR_EraseFromParent, /*InsnID*/0, 6680 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VR256*/79, 6681 // GIR_Coverage, 16241, 6682 GIR_Done, 6683 // Label 529: @13722 6684 GIM_Try, /*On fail goto*//*Label 530*/ 13754, // Rule ID 16242 // 6685 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32, 6686 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, 6687 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, 6688 // (bitconvert:{ *:[v16i16] } VR256:{ *:[v8f32] }:$src) => VR256:{ *:[v16i16] }:$src 6689 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 6690 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 6691 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 6692 GIR_EraseFromParent, /*InsnID*/0, 6693 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VR256*/79, 6694 // GIR_Coverage, 16242, 6695 GIR_Done, 6696 // Label 530: @13754 6697 GIM_Reject, 6698 // Label 445: @13755 6699 GIM_Try, /*On fail goto*//*Label 531*/ 13787, // Rule ID 16263 // 6700 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64, 6701 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, 6702 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, 6703 // (bitconvert:{ *:[v16f32] } VR512:{ *:[v8i64] }:$src) => VR512:{ *:[v16f32] }:$src 6704 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 6705 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 6706 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 6707 GIR_EraseFromParent, /*InsnID*/0, 6708 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VR512*/82, 6709 // GIR_Coverage, 16263, 6710 GIR_Done, 6711 // Label 531: @13787 6712 GIM_Try, /*On fail goto*//*Label 532*/ 13819, // Rule ID 16264 // 6713 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32, 6714 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, 6715 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, 6716 // (bitconvert:{ *:[v16f32] } VR512:{ *:[v16i32] }:$src) => VR512:{ *:[v16f32] }:$src 6717 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 6718 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 6719 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 6720 GIR_EraseFromParent, /*InsnID*/0, 6721 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VR512*/82, 6722 // GIR_Coverage, 16264, 6723 GIR_Done, 6724 // Label 532: @13819 6725 GIM_Try, /*On fail goto*//*Label 533*/ 13851, // Rule ID 16265 // 6726 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s16, 6727 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, 6728 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, 6729 // (bitconvert:{ *:[v16f32] } VR512:{ *:[v32i16] }:$src) => VR512:{ *:[v16f32] }:$src 6730 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 6731 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 6732 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 6733 GIR_EraseFromParent, /*InsnID*/0, 6734 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VR512*/82, 6735 // GIR_Coverage, 16265, 6736 GIR_Done, 6737 // Label 533: @13851 6738 GIM_Try, /*On fail goto*//*Label 534*/ 13883, // Rule ID 16266 // 6739 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v64s8, 6740 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, 6741 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, 6742 // (bitconvert:{ *:[v16f32] } VR512:{ *:[v64i8] }:$src) => VR512:{ *:[v16f32] }:$src 6743 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 6744 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 6745 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 6746 GIR_EraseFromParent, /*InsnID*/0, 6747 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VR512*/82, 6748 // GIR_Coverage, 16266, 6749 GIR_Done, 6750 // Label 534: @13883 6751 GIM_Try, /*On fail goto*//*Label 535*/ 13915, // Rule ID 16267 // 6752 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64, 6753 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, 6754 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, 6755 // (bitconvert:{ *:[v16f32] } VR512:{ *:[v8f64] }:$src) => VR512:{ *:[v16f32] }:$src 6756 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 6757 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 6758 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 6759 GIR_EraseFromParent, /*InsnID*/0, 6760 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VR512*/82, 6761 // GIR_Coverage, 16267, 6762 GIR_Done, 6763 // Label 535: @13915 6764 GIM_Try, /*On fail goto*//*Label 536*/ 13947, // Rule ID 16273 // 6765 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64, 6766 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, 6767 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, 6768 // (bitconvert:{ *:[v16i32] } VR512:{ *:[v8i64] }:$src) => VR512:{ *:[v16i32] }:$src 6769 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 6770 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 6771 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 6772 GIR_EraseFromParent, /*InsnID*/0, 6773 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VR512*/82, 6774 // GIR_Coverage, 16273, 6775 GIR_Done, 6776 // Label 536: @13947 6777 GIM_Try, /*On fail goto*//*Label 537*/ 13979, // Rule ID 16274 // 6778 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32, 6779 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, 6780 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, 6781 // (bitconvert:{ *:[v16i32] } VR512:{ *:[v16f32] }:$src) => VR512:{ *:[v16i32] }:$src 6782 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 6783 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 6784 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 6785 GIR_EraseFromParent, /*InsnID*/0, 6786 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VR512*/82, 6787 // GIR_Coverage, 16274, 6788 GIR_Done, 6789 // Label 537: @13979 6790 GIM_Try, /*On fail goto*//*Label 538*/ 14011, // Rule ID 16275 // 6791 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s16, 6792 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, 6793 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, 6794 // (bitconvert:{ *:[v16i32] } VR512:{ *:[v32i16] }:$src) => VR512:{ *:[v16i32] }:$src 6795 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 6796 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 6797 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 6798 GIR_EraseFromParent, /*InsnID*/0, 6799 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VR512*/82, 6800 // GIR_Coverage, 16275, 6801 GIR_Done, 6802 // Label 538: @14011 6803 GIM_Try, /*On fail goto*//*Label 539*/ 14043, // Rule ID 16276 // 6804 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v64s8, 6805 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, 6806 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, 6807 // (bitconvert:{ *:[v16i32] } VR512:{ *:[v64i8] }:$src) => VR512:{ *:[v16i32] }:$src 6808 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 6809 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 6810 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 6811 GIR_EraseFromParent, /*InsnID*/0, 6812 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VR512*/82, 6813 // GIR_Coverage, 16276, 6814 GIR_Done, 6815 // Label 539: @14043 6816 GIM_Try, /*On fail goto*//*Label 540*/ 14075, // Rule ID 16277 // 6817 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64, 6818 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, 6819 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, 6820 // (bitconvert:{ *:[v16i32] } VR512:{ *:[v8f64] }:$src) => VR512:{ *:[v16i32] }:$src 6821 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 6822 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 6823 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 6824 GIR_EraseFromParent, /*InsnID*/0, 6825 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VR512*/82, 6826 // GIR_Coverage, 16277, 6827 GIR_Done, 6828 // Label 540: @14075 6829 GIM_Reject, 6830 // Label 446: @14076 6831 GIM_Try, /*On fail goto*//*Label 541*/ 14099, // Rule ID 13742 // 6832 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, 6833 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK32RegClassID, 6834 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, 6835 // (bitconvert:{ *:[v32i1] } GR32:{ *:[i32] }:$src) => (COPY_TO_REGCLASS:{ *:[v32i1] } GR32:{ *:[i32] }:$src, VK32:{ *:[i32] }) 6836 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/TargetOpcode::COPY, 6837 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VK32*/31, 6838 // GIR_Coverage, 13742, 6839 GIR_Done, 6840 // Label 541: @14099 6841 GIM_Reject, 6842 // Label 447: @14100 6843 GIM_Try, /*On fail goto*//*Label 542*/ 14132, // Rule ID 16243 // 6844 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64, 6845 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, 6846 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, 6847 // (bitconvert:{ *:[v32i8] } VR256:{ *:[v4i64] }:$src) => VR256:{ *:[v32i8] }:$src 6848 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 6849 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 6850 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 6851 GIR_EraseFromParent, /*InsnID*/0, 6852 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VR256*/79, 6853 // GIR_Coverage, 16243, 6854 GIR_Done, 6855 // Label 542: @14132 6856 GIM_Try, /*On fail goto*//*Label 543*/ 14164, // Rule ID 16244 // 6857 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32, 6858 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, 6859 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, 6860 // (bitconvert:{ *:[v32i8] } VR256:{ *:[v8i32] }:$src) => VR256:{ *:[v32i8] }:$src 6861 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 6862 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 6863 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 6864 GIR_EraseFromParent, /*InsnID*/0, 6865 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VR256*/79, 6866 // GIR_Coverage, 16244, 6867 GIR_Done, 6868 // Label 543: @14164 6869 GIM_Try, /*On fail goto*//*Label 544*/ 14196, // Rule ID 16245 // 6870 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s16, 6871 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, 6872 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, 6873 // (bitconvert:{ *:[v32i8] } VR256:{ *:[v16i16] }:$src) => VR256:{ *:[v32i8] }:$src 6874 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 6875 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 6876 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 6877 GIR_EraseFromParent, /*InsnID*/0, 6878 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VR256*/79, 6879 // GIR_Coverage, 16245, 6880 GIR_Done, 6881 // Label 544: @14196 6882 GIM_Try, /*On fail goto*//*Label 545*/ 14228, // Rule ID 16246 // 6883 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64, 6884 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, 6885 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, 6886 // (bitconvert:{ *:[v32i8] } VR256:{ *:[v4f64] }:$src) => VR256:{ *:[v32i8] }:$src 6887 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 6888 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 6889 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 6890 GIR_EraseFromParent, /*InsnID*/0, 6891 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VR256*/79, 6892 // GIR_Coverage, 16246, 6893 GIR_Done, 6894 // Label 545: @14228 6895 GIM_Try, /*On fail goto*//*Label 546*/ 14260, // Rule ID 16247 // 6896 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32, 6897 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, 6898 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, 6899 // (bitconvert:{ *:[v32i8] } VR256:{ *:[v8f32] }:$src) => VR256:{ *:[v32i8] }:$src 6900 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 6901 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 6902 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 6903 GIR_EraseFromParent, /*InsnID*/0, 6904 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VR256*/79, 6905 // GIR_Coverage, 16247, 6906 GIR_Done, 6907 // Label 546: @14260 6908 GIM_Reject, 6909 // Label 448: @14261 6910 GIM_Try, /*On fail goto*//*Label 547*/ 14293, // Rule ID 16278 // 6911 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64, 6912 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, 6913 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, 6914 // (bitconvert:{ *:[v32i16] } VR512:{ *:[v8i64] }:$src) => VR512:{ *:[v32i16] }:$src 6915 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 6916 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 6917 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 6918 GIR_EraseFromParent, /*InsnID*/0, 6919 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VR512*/82, 6920 // GIR_Coverage, 16278, 6921 GIR_Done, 6922 // Label 547: @14293 6923 GIM_Try, /*On fail goto*//*Label 548*/ 14325, // Rule ID 16279 // 6924 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32, 6925 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, 6926 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, 6927 // (bitconvert:{ *:[v32i16] } VR512:{ *:[v16i32] }:$src) => VR512:{ *:[v32i16] }:$src 6928 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 6929 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 6930 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 6931 GIR_EraseFromParent, /*InsnID*/0, 6932 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VR512*/82, 6933 // GIR_Coverage, 16279, 6934 GIR_Done, 6935 // Label 548: @14325 6936 GIM_Try, /*On fail goto*//*Label 549*/ 14357, // Rule ID 16280 // 6937 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v64s8, 6938 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, 6939 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, 6940 // (bitconvert:{ *:[v32i16] } VR512:{ *:[v64i8] }:$src) => VR512:{ *:[v32i16] }:$src 6941 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 6942 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 6943 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 6944 GIR_EraseFromParent, /*InsnID*/0, 6945 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VR512*/82, 6946 // GIR_Coverage, 16280, 6947 GIR_Done, 6948 // Label 549: @14357 6949 GIM_Try, /*On fail goto*//*Label 550*/ 14389, // Rule ID 16281 // 6950 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64, 6951 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, 6952 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, 6953 // (bitconvert:{ *:[v32i16] } VR512:{ *:[v8f64] }:$src) => VR512:{ *:[v32i16] }:$src 6954 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 6955 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 6956 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 6957 GIR_EraseFromParent, /*InsnID*/0, 6958 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VR512*/82, 6959 // GIR_Coverage, 16281, 6960 GIR_Done, 6961 // Label 550: @14389 6962 GIM_Try, /*On fail goto*//*Label 551*/ 14421, // Rule ID 16282 // 6963 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32, 6964 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, 6965 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, 6966 // (bitconvert:{ *:[v32i16] } VR512:{ *:[v16f32] }:$src) => VR512:{ *:[v32i16] }:$src 6967 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 6968 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 6969 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 6970 GIR_EraseFromParent, /*InsnID*/0, 6971 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VR512*/82, 6972 // GIR_Coverage, 16282, 6973 GIR_Done, 6974 // Label 551: @14421 6975 GIM_Reject, 6976 // Label 449: @14422 6977 GIM_Try, /*On fail goto*//*Label 552*/ 14445, // Rule ID 13744 // 6978 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, 6979 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK64RegClassID, 6980 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, 6981 // (bitconvert:{ *:[v64i1] } GR64:{ *:[i64] }:$src) => (COPY_TO_REGCLASS:{ *:[v64i1] } GR64:{ *:[i64] }:$src, VK64:{ *:[i32] }) 6982 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/TargetOpcode::COPY, 6983 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VK64*/55, 6984 // GIR_Coverage, 13744, 6985 GIR_Done, 6986 // Label 552: @14445 6987 GIM_Reject, 6988 // Label 450: @14446 6989 GIM_Try, /*On fail goto*//*Label 553*/ 14478, // Rule ID 16283 // 6990 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64, 6991 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, 6992 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, 6993 // (bitconvert:{ *:[v64i8] } VR512:{ *:[v8i64] }:$src) => VR512:{ *:[v64i8] }:$src 6994 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 6995 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 6996 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 6997 GIR_EraseFromParent, /*InsnID*/0, 6998 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VR512*/82, 6999 // GIR_Coverage, 16283, 7000 GIR_Done, 7001 // Label 553: @14478 7002 GIM_Try, /*On fail goto*//*Label 554*/ 14510, // Rule ID 16284 // 7003 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32, 7004 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, 7005 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, 7006 // (bitconvert:{ *:[v64i8] } VR512:{ *:[v16i32] }:$src) => VR512:{ *:[v64i8] }:$src 7007 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 7008 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 7009 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 7010 GIR_EraseFromParent, /*InsnID*/0, 7011 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VR512*/82, 7012 // GIR_Coverage, 16284, 7013 GIR_Done, 7014 // Label 554: @14510 7015 GIM_Try, /*On fail goto*//*Label 555*/ 14542, // Rule ID 16285 // 7016 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s16, 7017 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, 7018 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, 7019 // (bitconvert:{ *:[v64i8] } VR512:{ *:[v32i16] }:$src) => VR512:{ *:[v64i8] }:$src 7020 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 7021 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 7022 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 7023 GIR_EraseFromParent, /*InsnID*/0, 7024 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VR512*/82, 7025 // GIR_Coverage, 16285, 7026 GIR_Done, 7027 // Label 555: @14542 7028 GIM_Try, /*On fail goto*//*Label 556*/ 14574, // Rule ID 16286 // 7029 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64, 7030 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, 7031 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, 7032 // (bitconvert:{ *:[v64i8] } VR512:{ *:[v8f64] }:$src) => VR512:{ *:[v64i8] }:$src 7033 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 7034 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 7035 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 7036 GIR_EraseFromParent, /*InsnID*/0, 7037 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VR512*/82, 7038 // GIR_Coverage, 16286, 7039 GIR_Done, 7040 // Label 556: @14574 7041 GIM_Try, /*On fail goto*//*Label 557*/ 14606, // Rule ID 16287 // 7042 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32, 7043 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, 7044 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, 7045 // (bitconvert:{ *:[v64i8] } VR512:{ *:[v16f32] }:$src) => VR512:{ *:[v64i8] }:$src 7046 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 7047 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 7048 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 7049 GIR_EraseFromParent, /*InsnID*/0, 7050 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VR512*/82, 7051 // GIR_Coverage, 16287, 7052 GIR_Done, 7053 // Label 557: @14606 7054 GIM_Reject, 7055 // Label 451: @14607 7056 GIM_Reject, 7057 // Label 7: @14608 7058 GIM_Try, /*On fail goto*//*Label 558*/ 16670, 7059 GIM_CheckNumOperands, /*MI*/0, /*Expected*/3, 7060 GIM_Try, /*On fail goto*//*Label 559*/ 14653, // Rule ID 1133 // 7061 GIM_CheckFeatures, GIFBS_HasXOP, 7062 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vphsubwd, 7063 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32, 7064 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16, 7065 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 7066 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 7067 // (intrinsic_wo_chain:{ *:[v4i32] } 6613:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src) => (VPHSUBWDrr:{ *:[v4i32] } VR128:{ *:[v8i16] }:$src) 7068 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPHSUBWDrr, 7069 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 7070 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src 7071 GIR_EraseFromParent, /*InsnID*/0, 7072 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 7073 // GIR_Coverage, 1133, 7074 GIR_Done, 7075 // Label 559: @14653 7076 GIM_Try, /*On fail goto*//*Label 560*/ 14693, // Rule ID 1135 // 7077 GIM_CheckFeatures, GIFBS_HasXOP, 7078 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vphsubdq, 7079 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, 7080 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, 7081 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 7082 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 7083 // (intrinsic_wo_chain:{ *:[v2i64] } 6612:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src) => (VPHSUBDQrr:{ *:[v2i64] } VR128:{ *:[v4i32] }:$src) 7084 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPHSUBDQrr, 7085 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 7086 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src 7087 GIR_EraseFromParent, /*InsnID*/0, 7088 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 7089 // GIR_Coverage, 1135, 7090 GIR_Done, 7091 // Label 560: @14693 7092 GIM_Try, /*On fail goto*//*Label 561*/ 14733, // Rule ID 1137 // 7093 GIM_CheckFeatures, GIFBS_HasXOP, 7094 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vphsubbw, 7095 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16, 7096 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8, 7097 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 7098 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 7099 // (intrinsic_wo_chain:{ *:[v8i16] } 6611:{ *:[iPTR] }, VR128:{ *:[v16i8] }:$src) => (VPHSUBBWrr:{ *:[v8i16] } VR128:{ *:[v16i8] }:$src) 7100 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPHSUBBWrr, 7101 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 7102 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src 7103 GIR_EraseFromParent, /*InsnID*/0, 7104 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 7105 // GIR_Coverage, 1137, 7106 GIR_Done, 7107 // Label 561: @14733 7108 GIM_Try, /*On fail goto*//*Label 562*/ 14773, // Rule ID 1139 // 7109 GIM_CheckFeatures, GIFBS_HasXOP, 7110 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vphaddwq, 7111 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, 7112 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16, 7113 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 7114 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 7115 // (intrinsic_wo_chain:{ *:[v2i64] } 6610:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src) => (VPHADDWQrr:{ *:[v2i64] } VR128:{ *:[v8i16] }:$src) 7116 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPHADDWQrr, 7117 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 7118 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src 7119 GIR_EraseFromParent, /*InsnID*/0, 7120 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 7121 // GIR_Coverage, 1139, 7122 GIR_Done, 7123 // Label 562: @14773 7124 GIM_Try, /*On fail goto*//*Label 563*/ 14813, // Rule ID 1141 // 7125 GIM_CheckFeatures, GIFBS_HasXOP, 7126 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vphaddwd, 7127 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32, 7128 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16, 7129 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 7130 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 7131 // (intrinsic_wo_chain:{ *:[v4i32] } 6609:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src) => (VPHADDWDrr:{ *:[v4i32] } VR128:{ *:[v8i16] }:$src) 7132 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPHADDWDrr, 7133 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 7134 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src 7135 GIR_EraseFromParent, /*InsnID*/0, 7136 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 7137 // GIR_Coverage, 1141, 7138 GIR_Done, 7139 // Label 563: @14813 7140 GIM_Try, /*On fail goto*//*Label 564*/ 14853, // Rule ID 1143 // 7141 GIM_CheckFeatures, GIFBS_HasXOP, 7142 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vphadduwq, 7143 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, 7144 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16, 7145 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 7146 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 7147 // (intrinsic_wo_chain:{ *:[v2i64] } 6608:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src) => (VPHADDUWQrr:{ *:[v2i64] } VR128:{ *:[v8i16] }:$src) 7148 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPHADDUWQrr, 7149 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 7150 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src 7151 GIR_EraseFromParent, /*InsnID*/0, 7152 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 7153 // GIR_Coverage, 1143, 7154 GIR_Done, 7155 // Label 564: @14853 7156 GIM_Try, /*On fail goto*//*Label 565*/ 14893, // Rule ID 1145 // 7157 GIM_CheckFeatures, GIFBS_HasXOP, 7158 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vphadduwd, 7159 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32, 7160 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16, 7161 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 7162 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 7163 // (intrinsic_wo_chain:{ *:[v4i32] } 6607:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src) => (VPHADDUWDrr:{ *:[v4i32] } VR128:{ *:[v8i16] }:$src) 7164 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPHADDUWDrr, 7165 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 7166 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src 7167 GIR_EraseFromParent, /*InsnID*/0, 7168 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 7169 // GIR_Coverage, 1145, 7170 GIR_Done, 7171 // Label 565: @14893 7172 GIM_Try, /*On fail goto*//*Label 566*/ 14933, // Rule ID 1147 // 7173 GIM_CheckFeatures, GIFBS_HasXOP, 7174 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vphaddudq, 7175 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, 7176 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, 7177 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 7178 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 7179 // (intrinsic_wo_chain:{ *:[v2i64] } 6606:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src) => (VPHADDUDQrr:{ *:[v2i64] } VR128:{ *:[v4i32] }:$src) 7180 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPHADDUDQrr, 7181 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 7182 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src 7183 GIR_EraseFromParent, /*InsnID*/0, 7184 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 7185 // GIR_Coverage, 1147, 7186 GIR_Done, 7187 // Label 566: @14933 7188 GIM_Try, /*On fail goto*//*Label 567*/ 14973, // Rule ID 1149 // 7189 GIM_CheckFeatures, GIFBS_HasXOP, 7190 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vphaddubw, 7191 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16, 7192 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8, 7193 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 7194 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 7195 // (intrinsic_wo_chain:{ *:[v8i16] } 6605:{ *:[iPTR] }, VR128:{ *:[v16i8] }:$src) => (VPHADDUBWrr:{ *:[v8i16] } VR128:{ *:[v16i8] }:$src) 7196 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPHADDUBWrr, 7197 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 7198 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src 7199 GIR_EraseFromParent, /*InsnID*/0, 7200 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 7201 // GIR_Coverage, 1149, 7202 GIR_Done, 7203 // Label 567: @14973 7204 GIM_Try, /*On fail goto*//*Label 568*/ 15013, // Rule ID 1151 // 7205 GIM_CheckFeatures, GIFBS_HasXOP, 7206 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vphaddubq, 7207 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, 7208 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8, 7209 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 7210 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 7211 // (intrinsic_wo_chain:{ *:[v2i64] } 6604:{ *:[iPTR] }, VR128:{ *:[v16i8] }:$src) => (VPHADDUBQrr:{ *:[v2i64] } VR128:{ *:[v16i8] }:$src) 7212 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPHADDUBQrr, 7213 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 7214 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src 7215 GIR_EraseFromParent, /*InsnID*/0, 7216 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 7217 // GIR_Coverage, 1151, 7218 GIR_Done, 7219 // Label 568: @15013 7220 GIM_Try, /*On fail goto*//*Label 569*/ 15053, // Rule ID 1153 // 7221 GIM_CheckFeatures, GIFBS_HasXOP, 7222 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vphaddubd, 7223 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32, 7224 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8, 7225 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 7226 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 7227 // (intrinsic_wo_chain:{ *:[v4i32] } 6603:{ *:[iPTR] }, VR128:{ *:[v16i8] }:$src) => (VPHADDUBDrr:{ *:[v4i32] } VR128:{ *:[v16i8] }:$src) 7228 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPHADDUBDrr, 7229 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 7230 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src 7231 GIR_EraseFromParent, /*InsnID*/0, 7232 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 7233 // GIR_Coverage, 1153, 7234 GIR_Done, 7235 // Label 569: @15053 7236 GIM_Try, /*On fail goto*//*Label 570*/ 15093, // Rule ID 1155 // 7237 GIM_CheckFeatures, GIFBS_HasXOP, 7238 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vphadddq, 7239 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, 7240 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, 7241 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 7242 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 7243 // (intrinsic_wo_chain:{ *:[v2i64] } 6602:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src) => (VPHADDDQrr:{ *:[v2i64] } VR128:{ *:[v4i32] }:$src) 7244 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPHADDDQrr, 7245 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 7246 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src 7247 GIR_EraseFromParent, /*InsnID*/0, 7248 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 7249 // GIR_Coverage, 1155, 7250 GIR_Done, 7251 // Label 570: @15093 7252 GIM_Try, /*On fail goto*//*Label 571*/ 15133, // Rule ID 1157 // 7253 GIM_CheckFeatures, GIFBS_HasXOP, 7254 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vphaddbw, 7255 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16, 7256 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8, 7257 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 7258 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 7259 // (intrinsic_wo_chain:{ *:[v8i16] } 6601:{ *:[iPTR] }, VR128:{ *:[v16i8] }:$src) => (VPHADDBWrr:{ *:[v8i16] } VR128:{ *:[v16i8] }:$src) 7260 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPHADDBWrr, 7261 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 7262 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src 7263 GIR_EraseFromParent, /*InsnID*/0, 7264 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 7265 // GIR_Coverage, 1157, 7266 GIR_Done, 7267 // Label 571: @15133 7268 GIM_Try, /*On fail goto*//*Label 572*/ 15173, // Rule ID 1159 // 7269 GIM_CheckFeatures, GIFBS_HasXOP, 7270 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vphaddbq, 7271 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, 7272 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8, 7273 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 7274 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 7275 // (intrinsic_wo_chain:{ *:[v2i64] } 6600:{ *:[iPTR] }, VR128:{ *:[v16i8] }:$src) => (VPHADDBQrr:{ *:[v2i64] } VR128:{ *:[v16i8] }:$src) 7276 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPHADDBQrr, 7277 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 7278 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src 7279 GIR_EraseFromParent, /*InsnID*/0, 7280 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 7281 // GIR_Coverage, 1159, 7282 GIR_Done, 7283 // Label 572: @15173 7284 GIM_Try, /*On fail goto*//*Label 573*/ 15213, // Rule ID 1161 // 7285 GIM_CheckFeatures, GIFBS_HasXOP, 7286 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vphaddbd, 7287 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32, 7288 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8, 7289 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 7290 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 7291 // (intrinsic_wo_chain:{ *:[v4i32] } 6599:{ *:[iPTR] }, VR128:{ *:[v16i8] }:$src) => (VPHADDBDrr:{ *:[v4i32] } VR128:{ *:[v16i8] }:$src) 7292 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPHADDBDrr, 7293 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 7294 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src 7295 GIR_EraseFromParent, /*InsnID*/0, 7296 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 7297 // GIR_Coverage, 1161, 7298 GIR_Done, 7299 // Label 573: @15213 7300 GIM_Try, /*On fail goto*//*Label 574*/ 15253, // Rule ID 1163 // 7301 GIM_CheckFeatures, GIFBS_HasXOP, 7302 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vfrcz_ss, 7303 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32, 7304 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, 7305 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 7306 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 7307 // (intrinsic_wo_chain:{ *:[v4f32] } 6586:{ *:[iPTR] }, VR128:{ *:[v4f32] }:$src) => (VFRCZSSrr:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src) 7308 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VFRCZSSrr, 7309 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 7310 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src 7311 GIR_EraseFromParent, /*InsnID*/0, 7312 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 7313 // GIR_Coverage, 1163, 7314 GIR_Done, 7315 // Label 574: @15253 7316 GIM_Try, /*On fail goto*//*Label 575*/ 15293, // Rule ID 1165 // 7317 GIM_CheckFeatures, GIFBS_HasXOP, 7318 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vfrcz_ps, 7319 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32, 7320 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, 7321 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 7322 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 7323 // (intrinsic_wo_chain:{ *:[v4f32] } 6583:{ *:[iPTR] }, VR128:{ *:[v4f32] }:$src) => (VFRCZPSrr:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src) 7324 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VFRCZPSrr, 7325 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 7326 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src 7327 GIR_EraseFromParent, /*InsnID*/0, 7328 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 7329 // GIR_Coverage, 1165, 7330 GIR_Done, 7331 // Label 575: @15293 7332 GIM_Try, /*On fail goto*//*Label 576*/ 15333, // Rule ID 1167 // 7333 GIM_CheckFeatures, GIFBS_HasXOP, 7334 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vfrcz_ps_256, 7335 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s32, 7336 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s32, 7337 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, 7338 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, 7339 // (intrinsic_wo_chain:{ *:[v8f32] } 6584:{ *:[iPTR] }, VR256:{ *:[v8f32] }:$src) => (VFRCZPSYrr:{ *:[v8f32] } VR256:{ *:[v8f32] }:$src) 7340 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VFRCZPSYrr, 7341 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 7342 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src 7343 GIR_EraseFromParent, /*InsnID*/0, 7344 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 7345 // GIR_Coverage, 1167, 7346 GIR_Done, 7347 // Label 576: @15333 7348 GIM_Try, /*On fail goto*//*Label 577*/ 15373, // Rule ID 1169 // 7349 GIM_CheckFeatures, GIFBS_HasXOP, 7350 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vfrcz_sd, 7351 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, 7352 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, 7353 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 7354 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 7355 // (intrinsic_wo_chain:{ *:[v2f64] } 6585:{ *:[iPTR] }, VR128:{ *:[v2f64] }:$src) => (VFRCZSDrr:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src) 7356 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VFRCZSDrr, 7357 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 7358 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src 7359 GIR_EraseFromParent, /*InsnID*/0, 7360 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 7361 // GIR_Coverage, 1169, 7362 GIR_Done, 7363 // Label 577: @15373 7364 GIM_Try, /*On fail goto*//*Label 578*/ 15413, // Rule ID 1171 // 7365 GIM_CheckFeatures, GIFBS_HasXOP, 7366 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vfrcz_pd, 7367 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, 7368 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, 7369 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 7370 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 7371 // (intrinsic_wo_chain:{ *:[v2f64] } 6581:{ *:[iPTR] }, VR128:{ *:[v2f64] }:$src) => (VFRCZPDrr:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src) 7372 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VFRCZPDrr, 7373 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 7374 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src 7375 GIR_EraseFromParent, /*InsnID*/0, 7376 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 7377 // GIR_Coverage, 1171, 7378 GIR_Done, 7379 // Label 578: @15413 7380 GIM_Try, /*On fail goto*//*Label 579*/ 15453, // Rule ID 1173 // 7381 GIM_CheckFeatures, GIFBS_HasXOP, 7382 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vfrcz_pd_256, 7383 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s64, 7384 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64, 7385 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, 7386 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, 7387 // (intrinsic_wo_chain:{ *:[v4f64] } 6582:{ *:[iPTR] }, VR256:{ *:[v4f64] }:$src) => (VFRCZPDYrr:{ *:[v4f64] } VR256:{ *:[v4f64] }:$src) 7388 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VFRCZPDYrr, 7389 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 7390 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src 7391 GIR_EraseFromParent, /*InsnID*/0, 7392 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 7393 // GIR_Coverage, 1173, 7394 GIR_Done, 7395 // Label 579: @15453 7396 GIM_Try, /*On fail goto*//*Label 580*/ 15493, // Rule ID 1363 // 7397 GIM_CheckFeatures, GIFBS_UseAVX, 7398 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse2_cvtsd2si, 7399 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32, 7400 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, 7401 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, 7402 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 7403 // (intrinsic_wo_chain:{ *:[i32] } 6418:{ *:[iPTR] }, VR128:{ *:[v2f64] }:$src) => (VCVTSD2SIrr_Int:{ *:[i32] } VR128:{ *:[v2f64] }:$src) 7404 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTSD2SIrr_Int, 7405 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 7406 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src 7407 GIR_EraseFromParent, /*InsnID*/0, 7408 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 7409 // GIR_Coverage, 1363, 7410 GIR_Done, 7411 // Label 580: @15493 7412 GIM_Try, /*On fail goto*//*Label 581*/ 15533, // Rule ID 1365 // 7413 GIM_CheckFeatures, GIFBS_UseAVX, 7414 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse2_cvtsd2si64, 7415 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64, 7416 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, 7417 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, 7418 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 7419 // (intrinsic_wo_chain:{ *:[i64] } 6419:{ *:[iPTR] }, VR128:{ *:[v2f64] }:$src) => (VCVTSD2SI64rr_Int:{ *:[i64] } VR128:{ *:[v2f64] }:$src) 7420 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTSD2SI64rr_Int, 7421 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 7422 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src 7423 GIR_EraseFromParent, /*InsnID*/0, 7424 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 7425 // GIR_Coverage, 1365, 7426 GIR_Done, 7427 // Label 581: @15533 7428 GIM_Try, /*On fail goto*//*Label 582*/ 15573, // Rule ID 1367 // 7429 GIM_CheckFeatures, GIFBS_UseSSE2, 7430 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse2_cvtsd2si, 7431 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32, 7432 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, 7433 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, 7434 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 7435 // (intrinsic_wo_chain:{ *:[i32] } 6418:{ *:[iPTR] }, VR128:{ *:[v2f64] }:$src) => (CVTSD2SIrr_Int:{ *:[i32] } VR128:{ *:[v2f64] }:$src) 7436 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::CVTSD2SIrr_Int, 7437 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 7438 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src 7439 GIR_EraseFromParent, /*InsnID*/0, 7440 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 7441 // GIR_Coverage, 1367, 7442 GIR_Done, 7443 // Label 582: @15573 7444 GIM_Try, /*On fail goto*//*Label 583*/ 15613, // Rule ID 1369 // 7445 GIM_CheckFeatures, GIFBS_UseSSE2, 7446 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse2_cvtsd2si64, 7447 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64, 7448 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, 7449 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, 7450 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 7451 // (intrinsic_wo_chain:{ *:[i64] } 6419:{ *:[iPTR] }, VR128:{ *:[v2f64] }:$src) => (CVTSD2SI64rr_Int:{ *:[i64] } VR128:{ *:[v2f64] }:$src) 7452 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::CVTSD2SI64rr_Int, 7453 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 7454 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src 7455 GIR_EraseFromParent, /*InsnID*/0, 7456 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 7457 // GIR_Coverage, 1369, 7458 GIR_Done, 7459 // Label 583: @15613 7460 GIM_Try, /*On fail goto*//*Label 584*/ 15653, // Rule ID 1371 // 7461 GIM_CheckFeatures, GIFBS_UseAVX, 7462 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse_cvttss2si, 7463 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32, 7464 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, 7465 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, 7466 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 7467 // (intrinsic_wo_chain:{ *:[i32] } 6385:{ *:[iPTR] }, VR128:{ *:[v4f32] }:$src) => (VCVTTSS2SIrr_Int:{ *:[i32] } VR128:{ *:[v4f32] }:$src) 7468 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTTSS2SIrr_Int, 7469 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 7470 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src 7471 GIR_EraseFromParent, /*InsnID*/0, 7472 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 7473 // GIR_Coverage, 1371, 7474 GIR_Done, 7475 // Label 584: @15653 7476 GIM_Try, /*On fail goto*//*Label 585*/ 15693, // Rule ID 1373 // 7477 GIM_CheckFeatures, GIFBS_UseAVX, 7478 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse_cvttss2si64, 7479 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64, 7480 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, 7481 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, 7482 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 7483 // (intrinsic_wo_chain:{ *:[i64] } 6386:{ *:[iPTR] }, VR128:{ *:[v4f32] }:$src) => (VCVTTSS2SI64rr_Int:{ *:[i64] } VR128:{ *:[v4f32] }:$src) 7484 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTTSS2SI64rr_Int, 7485 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 7486 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src 7487 GIR_EraseFromParent, /*InsnID*/0, 7488 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 7489 // GIR_Coverage, 1373, 7490 GIR_Done, 7491 // Label 585: @15693 7492 GIM_Try, /*On fail goto*//*Label 586*/ 15733, // Rule ID 1375 // 7493 GIM_CheckFeatures, GIFBS_UseAVX, 7494 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse2_cvttsd2si, 7495 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32, 7496 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, 7497 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, 7498 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 7499 // (intrinsic_wo_chain:{ *:[i32] } 6423:{ *:[iPTR] }, VR128:{ *:[v2f64] }:$src) => (VCVTTSD2SIrr_Int:{ *:[i32] } VR128:{ *:[v2f64] }:$src) 7500 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTTSD2SIrr_Int, 7501 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 7502 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src 7503 GIR_EraseFromParent, /*InsnID*/0, 7504 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 7505 // GIR_Coverage, 1375, 7506 GIR_Done, 7507 // Label 586: @15733 7508 GIM_Try, /*On fail goto*//*Label 587*/ 15773, // Rule ID 1377 // 7509 GIM_CheckFeatures, GIFBS_UseAVX, 7510 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse2_cvttsd2si64, 7511 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64, 7512 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, 7513 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, 7514 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 7515 // (intrinsic_wo_chain:{ *:[i64] } 6424:{ *:[iPTR] }, VR128:{ *:[v2f64] }:$src) => (VCVTTSD2SI64rr_Int:{ *:[i64] } VR128:{ *:[v2f64] }:$src) 7516 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTTSD2SI64rr_Int, 7517 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 7518 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src 7519 GIR_EraseFromParent, /*InsnID*/0, 7520 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 7521 // GIR_Coverage, 1377, 7522 GIR_Done, 7523 // Label 587: @15773 7524 GIM_Try, /*On fail goto*//*Label 588*/ 15813, // Rule ID 1379 // 7525 GIM_CheckFeatures, GIFBS_UseSSE1, 7526 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse_cvttss2si, 7527 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32, 7528 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, 7529 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, 7530 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 7531 // (intrinsic_wo_chain:{ *:[i32] } 6385:{ *:[iPTR] }, VR128:{ *:[v4f32] }:$src) => (CVTTSS2SIrr_Int:{ *:[i32] } VR128:{ *:[v4f32] }:$src) 7532 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::CVTTSS2SIrr_Int, 7533 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 7534 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src 7535 GIR_EraseFromParent, /*InsnID*/0, 7536 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 7537 // GIR_Coverage, 1379, 7538 GIR_Done, 7539 // Label 588: @15813 7540 GIM_Try, /*On fail goto*//*Label 589*/ 15853, // Rule ID 1381 // 7541 GIM_CheckFeatures, GIFBS_UseSSE1, 7542 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse_cvttss2si64, 7543 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64, 7544 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, 7545 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, 7546 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 7547 // (intrinsic_wo_chain:{ *:[i64] } 6386:{ *:[iPTR] }, VR128:{ *:[v4f32] }:$src) => (CVTTSS2SI64rr_Int:{ *:[i64] } VR128:{ *:[v4f32] }:$src) 7548 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::CVTTSS2SI64rr_Int, 7549 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 7550 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src 7551 GIR_EraseFromParent, /*InsnID*/0, 7552 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 7553 // GIR_Coverage, 1381, 7554 GIR_Done, 7555 // Label 589: @15853 7556 GIM_Try, /*On fail goto*//*Label 590*/ 15893, // Rule ID 1383 // 7557 GIM_CheckFeatures, GIFBS_UseSSE2, 7558 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse2_cvttsd2si, 7559 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32, 7560 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, 7561 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, 7562 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 7563 // (intrinsic_wo_chain:{ *:[i32] } 6423:{ *:[iPTR] }, VR128:{ *:[v2f64] }:$src) => (CVTTSD2SIrr_Int:{ *:[i32] } VR128:{ *:[v2f64] }:$src) 7564 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::CVTTSD2SIrr_Int, 7565 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 7566 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src 7567 GIR_EraseFromParent, /*InsnID*/0, 7568 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 7569 // GIR_Coverage, 1383, 7570 GIR_Done, 7571 // Label 590: @15893 7572 GIM_Try, /*On fail goto*//*Label 591*/ 15933, // Rule ID 1385 // 7573 GIM_CheckFeatures, GIFBS_UseSSE2, 7574 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse2_cvttsd2si64, 7575 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64, 7576 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, 7577 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, 7578 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 7579 // (intrinsic_wo_chain:{ *:[i64] } 6424:{ *:[iPTR] }, VR128:{ *:[v2f64] }:$src) => (CVTTSD2SI64rr_Int:{ *:[i64] } VR128:{ *:[v2f64] }:$src) 7580 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::CVTTSD2SI64rr_Int, 7581 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 7582 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src 7583 GIR_EraseFromParent, /*InsnID*/0, 7584 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 7585 // GIR_Coverage, 1385, 7586 GIR_Done, 7587 // Label 591: @15933 7588 GIM_Try, /*On fail goto*//*Label 592*/ 15973, // Rule ID 1387 // 7589 GIM_CheckFeatures, GIFBS_UseAVX, 7590 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse_cvtss2si, 7591 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32, 7592 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, 7593 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, 7594 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 7595 // (intrinsic_wo_chain:{ *:[i32] } 6381:{ *:[iPTR] }, VR128:{ *:[v4f32] }:$src) => (VCVTSS2SIrr_Int:{ *:[i32] } VR128:{ *:[v4f32] }:$src) 7596 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTSS2SIrr_Int, 7597 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 7598 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src 7599 GIR_EraseFromParent, /*InsnID*/0, 7600 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 7601 // GIR_Coverage, 1387, 7602 GIR_Done, 7603 // Label 592: @15973 7604 GIM_Try, /*On fail goto*//*Label 593*/ 16013, // Rule ID 1389 // 7605 GIM_CheckFeatures, GIFBS_UseAVX, 7606 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse_cvtss2si64, 7607 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64, 7608 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, 7609 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, 7610 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 7611 // (intrinsic_wo_chain:{ *:[i64] } 6382:{ *:[iPTR] }, VR128:{ *:[v4f32] }:$src) => (VCVTSS2SI64rr_Int:{ *:[i64] } VR128:{ *:[v4f32] }:$src) 7612 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTSS2SI64rr_Int, 7613 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 7614 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src 7615 GIR_EraseFromParent, /*InsnID*/0, 7616 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 7617 // GIR_Coverage, 1389, 7618 GIR_Done, 7619 // Label 593: @16013 7620 GIM_Try, /*On fail goto*//*Label 594*/ 16053, // Rule ID 1391 // 7621 GIM_CheckFeatures, GIFBS_UseSSE1, 7622 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse_cvtss2si, 7623 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32, 7624 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, 7625 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, 7626 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 7627 // (intrinsic_wo_chain:{ *:[i32] } 6381:{ *:[iPTR] }, VR128:{ *:[v4f32] }:$src) => (CVTSS2SIrr_Int:{ *:[i32] } VR128:{ *:[v4f32] }:$src) 7628 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::CVTSS2SIrr_Int, 7629 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 7630 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src 7631 GIR_EraseFromParent, /*InsnID*/0, 7632 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 7633 // GIR_Coverage, 1391, 7634 GIR_Done, 7635 // Label 594: @16053 7636 GIM_Try, /*On fail goto*//*Label 595*/ 16093, // Rule ID 1393 // 7637 GIM_CheckFeatures, GIFBS_UseSSE1, 7638 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse_cvtss2si64, 7639 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64, 7640 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, 7641 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, 7642 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 7643 // (intrinsic_wo_chain:{ *:[i64] } 6382:{ *:[iPTR] }, VR128:{ *:[v4f32] }:$src) => (CVTSS2SI64rr_Int:{ *:[i64] } VR128:{ *:[v4f32] }:$src) 7644 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::CVTSS2SI64rr_Int, 7645 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 7646 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src 7647 GIR_EraseFromParent, /*InsnID*/0, 7648 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 7649 // GIR_Coverage, 1393, 7650 GIR_Done, 7651 // Label 595: @16093 7652 GIM_Try, /*On fail goto*//*Label 596*/ 16133, // Rule ID 2627 // 7653 GIM_CheckFeatures, GIFBS_HasAES_HasAVX, 7654 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesimc, 7655 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, 7656 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, 7657 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 7658 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 7659 // (intrinsic_wo_chain:{ *:[v2i64] } 5427:{ *:[iPTR] }, VR128:{ *:[v2i64] }:$src1) => (VAESIMCrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1) 7660 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VAESIMCrr, 7661 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 7662 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 7663 GIR_EraseFromParent, /*InsnID*/0, 7664 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 7665 // GIR_Coverage, 2627, 7666 GIR_Done, 7667 // Label 596: @16133 7668 GIM_Try, /*On fail goto*//*Label 597*/ 16173, // Rule ID 2629 // 7669 GIM_CheckFeatures, GIFBS_HasAES_NoAVX, 7670 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesimc, 7671 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, 7672 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, 7673 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 7674 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 7675 // (intrinsic_wo_chain:{ *:[v2i64] } 5427:{ *:[iPTR] }, VR128:{ *:[v2i64] }:$src1) => (AESIMCrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1) 7676 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::AESIMCrr, 7677 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 7678 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 7679 GIR_EraseFromParent, /*InsnID*/0, 7680 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 7681 // GIR_Coverage, 2629, 7682 GIR_Done, 7683 // Label 597: @16173 7684 GIM_Try, /*On fail goto*//*Label 598*/ 16217, // Rule ID 12592 // 7685 GIM_CheckFeatures, GIFBS_UseSSE1, 7686 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse_rsqrt_ss, 7687 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32, 7688 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, 7689 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 7690 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 7691 // (intrinsic_wo_chain:{ *:[v4f32] } 6397:{ *:[iPTR] }, VR128:{ *:[v4f32] }:$src) => (RSQRTSSr_Int:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src, VR128:{ *:[v4f32] }:$src) 7692 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::RSQRTSSr_Int, 7693 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 7694 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src 7695 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src 7696 GIR_EraseFromParent, /*InsnID*/0, 7697 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 7698 // GIR_Coverage, 12592, 7699 GIR_Done, 7700 // Label 598: @16217 7701 GIM_Try, /*On fail goto*//*Label 599*/ 16261, // Rule ID 12594 // 7702 GIM_CheckFeatures, GIFBS_HasAVX, 7703 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse_rsqrt_ss, 7704 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32, 7705 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, 7706 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 7707 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 7708 // (intrinsic_wo_chain:{ *:[v4f32] } 6397:{ *:[iPTR] }, VR128:{ *:[v4f32] }:$src) => (VRSQRTSSr_Int:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src, VR128:{ *:[v4f32] }:$src) 7709 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VRSQRTSSr_Int, 7710 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 7711 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src 7712 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src 7713 GIR_EraseFromParent, /*InsnID*/0, 7714 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 7715 // GIR_Coverage, 12594, 7716 GIR_Done, 7717 // Label 599: @16261 7718 GIM_Try, /*On fail goto*//*Label 600*/ 16305, // Rule ID 12604 // 7719 GIM_CheckFeatures, GIFBS_UseSSE1, 7720 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse_rcp_ss, 7721 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32, 7722 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, 7723 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 7724 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 7725 // (intrinsic_wo_chain:{ *:[v4f32] } 6395:{ *:[iPTR] }, VR128:{ *:[v4f32] }:$src) => (RCPSSr_Int:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src, VR128:{ *:[v4f32] }:$src) 7726 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::RCPSSr_Int, 7727 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 7728 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src 7729 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src 7730 GIR_EraseFromParent, /*InsnID*/0, 7731 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 7732 // GIR_Coverage, 12604, 7733 GIR_Done, 7734 // Label 600: @16305 7735 GIM_Try, /*On fail goto*//*Label 601*/ 16349, // Rule ID 12606 // 7736 GIM_CheckFeatures, GIFBS_HasAVX, 7737 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse_rcp_ss, 7738 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32, 7739 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, 7740 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 7741 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 7742 // (intrinsic_wo_chain:{ *:[v4f32] } 6395:{ *:[iPTR] }, VR128:{ *:[v4f32] }:$src) => (VRCPSSr_Int:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src, VR128:{ *:[v4f32] }:$src) 7743 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VRCPSSr_Int, 7744 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 7745 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src 7746 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src 7747 GIR_EraseFromParent, /*InsnID*/0, 7748 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 7749 // GIR_Coverage, 12606, 7750 GIR_Done, 7751 // Label 601: @16349 7752 GIM_Try, /*On fail goto*//*Label 602*/ 16389, // Rule ID 14835 // 7753 GIM_CheckFeatures, GIFBS_HasAVX512, 7754 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse_cvtss2si, 7755 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32, 7756 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, 7757 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, 7758 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, 7759 // (intrinsic_wo_chain:{ *:[i32] } 6381:{ *:[iPTR] }, VR128X:{ *:[v4f32] }:$src) => (VCVTSS2SIZrr_Int:{ *:[i32] } VR128X:{ *:[v4f32] }:$src) 7760 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTSS2SIZrr_Int, 7761 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 7762 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src 7763 GIR_EraseFromParent, /*InsnID*/0, 7764 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 7765 // GIR_Coverage, 14835, 7766 GIR_Done, 7767 // Label 602: @16389 7768 GIM_Try, /*On fail goto*//*Label 603*/ 16429, // Rule ID 14837 // 7769 GIM_CheckFeatures, GIFBS_HasAVX512, 7770 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse_cvtss2si64, 7771 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64, 7772 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, 7773 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, 7774 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, 7775 // (intrinsic_wo_chain:{ *:[i64] } 6382:{ *:[iPTR] }, VR128X:{ *:[v4f32] }:$src) => (VCVTSS2SI64Zrr_Int:{ *:[i64] } VR128X:{ *:[v4f32] }:$src) 7776 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTSS2SI64Zrr_Int, 7777 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 7778 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src 7779 GIR_EraseFromParent, /*InsnID*/0, 7780 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 7781 // GIR_Coverage, 14837, 7782 GIR_Done, 7783 // Label 603: @16429 7784 GIM_Try, /*On fail goto*//*Label 604*/ 16469, // Rule ID 14839 // 7785 GIM_CheckFeatures, GIFBS_HasAVX512, 7786 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse2_cvtsd2si, 7787 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32, 7788 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, 7789 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, 7790 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, 7791 // (intrinsic_wo_chain:{ *:[i32] } 6418:{ *:[iPTR] }, VR128X:{ *:[v2f64] }:$src) => (VCVTSD2SIZrr_Int:{ *:[i32] } VR128X:{ *:[v2f64] }:$src) 7792 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTSD2SIZrr_Int, 7793 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 7794 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src 7795 GIR_EraseFromParent, /*InsnID*/0, 7796 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 7797 // GIR_Coverage, 14839, 7798 GIR_Done, 7799 // Label 604: @16469 7800 GIM_Try, /*On fail goto*//*Label 605*/ 16509, // Rule ID 14841 // 7801 GIM_CheckFeatures, GIFBS_HasAVX512, 7802 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse2_cvtsd2si64, 7803 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64, 7804 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, 7805 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, 7806 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, 7807 // (intrinsic_wo_chain:{ *:[i64] } 6419:{ *:[iPTR] }, VR128X:{ *:[v2f64] }:$src) => (VCVTSD2SI64Zrr_Int:{ *:[i64] } VR128X:{ *:[v2f64] }:$src) 7808 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTSD2SI64Zrr_Int, 7809 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 7810 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src 7811 GIR_EraseFromParent, /*InsnID*/0, 7812 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 7813 // GIR_Coverage, 14841, 7814 GIR_Done, 7815 // Label 605: @16509 7816 GIM_Try, /*On fail goto*//*Label 606*/ 16549, // Rule ID 14859 // 7817 GIM_CheckFeatures, GIFBS_HasAVX512, 7818 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse_cvttss2si, 7819 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32, 7820 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, 7821 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, 7822 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, 7823 // (intrinsic_wo_chain:{ *:[i32] } 6385:{ *:[iPTR] }, VR128X:{ *:[v4f32] }:$src) => (VCVTTSS2SIZrr_Int:{ *:[i32] } VR128X:{ *:[v4f32] }:$src) 7824 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTTSS2SIZrr_Int, 7825 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 7826 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src 7827 GIR_EraseFromParent, /*InsnID*/0, 7828 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 7829 // GIR_Coverage, 14859, 7830 GIR_Done, 7831 // Label 606: @16549 7832 GIM_Try, /*On fail goto*//*Label 607*/ 16589, // Rule ID 14861 // 7833 GIM_CheckFeatures, GIFBS_HasAVX512, 7834 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse_cvttss2si64, 7835 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64, 7836 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, 7837 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, 7838 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, 7839 // (intrinsic_wo_chain:{ *:[i64] } 6386:{ *:[iPTR] }, VR128X:{ *:[v4f32] }:$src) => (VCVTTSS2SI64Zrr_Int:{ *:[i64] } VR128X:{ *:[v4f32] }:$src) 7840 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTTSS2SI64Zrr_Int, 7841 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 7842 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src 7843 GIR_EraseFromParent, /*InsnID*/0, 7844 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 7845 // GIR_Coverage, 14861, 7846 GIR_Done, 7847 // Label 607: @16589 7848 GIM_Try, /*On fail goto*//*Label 608*/ 16629, // Rule ID 14863 // 7849 GIM_CheckFeatures, GIFBS_HasAVX512, 7850 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse2_cvttsd2si, 7851 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32, 7852 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, 7853 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, 7854 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, 7855 // (intrinsic_wo_chain:{ *:[i32] } 6423:{ *:[iPTR] }, VR128X:{ *:[v2f64] }:$src) => (VCVTTSD2SIZrr_Int:{ *:[i32] } VR128X:{ *:[v2f64] }:$src) 7856 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTTSD2SIZrr_Int, 7857 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 7858 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src 7859 GIR_EraseFromParent, /*InsnID*/0, 7860 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 7861 // GIR_Coverage, 14863, 7862 GIR_Done, 7863 // Label 608: @16629 7864 GIM_Try, /*On fail goto*//*Label 609*/ 16669, // Rule ID 14865 // 7865 GIM_CheckFeatures, GIFBS_HasAVX512, 7866 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse2_cvttsd2si64, 7867 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64, 7868 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, 7869 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, 7870 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, 7871 // (intrinsic_wo_chain:{ *:[i64] } 6424:{ *:[iPTR] }, VR128X:{ *:[v2f64] }:$src) => (VCVTTSD2SI64Zrr_Int:{ *:[i64] } VR128X:{ *:[v2f64] }:$src) 7872 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTTSD2SI64Zrr_Int, 7873 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 7874 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src 7875 GIR_EraseFromParent, /*InsnID*/0, 7876 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 7877 // GIR_Coverage, 14865, 7878 GIR_Done, 7879 // Label 609: @16669 7880 GIM_Reject, 7881 // Label 558: @16670 7882 GIM_Try, /*On fail goto*//*Label 610*/ 19700, 7883 GIM_CheckNumOperands, /*MI*/0, /*Expected*/4, 7884 GIM_Try, /*On fail goto*//*Label 611*/ 16731, // Rule ID 2631 // 7885 GIM_CheckFeatures, GIFBS_HasAES_HasAVX, 7886 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aeskeygenassist, 7887 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, 7888 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, 7889 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s8, 7890 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 7891 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 7892 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1] 7893 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, 7894 // MIs[1] Operand 1 7895 // No operand predicates 7896 GIM_CheckIsSafeToFold, /*InsnID*/1, 7897 // (intrinsic_wo_chain:{ *:[v2i64] } 5428:{ *:[iPTR] }, VR128:{ *:[v2i64] }:$src1, (imm:{ *:[i8] }):$src2) => (VAESKEYGENASSIST128rr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, (imm:{ *:[i8] }):$src2) 7898 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VAESKEYGENASSIST128rr, 7899 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 7900 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 7901 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 7902 GIR_EraseFromParent, /*InsnID*/0, 7903 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 7904 // GIR_Coverage, 2631, 7905 GIR_Done, 7906 // Label 611: @16731 7907 GIM_Try, /*On fail goto*//*Label 612*/ 16787, // Rule ID 2633 // 7908 GIM_CheckFeatures, GIFBS_HasAES_NoAVX, 7909 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aeskeygenassist, 7910 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, 7911 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, 7912 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s8, 7913 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 7914 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 7915 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1] 7916 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, 7917 // MIs[1] Operand 1 7918 // No operand predicates 7919 GIM_CheckIsSafeToFold, /*InsnID*/1, 7920 // (intrinsic_wo_chain:{ *:[v2i64] } 5428:{ *:[iPTR] }, VR128:{ *:[v2i64] }:$src1, (imm:{ *:[i8] }):$src2) => (AESKEYGENASSIST128rr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, (imm:{ *:[i8] }):$src2) 7921 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::AESKEYGENASSIST128rr, 7922 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 7923 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 7924 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 7925 GIR_EraseFromParent, /*InsnID*/0, 7926 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 7927 // GIR_Coverage, 2633, 7928 GIR_Done, 7929 // Label 612: @16787 7930 GIM_Try, /*On fail goto*//*Label 613*/ 16839, // Rule ID 82 // 7931 GIM_CheckFeatures, GIFBS_HasBMI2, 7932 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_bmi_pdep_32, 7933 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32, 7934 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, 7935 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32, 7936 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, 7937 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR32RegClassID, 7938 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::GR32RegClassID, 7939 // (intrinsic_wo_chain:{ *:[i32] } 6230:{ *:[iPTR] }, GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) => (PDEP32rr:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) 7940 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::PDEP32rr, 7941 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 7942 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 7943 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 7944 GIR_EraseFromParent, /*InsnID*/0, 7945 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 7946 // GIR_Coverage, 82, 7947 GIR_Done, 7948 // Label 613: @16839 7949 GIM_Try, /*On fail goto*//*Label 614*/ 16891, // Rule ID 84 // 7950 GIM_CheckFeatures, GIFBS_HasBMI2, 7951 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_bmi_pdep_64, 7952 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64, 7953 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, 7954 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s64, 7955 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, 7956 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR64RegClassID, 7957 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::GR64RegClassID, 7958 // (intrinsic_wo_chain:{ *:[i64] } 6231:{ *:[iPTR] }, GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) => (PDEP64rr:{ *:[i64] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) 7959 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::PDEP64rr, 7960 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 7961 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 7962 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 7963 GIR_EraseFromParent, /*InsnID*/0, 7964 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 7965 // GIR_Coverage, 84, 7966 GIR_Done, 7967 // Label 614: @16891 7968 GIM_Try, /*On fail goto*//*Label 615*/ 16943, // Rule ID 86 // 7969 GIM_CheckFeatures, GIFBS_HasBMI2, 7970 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_bmi_pext_32, 7971 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32, 7972 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, 7973 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32, 7974 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, 7975 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR32RegClassID, 7976 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::GR32RegClassID, 7977 // (intrinsic_wo_chain:{ *:[i32] } 6232:{ *:[iPTR] }, GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) => (PEXT32rr:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) 7978 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::PEXT32rr, 7979 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 7980 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 7981 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 7982 GIR_EraseFromParent, /*InsnID*/0, 7983 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 7984 // GIR_Coverage, 86, 7985 GIR_Done, 7986 // Label 615: @16943 7987 GIM_Try, /*On fail goto*//*Label 616*/ 16995, // Rule ID 88 // 7988 GIM_CheckFeatures, GIFBS_HasBMI2, 7989 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_bmi_pext_64, 7990 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64, 7991 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, 7992 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s64, 7993 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, 7994 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR64RegClassID, 7995 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::GR64RegClassID, 7996 // (intrinsic_wo_chain:{ *:[i64] } 6233:{ *:[iPTR] }, GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) => (PEXT64rr:{ *:[i64] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) 7997 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::PEXT64rr, 7998 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 7999 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 8000 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 8001 GIR_EraseFromParent, /*InsnID*/0, 8002 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 8003 // GIR_Coverage, 88, 8004 GIR_Done, 8005 // Label 616: @16995 8006 GIM_Try, /*On fail goto*//*Label 617*/ 17047, // Rule ID 1403 // 8007 GIM_CheckFeatures, GIFBS_HasAVX, 8008 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse2_cvtsd2ss, 8009 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32, 8010 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, 8011 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64, 8012 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 8013 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 8014 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, 8015 // (intrinsic_wo_chain:{ *:[v4f32] } 6420:{ *:[iPTR] }, VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v2f64] }:$src2) => (VCVTSD2SSrr_Int:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v2f64] }:$src2) 8016 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTSD2SSrr_Int, 8017 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 8018 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 8019 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 8020 GIR_EraseFromParent, /*InsnID*/0, 8021 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 8022 // GIR_Coverage, 1403, 8023 GIR_Done, 8024 // Label 617: @17047 8025 GIM_Try, /*On fail goto*//*Label 618*/ 17099, // Rule ID 1405 // 8026 GIM_CheckFeatures, GIFBS_UseSSE2, 8027 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse2_cvtsd2ss, 8028 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32, 8029 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, 8030 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64, 8031 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 8032 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 8033 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, 8034 // (intrinsic_wo_chain:{ *:[v4f32] } 6420:{ *:[iPTR] }, VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v2f64] }:$src2) => (CVTSD2SSrr_Int:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v2f64] }:$src2) 8035 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::CVTSD2SSrr_Int, 8036 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 8037 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 8038 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 8039 GIR_EraseFromParent, /*InsnID*/0, 8040 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 8041 // GIR_Coverage, 1405, 8042 GIR_Done, 8043 // Label 618: @17099 8044 GIM_Try, /*On fail goto*//*Label 619*/ 17151, // Rule ID 2313 // 8045 GIM_CheckFeatures, GIFBS_HasAVX, 8046 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_ssse3_psign_b_128, 8047 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s8, 8048 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8, 8049 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s8, 8050 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 8051 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 8052 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, 8053 // (intrinsic_wo_chain:{ *:[v16i8] } 6541:{ *:[iPTR] }, VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (VPSIGNBrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) 8054 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPSIGNBrr, 8055 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 8056 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 8057 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 8058 GIR_EraseFromParent, /*InsnID*/0, 8059 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 8060 // GIR_Coverage, 2313, 8061 GIR_Done, 8062 // Label 619: @17151 8063 GIM_Try, /*On fail goto*//*Label 620*/ 17203, // Rule ID 2315 // 8064 GIM_CheckFeatures, GIFBS_HasAVX, 8065 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_ssse3_psign_w_128, 8066 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16, 8067 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16, 8068 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16, 8069 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 8070 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 8071 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, 8072 // (intrinsic_wo_chain:{ *:[v8i16] } 6545:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (VPSIGNWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) 8073 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPSIGNWrr, 8074 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 8075 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 8076 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 8077 GIR_EraseFromParent, /*InsnID*/0, 8078 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 8079 // GIR_Coverage, 2315, 8080 GIR_Done, 8081 // Label 620: @17203 8082 GIM_Try, /*On fail goto*//*Label 621*/ 17255, // Rule ID 2317 // 8083 GIM_CheckFeatures, GIFBS_HasAVX, 8084 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_ssse3_psign_d_128, 8085 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32, 8086 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, 8087 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32, 8088 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 8089 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 8090 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, 8091 // (intrinsic_wo_chain:{ *:[v4i32] } 6543:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (VPSIGNDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) 8092 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPSIGNDrr, 8093 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 8094 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 8095 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 8096 GIR_EraseFromParent, /*InsnID*/0, 8097 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 8098 // GIR_Coverage, 2317, 8099 GIR_Done, 8100 // Label 621: @17255 8101 GIM_Try, /*On fail goto*//*Label 622*/ 17307, // Rule ID 2319 // 8102 GIM_CheckFeatures, GIFBS_HasAVX, 8103 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_ssse3_phadd_sw_128, 8104 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16, 8105 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16, 8106 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16, 8107 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 8108 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 8109 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, 8110 // (intrinsic_wo_chain:{ *:[v8i16] } 6525:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (VPHADDSWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) 8111 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPHADDSWrr, 8112 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 8113 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 8114 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 8115 GIR_EraseFromParent, /*InsnID*/0, 8116 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 8117 // GIR_Coverage, 2319, 8118 GIR_Done, 8119 // Label 622: @17307 8120 GIM_Try, /*On fail goto*//*Label 623*/ 17359, // Rule ID 2321 // 8121 GIM_CheckFeatures, GIFBS_HasAVX, 8122 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_ssse3_phsub_sw_128, 8123 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16, 8124 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16, 8125 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16, 8126 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 8127 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 8128 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, 8129 // (intrinsic_wo_chain:{ *:[v8i16] } 6531:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (VPHSUBSWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) 8130 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPHSUBSWrr, 8131 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 8132 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 8133 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 8134 GIR_EraseFromParent, /*InsnID*/0, 8135 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 8136 // GIR_Coverage, 2321, 8137 GIR_Done, 8138 // Label 623: @17359 8139 GIM_Try, /*On fail goto*//*Label 624*/ 17411, // Rule ID 2337 // 8140 GIM_CheckFeatures, GIFBS_HasAVX2, 8141 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_avx2_psign_b, 8142 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v32s8, 8143 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s8, 8144 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v32s8, 8145 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, 8146 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, 8147 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256RegClassID, 8148 // (intrinsic_wo_chain:{ *:[v32i8] } 5535:{ *:[iPTR] }, VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) => (VPSIGNBYrr:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) 8149 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPSIGNBYrr, 8150 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 8151 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 8152 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 8153 GIR_EraseFromParent, /*InsnID*/0, 8154 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 8155 // GIR_Coverage, 2337, 8156 GIR_Done, 8157 // Label 624: @17411 8158 GIM_Try, /*On fail goto*//*Label 625*/ 17463, // Rule ID 2339 // 8159 GIM_CheckFeatures, GIFBS_HasAVX2, 8160 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_avx2_psign_w, 8161 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s16, 8162 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s16, 8163 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s16, 8164 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, 8165 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, 8166 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256RegClassID, 8167 // (intrinsic_wo_chain:{ *:[v16i16] } 5537:{ *:[iPTR] }, VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) => (VPSIGNWYrr:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) 8168 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPSIGNWYrr, 8169 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 8170 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 8171 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 8172 GIR_EraseFromParent, /*InsnID*/0, 8173 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 8174 // GIR_Coverage, 2339, 8175 GIR_Done, 8176 // Label 625: @17463 8177 GIM_Try, /*On fail goto*//*Label 626*/ 17515, // Rule ID 2341 // 8178 GIM_CheckFeatures, GIFBS_HasAVX2, 8179 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_avx2_psign_d, 8180 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s32, 8181 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s32, 8182 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s32, 8183 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, 8184 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, 8185 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256RegClassID, 8186 // (intrinsic_wo_chain:{ *:[v8i32] } 5536:{ *:[iPTR] }, VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) => (VPSIGNDYrr:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) 8187 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPSIGNDYrr, 8188 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 8189 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 8190 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 8191 GIR_EraseFromParent, /*InsnID*/0, 8192 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 8193 // GIR_Coverage, 2341, 8194 GIR_Done, 8195 // Label 626: @17515 8196 GIM_Try, /*On fail goto*//*Label 627*/ 17567, // Rule ID 2343 // 8197 GIM_CheckFeatures, GIFBS_HasAVX2, 8198 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_avx2_phadd_sw, 8199 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s16, 8200 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s16, 8201 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s16, 8202 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, 8203 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, 8204 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256RegClassID, 8205 // (intrinsic_wo_chain:{ *:[v16i16] } 5522:{ *:[iPTR] }, VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) => (VPHADDSWYrr:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) 8206 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPHADDSWYrr, 8207 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 8208 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 8209 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 8210 GIR_EraseFromParent, /*InsnID*/0, 8211 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 8212 // GIR_Coverage, 2343, 8213 GIR_Done, 8214 // Label 627: @17567 8215 GIM_Try, /*On fail goto*//*Label 628*/ 17619, // Rule ID 2345 // 8216 GIM_CheckFeatures, GIFBS_HasAVX2, 8217 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_avx2_phsub_sw, 8218 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s16, 8219 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s16, 8220 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s16, 8221 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, 8222 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, 8223 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256RegClassID, 8224 // (intrinsic_wo_chain:{ *:[v16i16] } 5525:{ *:[iPTR] }, VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) => (VPHSUBSWYrr:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) 8225 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPHSUBSWYrr, 8226 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 8227 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 8228 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 8229 GIR_EraseFromParent, /*InsnID*/0, 8230 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 8231 // GIR_Coverage, 2345, 8232 GIR_Done, 8233 // Label 628: @17619 8234 GIM_Try, /*On fail goto*//*Label 629*/ 17671, // Rule ID 2355 // 8235 GIM_CheckFeatures, GIFBS_UseSSSE3, 8236 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_ssse3_psign_b_128, 8237 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s8, 8238 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8, 8239 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s8, 8240 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 8241 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 8242 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, 8243 // (intrinsic_wo_chain:{ *:[v16i8] } 6541:{ *:[iPTR] }, VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (PSIGNBrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) 8244 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::PSIGNBrr, 8245 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 8246 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 8247 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 8248 GIR_EraseFromParent, /*InsnID*/0, 8249 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 8250 // GIR_Coverage, 2355, 8251 GIR_Done, 8252 // Label 629: @17671 8253 GIM_Try, /*On fail goto*//*Label 630*/ 17723, // Rule ID 2357 // 8254 GIM_CheckFeatures, GIFBS_UseSSSE3, 8255 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_ssse3_psign_w_128, 8256 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16, 8257 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16, 8258 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16, 8259 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 8260 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 8261 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, 8262 // (intrinsic_wo_chain:{ *:[v8i16] } 6545:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (PSIGNWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) 8263 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::PSIGNWrr, 8264 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 8265 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 8266 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 8267 GIR_EraseFromParent, /*InsnID*/0, 8268 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 8269 // GIR_Coverage, 2357, 8270 GIR_Done, 8271 // Label 630: @17723 8272 GIM_Try, /*On fail goto*//*Label 631*/ 17775, // Rule ID 2359 // 8273 GIM_CheckFeatures, GIFBS_UseSSSE3, 8274 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_ssse3_psign_d_128, 8275 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32, 8276 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, 8277 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32, 8278 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 8279 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 8280 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, 8281 // (intrinsic_wo_chain:{ *:[v4i32] } 6543:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (PSIGNDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) 8282 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::PSIGNDrr, 8283 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 8284 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 8285 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 8286 GIR_EraseFromParent, /*InsnID*/0, 8287 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 8288 // GIR_Coverage, 2359, 8289 GIR_Done, 8290 // Label 631: @17775 8291 GIM_Try, /*On fail goto*//*Label 632*/ 17827, // Rule ID 2363 // 8292 GIM_CheckFeatures, GIFBS_UseSSSE3, 8293 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_ssse3_phadd_sw_128, 8294 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16, 8295 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16, 8296 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16, 8297 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 8298 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 8299 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, 8300 // (intrinsic_wo_chain:{ *:[v8i16] } 6525:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (PHADDSWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) 8301 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::PHADDSWrr, 8302 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 8303 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 8304 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 8305 GIR_EraseFromParent, /*InsnID*/0, 8306 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 8307 // GIR_Coverage, 2363, 8308 GIR_Done, 8309 // Label 632: @17827 8310 GIM_Try, /*On fail goto*//*Label 633*/ 17879, // Rule ID 2365 // 8311 GIM_CheckFeatures, GIFBS_UseSSSE3, 8312 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_ssse3_phsub_sw_128, 8313 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16, 8314 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16, 8315 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16, 8316 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 8317 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 8318 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, 8319 // (intrinsic_wo_chain:{ *:[v8i16] } 6531:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (PHSUBSWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) 8320 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::PHSUBSWrr, 8321 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 8322 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 8323 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 8324 GIR_EraseFromParent, /*InsnID*/0, 8325 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 8326 // GIR_Coverage, 2365, 8327 GIR_Done, 8328 // Label 633: @17879 8329 GIM_Try, /*On fail goto*//*Label 634*/ 17931, // Rule ID 2582 // 8330 GIM_CheckFeatures, GIFBS_HasSSE42, 8331 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse42_crc32_32_8, 8332 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32, 8333 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, 8334 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s8, 8335 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, 8336 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR32RegClassID, 8337 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::GR8RegClassID, 8338 // (intrinsic_wo_chain:{ *:[i32] } 6499:{ *:[iPTR] }, GR32:{ *:[i32] }:$src1, GR8:{ *:[i8] }:$src2) => (CRC32r32r8:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR8:{ *:[i8] }:$src2) 8339 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::CRC32r32r8, 8340 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 8341 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 8342 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 8343 GIR_EraseFromParent, /*InsnID*/0, 8344 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 8345 // GIR_Coverage, 2582, 8346 GIR_Done, 8347 // Label 634: @17931 8348 GIM_Try, /*On fail goto*//*Label 635*/ 17983, // Rule ID 2584 // 8349 GIM_CheckFeatures, GIFBS_HasSSE42, 8350 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse42_crc32_32_16, 8351 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32, 8352 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, 8353 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s16, 8354 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, 8355 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR32RegClassID, 8356 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::GR16RegClassID, 8357 // (intrinsic_wo_chain:{ *:[i32] } 6497:{ *:[iPTR] }, GR32:{ *:[i32] }:$src1, GR16:{ *:[i16] }:$src2) => (CRC32r32r16:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR16:{ *:[i16] }:$src2) 8358 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::CRC32r32r16, 8359 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 8360 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 8361 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 8362 GIR_EraseFromParent, /*InsnID*/0, 8363 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 8364 // GIR_Coverage, 2584, 8365 GIR_Done, 8366 // Label 635: @17983 8367 GIM_Try, /*On fail goto*//*Label 636*/ 18035, // Rule ID 2586 // 8368 GIM_CheckFeatures, GIFBS_HasSSE42, 8369 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse42_crc32_32_32, 8370 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32, 8371 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, 8372 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32, 8373 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, 8374 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR32RegClassID, 8375 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::GR32RegClassID, 8376 // (intrinsic_wo_chain:{ *:[i32] } 6498:{ *:[iPTR] }, GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) => (CRC32r32r32:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) 8377 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::CRC32r32r32, 8378 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 8379 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 8380 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 8381 GIR_EraseFromParent, /*InsnID*/0, 8382 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 8383 // GIR_Coverage, 2586, 8384 GIR_Done, 8385 // Label 636: @18035 8386 GIM_Try, /*On fail goto*//*Label 637*/ 18087, // Rule ID 2588 // 8387 GIM_CheckFeatures, GIFBS_HasSSE42, 8388 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse42_crc32_64_64, 8389 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64, 8390 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, 8391 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s64, 8392 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, 8393 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR64RegClassID, 8394 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::GR64RegClassID, 8395 // (intrinsic_wo_chain:{ *:[i64] } 6500:{ *:[iPTR] }, GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) => (CRC32r64r64:{ *:[i64] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) 8396 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::CRC32r64r64, 8397 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 8398 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 8399 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 8400 GIR_EraseFromParent, /*InsnID*/0, 8401 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 8402 // GIR_Coverage, 2588, 8403 GIR_Done, 8404 // Label 637: @18087 8405 GIM_Try, /*On fail goto*//*Label 638*/ 18139, // Rule ID 2591 // 8406 GIM_CheckFeatures, GIFBS_HasSHA, 8407 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sha1nexte, 8408 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32, 8409 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, 8410 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32, 8411 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 8412 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 8413 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, 8414 // (intrinsic_wo_chain:{ *:[v4i32] } 6363:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (SHA1NEXTErr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) 8415 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHA1NEXTErr, 8416 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 8417 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 8418 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 8419 GIR_EraseFromParent, /*InsnID*/0, 8420 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 8421 // GIR_Coverage, 2591, 8422 GIR_Done, 8423 // Label 638: @18139 8424 GIM_Try, /*On fail goto*//*Label 639*/ 18191, // Rule ID 2593 // 8425 GIM_CheckFeatures, GIFBS_HasSHA, 8426 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sha1msg1, 8427 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32, 8428 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, 8429 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32, 8430 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 8431 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 8432 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, 8433 // (intrinsic_wo_chain:{ *:[v4i32] } 6361:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (SHA1MSG1rr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) 8434 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHA1MSG1rr, 8435 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 8436 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 8437 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 8438 GIR_EraseFromParent, /*InsnID*/0, 8439 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 8440 // GIR_Coverage, 2593, 8441 GIR_Done, 8442 // Label 639: @18191 8443 GIM_Try, /*On fail goto*//*Label 640*/ 18243, // Rule ID 2595 // 8444 GIM_CheckFeatures, GIFBS_HasSHA, 8445 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sha1msg2, 8446 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32, 8447 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, 8448 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32, 8449 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 8450 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 8451 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, 8452 // (intrinsic_wo_chain:{ *:[v4i32] } 6362:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (SHA1MSG2rr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) 8453 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHA1MSG2rr, 8454 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 8455 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 8456 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 8457 GIR_EraseFromParent, /*InsnID*/0, 8458 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 8459 // GIR_Coverage, 2595, 8460 GIR_Done, 8461 // Label 640: @18243 8462 GIM_Try, /*On fail goto*//*Label 641*/ 18295, // Rule ID 2599 // 8463 GIM_CheckFeatures, GIFBS_HasSHA, 8464 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sha256msg1, 8465 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32, 8466 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, 8467 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32, 8468 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 8469 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 8470 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, 8471 // (intrinsic_wo_chain:{ *:[v4i32] } 6365:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (SHA256MSG1rr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) 8472 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHA256MSG1rr, 8473 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 8474 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 8475 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 8476 GIR_EraseFromParent, /*InsnID*/0, 8477 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 8478 // GIR_Coverage, 2599, 8479 GIR_Done, 8480 // Label 641: @18295 8481 GIM_Try, /*On fail goto*//*Label 642*/ 18347, // Rule ID 2601 // 8482 GIM_CheckFeatures, GIFBS_HasSHA, 8483 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sha256msg2, 8484 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32, 8485 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, 8486 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32, 8487 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 8488 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 8489 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, 8490 // (intrinsic_wo_chain:{ *:[v4i32] } 6366:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (SHA256MSG2rr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) 8491 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHA256MSG2rr, 8492 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 8493 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 8494 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 8495 GIR_EraseFromParent, /*InsnID*/0, 8496 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 8497 // GIR_Coverage, 2601, 8498 GIR_Done, 8499 // Label 642: @18347 8500 GIM_Try, /*On fail goto*//*Label 643*/ 18399, // Rule ID 2603 // 8501 GIM_CheckFeatures, GIFBS_HasAES_HasAVX_NoVLX_Or_NoVAES, 8502 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesenc, 8503 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, 8504 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, 8505 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64, 8506 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 8507 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 8508 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, 8509 // (intrinsic_wo_chain:{ *:[v2i64] } 5421:{ *:[iPTR] }, VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (VAESENCrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) 8510 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VAESENCrr, 8511 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 8512 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 8513 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 8514 GIR_EraseFromParent, /*InsnID*/0, 8515 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 8516 // GIR_Coverage, 2603, 8517 GIR_Done, 8518 // Label 643: @18399 8519 GIM_Try, /*On fail goto*//*Label 644*/ 18451, // Rule ID 2605 // 8520 GIM_CheckFeatures, GIFBS_HasAES_HasAVX_NoVLX_Or_NoVAES, 8521 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesenclast, 8522 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, 8523 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, 8524 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64, 8525 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 8526 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 8527 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, 8528 // (intrinsic_wo_chain:{ *:[v2i64] } 5424:{ *:[iPTR] }, VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (VAESENCLASTrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) 8529 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VAESENCLASTrr, 8530 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 8531 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 8532 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 8533 GIR_EraseFromParent, /*InsnID*/0, 8534 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 8535 // GIR_Coverage, 2605, 8536 GIR_Done, 8537 // Label 644: @18451 8538 GIM_Try, /*On fail goto*//*Label 645*/ 18503, // Rule ID 2607 // 8539 GIM_CheckFeatures, GIFBS_HasAES_HasAVX_NoVLX_Or_NoVAES, 8540 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesdec, 8541 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, 8542 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, 8543 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64, 8544 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 8545 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 8546 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, 8547 // (intrinsic_wo_chain:{ *:[v2i64] } 5415:{ *:[iPTR] }, VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (VAESDECrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) 8548 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VAESDECrr, 8549 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 8550 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 8551 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 8552 GIR_EraseFromParent, /*InsnID*/0, 8553 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 8554 // GIR_Coverage, 2607, 8555 GIR_Done, 8556 // Label 645: @18503 8557 GIM_Try, /*On fail goto*//*Label 646*/ 18555, // Rule ID 2609 // 8558 GIM_CheckFeatures, GIFBS_HasAES_HasAVX_NoVLX_Or_NoVAES, 8559 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesdeclast, 8560 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, 8561 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, 8562 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64, 8563 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 8564 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 8565 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, 8566 // (intrinsic_wo_chain:{ *:[v2i64] } 5418:{ *:[iPTR] }, VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (VAESDECLASTrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) 8567 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VAESDECLASTrr, 8568 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 8569 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 8570 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 8571 GIR_EraseFromParent, /*InsnID*/0, 8572 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 8573 // GIR_Coverage, 2609, 8574 GIR_Done, 8575 // Label 646: @18555 8576 GIM_Try, /*On fail goto*//*Label 647*/ 18607, // Rule ID 2611 // 8577 GIM_CheckFeatures, GIFBS_HasVAES_NoVLX, 8578 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesenc_256, 8579 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s64, 8580 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64, 8581 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s64, 8582 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, 8583 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, 8584 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256RegClassID, 8585 // (intrinsic_wo_chain:{ *:[v4i64] } 5422:{ *:[iPTR] }, VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) => (VAESENCYrr:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) 8586 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VAESENCYrr, 8587 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 8588 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 8589 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 8590 GIR_EraseFromParent, /*InsnID*/0, 8591 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 8592 // GIR_Coverage, 2611, 8593 GIR_Done, 8594 // Label 647: @18607 8595 GIM_Try, /*On fail goto*//*Label 648*/ 18659, // Rule ID 2613 // 8596 GIM_CheckFeatures, GIFBS_HasVAES_NoVLX, 8597 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesenclast_256, 8598 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s64, 8599 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64, 8600 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s64, 8601 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, 8602 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, 8603 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256RegClassID, 8604 // (intrinsic_wo_chain:{ *:[v4i64] } 5425:{ *:[iPTR] }, VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) => (VAESENCLASTYrr:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) 8605 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VAESENCLASTYrr, 8606 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 8607 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 8608 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 8609 GIR_EraseFromParent, /*InsnID*/0, 8610 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 8611 // GIR_Coverage, 2613, 8612 GIR_Done, 8613 // Label 648: @18659 8614 GIM_Try, /*On fail goto*//*Label 649*/ 18711, // Rule ID 2615 // 8615 GIM_CheckFeatures, GIFBS_HasVAES_NoVLX, 8616 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesdec_256, 8617 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s64, 8618 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64, 8619 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s64, 8620 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, 8621 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, 8622 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256RegClassID, 8623 // (intrinsic_wo_chain:{ *:[v4i64] } 5416:{ *:[iPTR] }, VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) => (VAESDECYrr:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) 8624 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VAESDECYrr, 8625 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 8626 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 8627 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 8628 GIR_EraseFromParent, /*InsnID*/0, 8629 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 8630 // GIR_Coverage, 2615, 8631 GIR_Done, 8632 // Label 649: @18711 8633 GIM_Try, /*On fail goto*//*Label 650*/ 18763, // Rule ID 2617 // 8634 GIM_CheckFeatures, GIFBS_HasVAES_NoVLX, 8635 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesdeclast_256, 8636 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s64, 8637 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64, 8638 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s64, 8639 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, 8640 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, 8641 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256RegClassID, 8642 // (intrinsic_wo_chain:{ *:[v4i64] } 5419:{ *:[iPTR] }, VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) => (VAESDECLASTYrr:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) 8643 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VAESDECLASTYrr, 8644 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 8645 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 8646 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 8647 GIR_EraseFromParent, /*InsnID*/0, 8648 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 8649 // GIR_Coverage, 2617, 8650 GIR_Done, 8651 // Label 650: @18763 8652 GIM_Try, /*On fail goto*//*Label 651*/ 18815, // Rule ID 2619 // 8653 GIM_CheckFeatures, GIFBS_HasAES_NoAVX, 8654 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesenc, 8655 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, 8656 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, 8657 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64, 8658 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 8659 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 8660 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, 8661 // (intrinsic_wo_chain:{ *:[v2i64] } 5421:{ *:[iPTR] }, VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (AESENCrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) 8662 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::AESENCrr, 8663 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 8664 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 8665 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 8666 GIR_EraseFromParent, /*InsnID*/0, 8667 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 8668 // GIR_Coverage, 2619, 8669 GIR_Done, 8670 // Label 651: @18815 8671 GIM_Try, /*On fail goto*//*Label 652*/ 18867, // Rule ID 2621 // 8672 GIM_CheckFeatures, GIFBS_HasAES_NoAVX, 8673 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesenclast, 8674 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, 8675 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, 8676 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64, 8677 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 8678 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 8679 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, 8680 // (intrinsic_wo_chain:{ *:[v2i64] } 5424:{ *:[iPTR] }, VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (AESENCLASTrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) 8681 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::AESENCLASTrr, 8682 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 8683 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 8684 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 8685 GIR_EraseFromParent, /*InsnID*/0, 8686 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 8687 // GIR_Coverage, 2621, 8688 GIR_Done, 8689 // Label 652: @18867 8690 GIM_Try, /*On fail goto*//*Label 653*/ 18919, // Rule ID 2623 // 8691 GIM_CheckFeatures, GIFBS_HasAES_NoAVX, 8692 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesdec, 8693 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, 8694 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, 8695 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64, 8696 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 8697 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 8698 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, 8699 // (intrinsic_wo_chain:{ *:[v2i64] } 5415:{ *:[iPTR] }, VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (AESDECrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) 8700 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::AESDECrr, 8701 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 8702 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 8703 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 8704 GIR_EraseFromParent, /*InsnID*/0, 8705 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 8706 // GIR_Coverage, 2623, 8707 GIR_Done, 8708 // Label 653: @18919 8709 GIM_Try, /*On fail goto*//*Label 654*/ 18971, // Rule ID 2625 // 8710 GIM_CheckFeatures, GIFBS_HasAES_NoAVX, 8711 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesdeclast, 8712 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, 8713 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, 8714 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64, 8715 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 8716 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 8717 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, 8718 // (intrinsic_wo_chain:{ *:[v2i64] } 5418:{ *:[iPTR] }, VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (AESDECLASTrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) 8719 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::AESDECLASTrr, 8720 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 8721 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 8722 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 8723 GIR_EraseFromParent, /*InsnID*/0, 8724 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 8725 // GIR_Coverage, 2625, 8726 GIR_Done, 8727 // Label 654: @18971 8728 GIM_Try, /*On fail goto*//*Label 655*/ 19023, // Rule ID 2642 // 8729 GIM_CheckFeatures, GIFBS_HasSSE4A, 8730 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse4a_extrq, 8731 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, 8732 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, 8733 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s8, 8734 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 8735 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 8736 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, 8737 // (intrinsic_wo_chain:{ *:[v2i64] } 6515:{ *:[iPTR] }, VR128:{ *:[v2i64] }:$src, VR128:{ *:[v16i8] }:$mask) => (EXTRQ:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src, VR128:{ *:[v16i8] }:$mask) 8738 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::EXTRQ, 8739 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 8740 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src 8741 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // mask 8742 GIR_EraseFromParent, /*InsnID*/0, 8743 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 8744 // GIR_Coverage, 2642, 8745 GIR_Done, 8746 // Label 655: @19023 8747 GIM_Try, /*On fail goto*//*Label 656*/ 19075, // Rule ID 2644 // 8748 GIM_CheckFeatures, GIFBS_HasSSE4A, 8749 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse4a_insertq, 8750 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, 8751 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, 8752 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64, 8753 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 8754 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 8755 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, 8756 // (intrinsic_wo_chain:{ *:[v2i64] } 6517:{ *:[iPTR] }, VR128:{ *:[v2i64] }:$src, VR128:{ *:[v2i64] }:$mask) => (INSERTQ:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src, VR128:{ *:[v2i64] }:$mask) 8757 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::INSERTQ, 8758 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 8759 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src 8760 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // mask 8761 GIR_EraseFromParent, /*InsnID*/0, 8762 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 8763 // GIR_Coverage, 2644, 8764 GIR_Done, 8765 // Label 656: @19075 8766 GIM_Try, /*On fail goto*//*Label 657*/ 19127, // Rule ID 11166 // 8767 GIM_CheckFeatures, GIFBS_HasVAES_HasVLX, 8768 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesenc, 8769 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, 8770 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, 8771 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64, 8772 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, 8773 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, 8774 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128XRegClassID, 8775 // (intrinsic_wo_chain:{ *:[v2i64] } 5421:{ *:[iPTR] }, VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (VAESENCZ128rr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) 8776 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VAESENCZ128rr, 8777 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 8778 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 8779 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 8780 GIR_EraseFromParent, /*InsnID*/0, 8781 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 8782 // GIR_Coverage, 11166, 8783 GIR_Done, 8784 // Label 657: @19127 8785 GIM_Try, /*On fail goto*//*Label 658*/ 19179, // Rule ID 11168 // 8786 GIM_CheckFeatures, GIFBS_HasVAES_HasVLX, 8787 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesenc_256, 8788 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s64, 8789 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64, 8790 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s64, 8791 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, 8792 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, 8793 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256XRegClassID, 8794 // (intrinsic_wo_chain:{ *:[v4i64] } 5422:{ *:[iPTR] }, VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) => (VAESENCZ256rr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) 8795 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VAESENCZ256rr, 8796 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 8797 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 8798 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 8799 GIR_EraseFromParent, /*InsnID*/0, 8800 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 8801 // GIR_Coverage, 11168, 8802 GIR_Done, 8803 // Label 658: @19179 8804 GIM_Try, /*On fail goto*//*Label 659*/ 19231, // Rule ID 11170 // 8805 GIM_CheckFeatures, GIFBS_HasAVX512_HasVAES, 8806 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesenc_512, 8807 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s64, 8808 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s64, 8809 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s64, 8810 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, 8811 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, 8812 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR512RegClassID, 8813 // (intrinsic_wo_chain:{ *:[v8i64] } 5423:{ *:[iPTR] }, VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) => (VAESENCZrr:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) 8814 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VAESENCZrr, 8815 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 8816 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 8817 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 8818 GIR_EraseFromParent, /*InsnID*/0, 8819 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 8820 // GIR_Coverage, 11170, 8821 GIR_Done, 8822 // Label 659: @19231 8823 GIM_Try, /*On fail goto*//*Label 660*/ 19283, // Rule ID 11172 // 8824 GIM_CheckFeatures, GIFBS_HasVAES_HasVLX, 8825 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesenclast, 8826 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, 8827 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, 8828 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64, 8829 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, 8830 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, 8831 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128XRegClassID, 8832 // (intrinsic_wo_chain:{ *:[v2i64] } 5424:{ *:[iPTR] }, VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (VAESENCLASTZ128rr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) 8833 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VAESENCLASTZ128rr, 8834 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 8835 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 8836 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 8837 GIR_EraseFromParent, /*InsnID*/0, 8838 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 8839 // GIR_Coverage, 11172, 8840 GIR_Done, 8841 // Label 660: @19283 8842 GIM_Try, /*On fail goto*//*Label 661*/ 19335, // Rule ID 11174 // 8843 GIM_CheckFeatures, GIFBS_HasVAES_HasVLX, 8844 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesenclast_256, 8845 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s64, 8846 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64, 8847 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s64, 8848 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, 8849 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, 8850 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256XRegClassID, 8851 // (intrinsic_wo_chain:{ *:[v4i64] } 5425:{ *:[iPTR] }, VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) => (VAESENCLASTZ256rr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) 8852 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VAESENCLASTZ256rr, 8853 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 8854 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 8855 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 8856 GIR_EraseFromParent, /*InsnID*/0, 8857 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 8858 // GIR_Coverage, 11174, 8859 GIR_Done, 8860 // Label 661: @19335 8861 GIM_Try, /*On fail goto*//*Label 662*/ 19387, // Rule ID 11176 // 8862 GIM_CheckFeatures, GIFBS_HasAVX512_HasVAES, 8863 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesenclast_512, 8864 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s64, 8865 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s64, 8866 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s64, 8867 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, 8868 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, 8869 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR512RegClassID, 8870 // (intrinsic_wo_chain:{ *:[v8i64] } 5426:{ *:[iPTR] }, VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) => (VAESENCLASTZrr:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) 8871 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VAESENCLASTZrr, 8872 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 8873 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 8874 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 8875 GIR_EraseFromParent, /*InsnID*/0, 8876 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 8877 // GIR_Coverage, 11176, 8878 GIR_Done, 8879 // Label 662: @19387 8880 GIM_Try, /*On fail goto*//*Label 663*/ 19439, // Rule ID 11178 // 8881 GIM_CheckFeatures, GIFBS_HasVAES_HasVLX, 8882 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesdec, 8883 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, 8884 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, 8885 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64, 8886 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, 8887 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, 8888 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128XRegClassID, 8889 // (intrinsic_wo_chain:{ *:[v2i64] } 5415:{ *:[iPTR] }, VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (VAESDECZ128rr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) 8890 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VAESDECZ128rr, 8891 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 8892 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 8893 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 8894 GIR_EraseFromParent, /*InsnID*/0, 8895 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 8896 // GIR_Coverage, 11178, 8897 GIR_Done, 8898 // Label 663: @19439 8899 GIM_Try, /*On fail goto*//*Label 664*/ 19491, // Rule ID 11180 // 8900 GIM_CheckFeatures, GIFBS_HasVAES_HasVLX, 8901 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesdec_256, 8902 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s64, 8903 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64, 8904 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s64, 8905 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, 8906 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, 8907 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256XRegClassID, 8908 // (intrinsic_wo_chain:{ *:[v4i64] } 5416:{ *:[iPTR] }, VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) => (VAESDECZ256rr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) 8909 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VAESDECZ256rr, 8910 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 8911 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 8912 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 8913 GIR_EraseFromParent, /*InsnID*/0, 8914 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 8915 // GIR_Coverage, 11180, 8916 GIR_Done, 8917 // Label 664: @19491 8918 GIM_Try, /*On fail goto*//*Label 665*/ 19543, // Rule ID 11182 // 8919 GIM_CheckFeatures, GIFBS_HasAVX512_HasVAES, 8920 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesdec_512, 8921 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s64, 8922 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s64, 8923 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s64, 8924 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, 8925 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, 8926 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR512RegClassID, 8927 // (intrinsic_wo_chain:{ *:[v8i64] } 5417:{ *:[iPTR] }, VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) => (VAESDECZrr:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) 8928 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VAESDECZrr, 8929 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 8930 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 8931 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 8932 GIR_EraseFromParent, /*InsnID*/0, 8933 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 8934 // GIR_Coverage, 11182, 8935 GIR_Done, 8936 // Label 665: @19543 8937 GIM_Try, /*On fail goto*//*Label 666*/ 19595, // Rule ID 11184 // 8938 GIM_CheckFeatures, GIFBS_HasVAES_HasVLX, 8939 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesdeclast, 8940 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, 8941 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, 8942 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64, 8943 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, 8944 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, 8945 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128XRegClassID, 8946 // (intrinsic_wo_chain:{ *:[v2i64] } 5418:{ *:[iPTR] }, VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (VAESDECLASTZ128rr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) 8947 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VAESDECLASTZ128rr, 8948 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 8949 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 8950 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 8951 GIR_EraseFromParent, /*InsnID*/0, 8952 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 8953 // GIR_Coverage, 11184, 8954 GIR_Done, 8955 // Label 666: @19595 8956 GIM_Try, /*On fail goto*//*Label 667*/ 19647, // Rule ID 11186 // 8957 GIM_CheckFeatures, GIFBS_HasVAES_HasVLX, 8958 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesdeclast_256, 8959 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s64, 8960 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64, 8961 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s64, 8962 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, 8963 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, 8964 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256XRegClassID, 8965 // (intrinsic_wo_chain:{ *:[v4i64] } 5419:{ *:[iPTR] }, VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) => (VAESDECLASTZ256rr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) 8966 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VAESDECLASTZ256rr, 8967 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 8968 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 8969 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 8970 GIR_EraseFromParent, /*InsnID*/0, 8971 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 8972 // GIR_Coverage, 11186, 8973 GIR_Done, 8974 // Label 667: @19647 8975 GIM_Try, /*On fail goto*//*Label 668*/ 19699, // Rule ID 11188 // 8976 GIM_CheckFeatures, GIFBS_HasAVX512_HasVAES, 8977 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesdeclast_512, 8978 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s64, 8979 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s64, 8980 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s64, 8981 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, 8982 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, 8983 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR512RegClassID, 8984 // (intrinsic_wo_chain:{ *:[v8i64] } 5420:{ *:[iPTR] }, VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) => (VAESDECLASTZrr:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) 8985 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VAESDECLASTZrr, 8986 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 8987 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 8988 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 8989 GIR_EraseFromParent, /*InsnID*/0, 8990 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 8991 // GIR_Coverage, 11188, 8992 GIR_Done, 8993 // Label 668: @19699 8994 GIM_Reject, 8995 // Label 610: @19700 8996 GIM_Try, /*On fail goto*//*Label 669*/ 22150, 8997 GIM_CheckNumOperands, /*MI*/0, /*Expected*/5, 8998 GIM_Try, /*On fail goto*//*Label 670*/ 19773, // Rule ID 1459 // 8999 GIM_CheckFeatures, GIFBS_HasAVX, 9000 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse_cmp_ss, 9001 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32, 9002 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, 9003 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32, 9004 GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_s8, 9005 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 9006 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 9007 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, 9008 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/4, // MIs[1] 9009 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, 9010 // MIs[1] Operand 1 9011 // No operand predicates 9012 GIM_CheckIsSafeToFold, /*InsnID*/1, 9013 // (intrinsic_wo_chain:{ *:[v4f32] } 6370:{ *:[iPTR] }, VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src, (imm:{ *:[i8] }):$cc) => (VCMPSSrr_Int:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src, (imm:{ *:[i8] }):$cc) 9014 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCMPSSrr_Int, 9015 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 9016 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 9017 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src 9018 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // cc 9019 GIR_EraseFromParent, /*InsnID*/0, 9020 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 9021 // GIR_Coverage, 1459, 9022 GIR_Done, 9023 // Label 670: @19773 9024 GIM_Try, /*On fail goto*//*Label 671*/ 19841, // Rule ID 1461 // 9025 GIM_CheckFeatures, GIFBS_HasAVX, 9026 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse2_cmp_sd, 9027 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, 9028 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, 9029 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64, 9030 GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_s8, 9031 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 9032 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 9033 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, 9034 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/4, // MIs[1] 9035 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, 9036 // MIs[1] Operand 1 9037 // No operand predicates 9038 GIM_CheckIsSafeToFold, /*InsnID*/1, 9039 // (intrinsic_wo_chain:{ *:[v2f64] } 6408:{ *:[iPTR] }, VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src, (imm:{ *:[i8] }):$cc) => (VCMPSDrr_Int:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src, (imm:{ *:[i8] }):$cc) 9040 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCMPSDrr_Int, 9041 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 9042 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 9043 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src 9044 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // cc 9045 GIR_EraseFromParent, /*InsnID*/0, 9046 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 9047 // GIR_Coverage, 1461, 9048 GIR_Done, 9049 // Label 671: @19841 9050 GIM_Try, /*On fail goto*//*Label 672*/ 19909, // Rule ID 1463 // 9051 GIM_CheckFeatures, GIFBS_UseSSE1, 9052 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse_cmp_ss, 9053 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32, 9054 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, 9055 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32, 9056 GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_s8, 9057 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 9058 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 9059 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, 9060 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/4, // MIs[1] 9061 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, 9062 // MIs[1] Operand 1 9063 // No operand predicates 9064 GIM_CheckIsSafeToFold, /*InsnID*/1, 9065 // (intrinsic_wo_chain:{ *:[v4f32] } 6370:{ *:[iPTR] }, VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src, (imm:{ *:[i8] }):$cc) => (CMPSSrr_Int:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src, (imm:{ *:[i8] }):$cc) 9066 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::CMPSSrr_Int, 9067 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 9068 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 9069 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src 9070 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // cc 9071 GIR_EraseFromParent, /*InsnID*/0, 9072 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 9073 // GIR_Coverage, 1463, 9074 GIR_Done, 9075 // Label 672: @19909 9076 GIM_Try, /*On fail goto*//*Label 673*/ 19977, // Rule ID 1465 // 9077 GIM_CheckFeatures, GIFBS_UseSSE2, 9078 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse2_cmp_sd, 9079 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, 9080 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, 9081 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64, 9082 GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_s8, 9083 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 9084 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 9085 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, 9086 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/4, // MIs[1] 9087 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, 9088 // MIs[1] Operand 1 9089 // No operand predicates 9090 GIM_CheckIsSafeToFold, /*InsnID*/1, 9091 // (intrinsic_wo_chain:{ *:[v2f64] } 6408:{ *:[iPTR] }, VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src, (imm:{ *:[i8] }):$cc) => (CMPSDrr_Int:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src, (imm:{ *:[i8] }):$cc) 9092 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::CMPSDrr_Int, 9093 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 9094 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 9095 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src 9096 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // cc 9097 GIR_EraseFromParent, /*InsnID*/0, 9098 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 9099 // GIR_Coverage, 1465, 9100 GIR_Done, 9101 // Label 673: @19977 9102 GIM_Try, /*On fail goto*//*Label 674*/ 20045, // Rule ID 2523 // 9103 GIM_CheckFeatures, GIFBS_HasAVX, 9104 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse41_mpsadbw, 9105 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16, 9106 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8, 9107 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s8, 9108 GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_s8, 9109 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 9110 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 9111 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, 9112 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/4, // MIs[1] 9113 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, 9114 // MIs[1] Operand 1 9115 // No operand predicates 9116 GIM_CheckIsSafeToFold, /*InsnID*/1, 9117 // (intrinsic_wo_chain:{ *:[v8i16] } 6486:{ *:[iPTR] }, VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2, (imm:{ *:[i8] }):$src3) => (VMPSADBWrri:{ *:[v8i16] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2, (imm:{ *:[i8] }):$src3) 9118 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VMPSADBWrri, 9119 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 9120 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 9121 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 9122 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src3 9123 GIR_EraseFromParent, /*InsnID*/0, 9124 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 9125 // GIR_Coverage, 2523, 9126 GIR_Done, 9127 // Label 674: @20045 9128 GIM_Try, /*On fail goto*//*Label 675*/ 20113, // Rule ID 2525 // 9129 GIM_CheckFeatures, GIFBS_HasAVX, 9130 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse41_dpps, 9131 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32, 9132 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, 9133 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32, 9134 GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_s8, 9135 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 9136 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 9137 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, 9138 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/4, // MIs[1] 9139 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, 9140 // MIs[1] Operand 1 9141 // No operand predicates 9142 GIM_CheckIsSafeToFold, /*InsnID*/1, 9143 // (intrinsic_wo_chain:{ *:[v4f32] } 6484:{ *:[iPTR] }, VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2, (imm:{ *:[i8] }):$src3) => (VDPPSrri:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2, (imm:{ *:[i8] }):$src3) 9144 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VDPPSrri, 9145 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 9146 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 9147 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 9148 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src3 9149 GIR_EraseFromParent, /*InsnID*/0, 9150 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 9151 // GIR_Coverage, 2525, 9152 GIR_Done, 9153 // Label 675: @20113 9154 GIM_Try, /*On fail goto*//*Label 676*/ 20181, // Rule ID 2527 // 9155 GIM_CheckFeatures, GIFBS_HasAVX, 9156 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse41_dppd, 9157 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, 9158 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, 9159 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64, 9160 GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_s8, 9161 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 9162 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 9163 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, 9164 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/4, // MIs[1] 9165 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, 9166 // MIs[1] Operand 1 9167 // No operand predicates 9168 GIM_CheckIsSafeToFold, /*InsnID*/1, 9169 // (intrinsic_wo_chain:{ *:[v2f64] } 6483:{ *:[iPTR] }, VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2, (imm:{ *:[i8] }):$src3) => (VDPPDrri:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2, (imm:{ *:[i8] }):$src3) 9170 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VDPPDrri, 9171 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 9172 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 9173 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 9174 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src3 9175 GIR_EraseFromParent, /*InsnID*/0, 9176 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 9177 // GIR_Coverage, 2527, 9178 GIR_Done, 9179 // Label 676: @20181 9180 GIM_Try, /*On fail goto*//*Label 677*/ 20249, // Rule ID 2529 // 9181 GIM_CheckFeatures, GIFBS_HasAVX, 9182 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_avx_dp_ps_256, 9183 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s32, 9184 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s32, 9185 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s32, 9186 GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_s8, 9187 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, 9188 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, 9189 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256RegClassID, 9190 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/4, // MIs[1] 9191 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, 9192 // MIs[1] Operand 1 9193 // No operand predicates 9194 GIM_CheckIsSafeToFold, /*InsnID*/1, 9195 // (intrinsic_wo_chain:{ *:[v8f32] } 5440:{ *:[iPTR] }, VR256:{ *:[v8f32] }:$src1, VR256:{ *:[v8f32] }:$src2, (imm:{ *:[i8] }):$src3) => (VDPPSYrri:{ *:[v8f32] } VR256:{ *:[v8f32] }:$src1, VR256:{ *:[v8f32] }:$src2, (imm:{ *:[i8] }):$src3) 9196 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VDPPSYrri, 9197 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 9198 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 9199 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 9200 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src3 9201 GIR_EraseFromParent, /*InsnID*/0, 9202 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 9203 // GIR_Coverage, 2529, 9204 GIR_Done, 9205 // Label 677: @20249 9206 GIM_Try, /*On fail goto*//*Label 678*/ 20317, // Rule ID 2531 // 9207 GIM_CheckFeatures, GIFBS_HasAVX2, 9208 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_avx2_mpsadbw, 9209 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s16, 9210 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s8, 9211 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v32s8, 9212 GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_s8, 9213 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, 9214 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, 9215 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256RegClassID, 9216 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/4, // MIs[1] 9217 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, 9218 // MIs[1] Operand 1 9219 // No operand predicates 9220 GIM_CheckIsSafeToFold, /*InsnID*/1, 9221 // (intrinsic_wo_chain:{ *:[v16i16] } 5509:{ *:[iPTR] }, VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2, (imm:{ *:[i8] }):$src3) => (VMPSADBWYrri:{ *:[v16i16] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2, (imm:{ *:[i8] }):$src3) 9222 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VMPSADBWYrri, 9223 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 9224 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 9225 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 9226 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src3 9227 GIR_EraseFromParent, /*InsnID*/0, 9228 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 9229 // GIR_Coverage, 2531, 9230 GIR_Done, 9231 // Label 678: @20317 9232 GIM_Try, /*On fail goto*//*Label 679*/ 20385, // Rule ID 2533 // 9233 GIM_CheckFeatures, GIFBS_UseSSE41, 9234 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse41_mpsadbw, 9235 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16, 9236 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8, 9237 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s8, 9238 GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_s8, 9239 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 9240 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 9241 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, 9242 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/4, // MIs[1] 9243 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, 9244 // MIs[1] Operand 1 9245 // No operand predicates 9246 GIM_CheckIsSafeToFold, /*InsnID*/1, 9247 // (intrinsic_wo_chain:{ *:[v8i16] } 6486:{ *:[iPTR] }, VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2, (imm:{ *:[i8] }):$src3) => (MPSADBWrri:{ *:[v8i16] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2, (imm:{ *:[i8] }):$src3) 9248 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::MPSADBWrri, 9249 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 9250 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 9251 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 9252 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src3 9253 GIR_EraseFromParent, /*InsnID*/0, 9254 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 9255 // GIR_Coverage, 2533, 9256 GIR_Done, 9257 // Label 679: @20385 9258 GIM_Try, /*On fail goto*//*Label 680*/ 20453, // Rule ID 2535 // 9259 GIM_CheckFeatures, GIFBS_UseSSE41, 9260 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse41_dpps, 9261 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32, 9262 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, 9263 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32, 9264 GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_s8, 9265 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 9266 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 9267 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, 9268 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/4, // MIs[1] 9269 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, 9270 // MIs[1] Operand 1 9271 // No operand predicates 9272 GIM_CheckIsSafeToFold, /*InsnID*/1, 9273 // (intrinsic_wo_chain:{ *:[v4f32] } 6484:{ *:[iPTR] }, VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2, (imm:{ *:[i8] }):$src3) => (DPPSrri:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2, (imm:{ *:[i8] }):$src3) 9274 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::DPPSrri, 9275 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 9276 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 9277 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 9278 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src3 9279 GIR_EraseFromParent, /*InsnID*/0, 9280 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 9281 // GIR_Coverage, 2535, 9282 GIR_Done, 9283 // Label 680: @20453 9284 GIM_Try, /*On fail goto*//*Label 681*/ 20521, // Rule ID 2537 // 9285 GIM_CheckFeatures, GIFBS_UseSSE41, 9286 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse41_dppd, 9287 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, 9288 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, 9289 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64, 9290 GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_s8, 9291 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 9292 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 9293 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, 9294 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/4, // MIs[1] 9295 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, 9296 // MIs[1] Operand 1 9297 // No operand predicates 9298 GIM_CheckIsSafeToFold, /*InsnID*/1, 9299 // (intrinsic_wo_chain:{ *:[v2f64] } 6483:{ *:[iPTR] }, VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2, (imm:{ *:[i8] }):$src3) => (DPPDrri:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2, (imm:{ *:[i8] }):$src3) 9300 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::DPPDrri, 9301 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 9302 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 9303 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 9304 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src3 9305 GIR_EraseFromParent, /*InsnID*/0, 9306 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 9307 // GIR_Coverage, 2537, 9308 GIR_Done, 9309 // Label 681: @20521 9310 GIM_Try, /*On fail goto*//*Label 682*/ 20589, // Rule ID 2589 // 9311 GIM_CheckFeatures, GIFBS_HasSHA, 9312 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sha1rnds4, 9313 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32, 9314 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, 9315 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32, 9316 GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_s8, 9317 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 9318 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 9319 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, 9320 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/4, // MIs[1] 9321 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, 9322 // MIs[1] Operand 1 9323 // No operand predicates 9324 GIM_CheckIsSafeToFold, /*InsnID*/1, 9325 // (intrinsic_wo_chain:{ *:[v4i32] } 6364:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, (imm:{ *:[i8] }):$src3) => (SHA1RNDS4rri:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, (imm:{ *:[i8] }):$src3) 9326 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHA1RNDS4rri, 9327 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 9328 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 9329 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 9330 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src3 9331 GIR_EraseFromParent, /*InsnID*/0, 9332 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 9333 // GIR_Coverage, 2589, 9334 GIR_Done, 9335 // Label 682: @20589 9336 GIM_Try, /*On fail goto*//*Label 683*/ 20657, // Rule ID 2635 // 9337 GIM_CheckFeatures, GIFBS_HasPCLMUL_NoAVX, 9338 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_pclmulqdq, 9339 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, 9340 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, 9341 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64, 9342 GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_s8, 9343 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 9344 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 9345 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, 9346 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/4, // MIs[1] 9347 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, 9348 // MIs[1] Operand 1 9349 // No operand predicates 9350 GIM_CheckIsSafeToFold, /*InsnID*/1, 9351 // (intrinsic_wo_chain:{ *:[v2i64] } 6332:{ *:[iPTR] }, VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2, (imm:{ *:[i8] }):$src3) => (PCLMULQDQrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2, (imm:{ *:[i8] }):$src3) 9352 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::PCLMULQDQrr, 9353 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 9354 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 9355 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 9356 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src3 9357 GIR_EraseFromParent, /*InsnID*/0, 9358 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 9359 // GIR_Coverage, 2635, 9360 GIR_Done, 9361 // Label 683: @20657 9362 GIM_Try, /*On fail goto*//*Label 684*/ 20725, // Rule ID 2637 // 9363 GIM_CheckFeatures, GIFBS_HasAVX_HasPCLMUL_NoVLX_Or_NoVPCLMULQDQ, 9364 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_pclmulqdq, 9365 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, 9366 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, 9367 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64, 9368 GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_s8, 9369 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 9370 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 9371 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, 9372 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/4, // MIs[1] 9373 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, 9374 // MIs[1] Operand 1 9375 // No operand predicates 9376 GIM_CheckIsSafeToFold, /*InsnID*/1, 9377 // (intrinsic_wo_chain:{ *:[v2i64] } 6332:{ *:[iPTR] }, VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2, (imm:{ *:[i8] }):$src3) => (VPCLMULQDQrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2, (imm:{ *:[i8] }):$src3) 9378 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPCLMULQDQrr, 9379 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 9380 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 9381 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 9382 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src3 9383 GIR_EraseFromParent, /*InsnID*/0, 9384 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 9385 // GIR_Coverage, 2637, 9386 GIR_Done, 9387 // Label 684: @20725 9388 GIM_Try, /*On fail goto*//*Label 685*/ 20793, // Rule ID 2639 // 9389 GIM_CheckFeatures, GIFBS_HasVPCLMULQDQ_NoVLX, 9390 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_pclmulqdq_256, 9391 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s64, 9392 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64, 9393 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s64, 9394 GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_s8, 9395 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, 9396 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, 9397 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256RegClassID, 9398 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/4, // MIs[1] 9399 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, 9400 // MIs[1] Operand 1 9401 // No operand predicates 9402 GIM_CheckIsSafeToFold, /*InsnID*/1, 9403 // (intrinsic_wo_chain:{ *:[v4i64] } 6333:{ *:[iPTR] }, VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2, (imm:{ *:[i8] }):$src3) => (VPCLMULQDQYrr:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2, (imm:{ *:[i8] }):$src3) 9404 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPCLMULQDQYrr, 9405 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 9406 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 9407 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 9408 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src3 9409 GIR_EraseFromParent, /*InsnID*/0, 9410 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 9411 // GIR_Coverage, 2639, 9412 GIR_Done, 9413 // Label 685: @20793 9414 GIM_Try, /*On fail goto*//*Label 686*/ 20861, // Rule ID 11190 // 9415 GIM_CheckFeatures, GIFBS_HasAVX512_HasVPCLMULQDQ, 9416 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_pclmulqdq_512, 9417 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s64, 9418 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s64, 9419 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s64, 9420 GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_s8, 9421 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, 9422 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, 9423 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR512RegClassID, 9424 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/4, // MIs[1] 9425 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, 9426 // MIs[1] Operand 1 9427 // No operand predicates 9428 GIM_CheckIsSafeToFold, /*InsnID*/1, 9429 // (intrinsic_wo_chain:{ *:[v8i64] } 6334:{ *:[iPTR] }, VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2, (imm:{ *:[i8] }):$src3) => (VPCLMULQDQZrr:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2, (imm:{ *:[i8] }):$src3) 9430 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPCLMULQDQZrr, 9431 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 9432 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 9433 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 9434 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src3 9435 GIR_EraseFromParent, /*InsnID*/0, 9436 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 9437 // GIR_Coverage, 11190, 9438 GIR_Done, 9439 // Label 686: @20861 9440 GIM_Try, /*On fail goto*//*Label 687*/ 20929, // Rule ID 11192 // 9441 GIM_CheckFeatures, GIFBS_HasVLX_HasVPCLMULQDQ, 9442 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_pclmulqdq, 9443 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, 9444 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, 9445 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64, 9446 GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_s8, 9447 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, 9448 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, 9449 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128XRegClassID, 9450 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/4, // MIs[1] 9451 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, 9452 // MIs[1] Operand 1 9453 // No operand predicates 9454 GIM_CheckIsSafeToFold, /*InsnID*/1, 9455 // (intrinsic_wo_chain:{ *:[v2i64] } 6332:{ *:[iPTR] }, VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2, (imm:{ *:[i8] }):$src3) => (VPCLMULQDQZ128rr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2, (imm:{ *:[i8] }):$src3) 9456 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPCLMULQDQZ128rr, 9457 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 9458 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 9459 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 9460 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src3 9461 GIR_EraseFromParent, /*InsnID*/0, 9462 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 9463 // GIR_Coverage, 11192, 9464 GIR_Done, 9465 // Label 687: @20929 9466 GIM_Try, /*On fail goto*//*Label 688*/ 20997, // Rule ID 11194 // 9467 GIM_CheckFeatures, GIFBS_HasVLX_HasVPCLMULQDQ, 9468 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_pclmulqdq_256, 9469 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s64, 9470 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64, 9471 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s64, 9472 GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_s8, 9473 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, 9474 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, 9475 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256XRegClassID, 9476 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/4, // MIs[1] 9477 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, 9478 // MIs[1] Operand 1 9479 // No operand predicates 9480 GIM_CheckIsSafeToFold, /*InsnID*/1, 9481 // (intrinsic_wo_chain:{ *:[v4i64] } 6333:{ *:[iPTR] }, VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2, (imm:{ *:[i8] }):$src3) => (VPCLMULQDQZ256rr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2, (imm:{ *:[i8] }):$src3) 9482 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPCLMULQDQZ256rr, 9483 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 9484 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 9485 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 9486 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src3 9487 GIR_EraseFromParent, /*InsnID*/0, 9488 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 9489 // GIR_Coverage, 11194, 9490 GIR_Done, 9491 // Label 688: @20997 9492 GIM_Try, /*On fail goto*//*Label 689*/ 21061, // Rule ID 1219 // 9493 GIM_CheckFeatures, GIFBS_HasXOP, 9494 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vpmadcswd, 9495 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32, 9496 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16, 9497 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16, 9498 GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v4s32, 9499 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 9500 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 9501 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, 9502 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/X86::VR128RegClassID, 9503 // (intrinsic_wo_chain:{ *:[v4i32] } 6625:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2, VR128:{ *:[v4i32] }:$src3) => (VPMADCSWDrr:{ *:[v4i32] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2, VR128:{ *:[v4i32] }:$src3) 9504 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMADCSWDrr, 9505 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 9506 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 9507 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 9508 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3 9509 GIR_EraseFromParent, /*InsnID*/0, 9510 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 9511 // GIR_Coverage, 1219, 9512 GIR_Done, 9513 // Label 689: @21061 9514 GIM_Try, /*On fail goto*//*Label 690*/ 21125, // Rule ID 1221 // 9515 GIM_CheckFeatures, GIFBS_HasXOP, 9516 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vpmadcsswd, 9517 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32, 9518 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16, 9519 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16, 9520 GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v4s32, 9521 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 9522 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 9523 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, 9524 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/X86::VR128RegClassID, 9525 // (intrinsic_wo_chain:{ *:[v4i32] } 6624:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2, VR128:{ *:[v4i32] }:$src3) => (VPMADCSSWDrr:{ *:[v4i32] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2, VR128:{ *:[v4i32] }:$src3) 9526 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMADCSSWDrr, 9527 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 9528 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 9529 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 9530 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3 9531 GIR_EraseFromParent, /*InsnID*/0, 9532 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 9533 // GIR_Coverage, 1221, 9534 GIR_Done, 9535 // Label 690: @21125 9536 GIM_Try, /*On fail goto*//*Label 691*/ 21189, // Rule ID 1223 // 9537 GIM_CheckFeatures, GIFBS_HasXOP, 9538 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vpmacsww, 9539 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16, 9540 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16, 9541 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16, 9542 GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v8s16, 9543 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 9544 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 9545 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, 9546 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/X86::VR128RegClassID, 9547 // (intrinsic_wo_chain:{ *:[v8i16] } 6623:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2, VR128:{ *:[v8i16] }:$src3) => (VPMACSWWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2, VR128:{ *:[v8i16] }:$src3) 9548 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMACSWWrr, 9549 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 9550 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 9551 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 9552 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3 9553 GIR_EraseFromParent, /*InsnID*/0, 9554 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 9555 // GIR_Coverage, 1223, 9556 GIR_Done, 9557 // Label 691: @21189 9558 GIM_Try, /*On fail goto*//*Label 692*/ 21253, // Rule ID 1225 // 9559 GIM_CheckFeatures, GIFBS_HasXOP, 9560 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vpmacswd, 9561 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32, 9562 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16, 9563 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16, 9564 GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v4s32, 9565 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 9566 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 9567 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, 9568 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/X86::VR128RegClassID, 9569 // (intrinsic_wo_chain:{ *:[v4i32] } 6622:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2, VR128:{ *:[v4i32] }:$src3) => (VPMACSWDrr:{ *:[v4i32] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2, VR128:{ *:[v4i32] }:$src3) 9570 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMACSWDrr, 9571 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 9572 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 9573 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 9574 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3 9575 GIR_EraseFromParent, /*InsnID*/0, 9576 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 9577 // GIR_Coverage, 1225, 9578 GIR_Done, 9579 // Label 692: @21253 9580 GIM_Try, /*On fail goto*//*Label 693*/ 21317, // Rule ID 1227 // 9581 GIM_CheckFeatures, GIFBS_HasXOP, 9582 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vpmacssww, 9583 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16, 9584 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16, 9585 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16, 9586 GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v8s16, 9587 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 9588 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 9589 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, 9590 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/X86::VR128RegClassID, 9591 // (intrinsic_wo_chain:{ *:[v8i16] } 6621:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2, VR128:{ *:[v8i16] }:$src3) => (VPMACSSWWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2, VR128:{ *:[v8i16] }:$src3) 9592 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMACSSWWrr, 9593 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 9594 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 9595 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 9596 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3 9597 GIR_EraseFromParent, /*InsnID*/0, 9598 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 9599 // GIR_Coverage, 1227, 9600 GIR_Done, 9601 // Label 693: @21317 9602 GIM_Try, /*On fail goto*//*Label 694*/ 21381, // Rule ID 1229 // 9603 GIM_CheckFeatures, GIFBS_HasXOP, 9604 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vpmacsswd, 9605 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32, 9606 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16, 9607 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16, 9608 GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v4s32, 9609 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 9610 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 9611 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, 9612 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/X86::VR128RegClassID, 9613 // (intrinsic_wo_chain:{ *:[v4i32] } 6620:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2, VR128:{ *:[v4i32] }:$src3) => (VPMACSSWDrr:{ *:[v4i32] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2, VR128:{ *:[v4i32] }:$src3) 9614 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMACSSWDrr, 9615 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 9616 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 9617 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 9618 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3 9619 GIR_EraseFromParent, /*InsnID*/0, 9620 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 9621 // GIR_Coverage, 1229, 9622 GIR_Done, 9623 // Label 694: @21381 9624 GIM_Try, /*On fail goto*//*Label 695*/ 21445, // Rule ID 1231 // 9625 GIM_CheckFeatures, GIFBS_HasXOP, 9626 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vpmacssdql, 9627 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, 9628 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, 9629 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32, 9630 GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v2s64, 9631 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 9632 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 9633 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, 9634 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/X86::VR128RegClassID, 9635 // (intrinsic_wo_chain:{ *:[v2i64] } 6619:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v2i64] }:$src3) => (VPMACSSDQLrr:{ *:[v2i64] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v2i64] }:$src3) 9636 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMACSSDQLrr, 9637 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 9638 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 9639 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 9640 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3 9641 GIR_EraseFromParent, /*InsnID*/0, 9642 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 9643 // GIR_Coverage, 1231, 9644 GIR_Done, 9645 // Label 695: @21445 9646 GIM_Try, /*On fail goto*//*Label 696*/ 21509, // Rule ID 1233 // 9647 GIM_CheckFeatures, GIFBS_HasXOP, 9648 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vpmacssdqh, 9649 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, 9650 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, 9651 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32, 9652 GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v2s64, 9653 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 9654 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 9655 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, 9656 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/X86::VR128RegClassID, 9657 // (intrinsic_wo_chain:{ *:[v2i64] } 6618:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v2i64] }:$src3) => (VPMACSSDQHrr:{ *:[v2i64] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v2i64] }:$src3) 9658 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMACSSDQHrr, 9659 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 9660 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 9661 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 9662 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3 9663 GIR_EraseFromParent, /*InsnID*/0, 9664 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 9665 // GIR_Coverage, 1233, 9666 GIR_Done, 9667 // Label 696: @21509 9668 GIM_Try, /*On fail goto*//*Label 697*/ 21573, // Rule ID 1235 // 9669 GIM_CheckFeatures, GIFBS_HasXOP, 9670 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vpmacssdd, 9671 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32, 9672 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, 9673 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32, 9674 GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v4s32, 9675 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 9676 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 9677 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, 9678 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/X86::VR128RegClassID, 9679 // (intrinsic_wo_chain:{ *:[v4i32] } 6617:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v4i32] }:$src3) => (VPMACSSDDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v4i32] }:$src3) 9680 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMACSSDDrr, 9681 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 9682 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 9683 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 9684 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3 9685 GIR_EraseFromParent, /*InsnID*/0, 9686 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 9687 // GIR_Coverage, 1235, 9688 GIR_Done, 9689 // Label 697: @21573 9690 GIM_Try, /*On fail goto*//*Label 698*/ 21637, // Rule ID 1237 // 9691 GIM_CheckFeatures, GIFBS_HasXOP, 9692 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vpmacsdql, 9693 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, 9694 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, 9695 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32, 9696 GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v2s64, 9697 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 9698 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 9699 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, 9700 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/X86::VR128RegClassID, 9701 // (intrinsic_wo_chain:{ *:[v2i64] } 6616:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v2i64] }:$src3) => (VPMACSDQLrr:{ *:[v2i64] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v2i64] }:$src3) 9702 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMACSDQLrr, 9703 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 9704 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 9705 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 9706 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3 9707 GIR_EraseFromParent, /*InsnID*/0, 9708 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 9709 // GIR_Coverage, 1237, 9710 GIR_Done, 9711 // Label 698: @21637 9712 GIM_Try, /*On fail goto*//*Label 699*/ 21701, // Rule ID 1239 // 9713 GIM_CheckFeatures, GIFBS_HasXOP, 9714 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vpmacsdqh, 9715 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, 9716 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, 9717 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32, 9718 GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v2s64, 9719 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 9720 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 9721 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, 9722 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/X86::VR128RegClassID, 9723 // (intrinsic_wo_chain:{ *:[v2i64] } 6615:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v2i64] }:$src3) => (VPMACSDQHrr:{ *:[v2i64] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v2i64] }:$src3) 9724 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMACSDQHrr, 9725 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 9726 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 9727 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 9728 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3 9729 GIR_EraseFromParent, /*InsnID*/0, 9730 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 9731 // GIR_Coverage, 1239, 9732 GIR_Done, 9733 // Label 699: @21701 9734 GIM_Try, /*On fail goto*//*Label 700*/ 21765, // Rule ID 1241 // 9735 GIM_CheckFeatures, GIFBS_HasXOP, 9736 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vpmacsdd, 9737 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32, 9738 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, 9739 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32, 9740 GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v4s32, 9741 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 9742 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 9743 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, 9744 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/X86::VR128RegClassID, 9745 // (intrinsic_wo_chain:{ *:[v4i32] } 6614:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v4i32] }:$src3) => (VPMACSDDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v4i32] }:$src3) 9746 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMACSDDrr, 9747 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 9748 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 9749 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 9750 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3 9751 GIR_EraseFromParent, /*InsnID*/0, 9752 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 9753 // GIR_Coverage, 1241, 9754 GIR_Done, 9755 // Label 700: @21765 9756 GIM_Try, /*On fail goto*//*Label 701*/ 21829, // Rule ID 2557 // 9757 GIM_CheckFeatures, GIFBS_HasAVX, 9758 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse41_blendvpd, 9759 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, 9760 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, 9761 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64, 9762 GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v2s64, 9763 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 9764 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 9765 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, 9766 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/X86::VR128RegClassID, 9767 // (intrinsic_wo_chain:{ *:[v2f64] } 6481:{ *:[iPTR] }, VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2, VR128:{ *:[v2f64] }:$src3) => (VBLENDVPDrr:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2, VR128:{ *:[v2f64] }:$src3) 9768 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VBLENDVPDrr, 9769 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 9770 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 9771 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 9772 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3 9773 GIR_EraseFromParent, /*InsnID*/0, 9774 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 9775 // GIR_Coverage, 2557, 9776 GIR_Done, 9777 // Label 701: @21829 9778 GIM_Try, /*On fail goto*//*Label 702*/ 21893, // Rule ID 2559 // 9779 GIM_CheckFeatures, GIFBS_HasAVX, 9780 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_avx_blendv_pd_256, 9781 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s64, 9782 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64, 9783 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s64, 9784 GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v4s64, 9785 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, 9786 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, 9787 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256RegClassID, 9788 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/X86::VR256RegClassID, 9789 // (intrinsic_wo_chain:{ *:[v4f64] } 5431:{ *:[iPTR] }, VR256:{ *:[v4f64] }:$src1, VR256:{ *:[v4f64] }:$src2, VR256:{ *:[v4f64] }:$src3) => (VBLENDVPDYrr:{ *:[v4f64] } VR256:{ *:[v4f64] }:$src1, VR256:{ *:[v4f64] }:$src2, VR256:{ *:[v4f64] }:$src3) 9790 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VBLENDVPDYrr, 9791 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 9792 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 9793 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 9794 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3 9795 GIR_EraseFromParent, /*InsnID*/0, 9796 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 9797 // GIR_Coverage, 2559, 9798 GIR_Done, 9799 // Label 702: @21893 9800 GIM_Try, /*On fail goto*//*Label 703*/ 21957, // Rule ID 2561 // 9801 GIM_CheckFeatures, GIFBS_HasAVX, 9802 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse41_blendvps, 9803 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32, 9804 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, 9805 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32, 9806 GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v4s32, 9807 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 9808 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 9809 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, 9810 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/X86::VR128RegClassID, 9811 // (intrinsic_wo_chain:{ *:[v4f32] } 6482:{ *:[iPTR] }, VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2, VR128:{ *:[v4f32] }:$src3) => (VBLENDVPSrr:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2, VR128:{ *:[v4f32] }:$src3) 9812 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VBLENDVPSrr, 9813 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 9814 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 9815 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 9816 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3 9817 GIR_EraseFromParent, /*InsnID*/0, 9818 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 9819 // GIR_Coverage, 2561, 9820 GIR_Done, 9821 // Label 703: @21957 9822 GIM_Try, /*On fail goto*//*Label 704*/ 22021, // Rule ID 2563 // 9823 GIM_CheckFeatures, GIFBS_HasAVX, 9824 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_avx_blendv_ps_256, 9825 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s32, 9826 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s32, 9827 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s32, 9828 GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v8s32, 9829 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, 9830 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, 9831 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256RegClassID, 9832 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/X86::VR256RegClassID, 9833 // (intrinsic_wo_chain:{ *:[v8f32] } 5432:{ *:[iPTR] }, VR256:{ *:[v8f32] }:$src1, VR256:{ *:[v8f32] }:$src2, VR256:{ *:[v8f32] }:$src3) => (VBLENDVPSYrr:{ *:[v8f32] } VR256:{ *:[v8f32] }:$src1, VR256:{ *:[v8f32] }:$src2, VR256:{ *:[v8f32] }:$src3) 9834 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VBLENDVPSYrr, 9835 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 9836 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 9837 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 9838 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3 9839 GIR_EraseFromParent, /*InsnID*/0, 9840 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 9841 // GIR_Coverage, 2563, 9842 GIR_Done, 9843 // Label 704: @22021 9844 GIM_Try, /*On fail goto*//*Label 705*/ 22085, // Rule ID 2565 // 9845 GIM_CheckFeatures, GIFBS_HasAVX, 9846 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse41_pblendvb, 9847 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s8, 9848 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8, 9849 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s8, 9850 GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v16s8, 9851 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 9852 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 9853 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, 9854 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/X86::VR128RegClassID, 9855 // (intrinsic_wo_chain:{ *:[v16i8] } 6488:{ *:[iPTR] }, VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2, VR128:{ *:[v16i8] }:$src3) => (VPBLENDVBrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2, VR128:{ *:[v16i8] }:$src3) 9856 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPBLENDVBrr, 9857 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 9858 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 9859 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 9860 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3 9861 GIR_EraseFromParent, /*InsnID*/0, 9862 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 9863 // GIR_Coverage, 2565, 9864 GIR_Done, 9865 // Label 705: @22085 9866 GIM_Try, /*On fail goto*//*Label 706*/ 22149, // Rule ID 2567 // 9867 GIM_CheckFeatures, GIFBS_HasAVX2, 9868 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_avx2_pblendvb, 9869 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v32s8, 9870 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s8, 9871 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v32s8, 9872 GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v32s8, 9873 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, 9874 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, 9875 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256RegClassID, 9876 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/X86::VR256RegClassID, 9877 // (intrinsic_wo_chain:{ *:[v32i8] } 5518:{ *:[iPTR] }, VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2, VR256:{ *:[v32i8] }:$src3) => (VPBLENDVBYrr:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2, VR256:{ *:[v32i8] }:$src3) 9878 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPBLENDVBYrr, 9879 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 9880 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 9881 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 9882 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3 9883 GIR_EraseFromParent, /*InsnID*/0, 9884 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 9885 // GIR_Coverage, 2567, 9886 GIR_Done, 9887 // Label 706: @22149 9888 GIM_Reject, 9889 // Label 669: @22150 9890 GIM_Reject, 9891 // Label 8: @22151 9892 GIM_Try, /*On fail goto*//*Label 707*/ 22169, // Rule ID 1793 // 9893 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_sse2_pause, 9894 // (intrinsic_void 6440:{ *:[iPTR] }) => (PAUSE) 9895 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::PAUSE, 9896 GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, 9897 GIR_EraseFromParent, /*InsnID*/0, 9898 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 9899 // GIR_Coverage, 1793, 9900 GIR_Done, 9901 // Label 707: @22169 9902 GIM_Try, /*On fail goto*//*Label 708*/ 22189, // Rule ID 1794 // 9903 GIM_CheckFeatures, GIFBS_HasSSE1, 9904 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_sse_sfence, 9905 // (intrinsic_void 6398:{ *:[iPTR] }) => (SFENCE) 9906 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SFENCE, 9907 GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, 9908 GIR_EraseFromParent, /*InsnID*/0, 9909 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 9910 // GIR_Coverage, 1794, 9911 GIR_Done, 9912 // Label 708: @22189 9913 GIM_Try, /*On fail goto*//*Label 709*/ 22209, // Rule ID 1795 // 9914 GIM_CheckFeatures, GIFBS_HasSSE2, 9915 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_sse2_lfence, 9916 // (intrinsic_void 6425:{ *:[iPTR] }) => (LFENCE) 9917 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::LFENCE, 9918 GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, 9919 GIR_EraseFromParent, /*InsnID*/0, 9920 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 9921 // GIR_Coverage, 1795, 9922 GIR_Done, 9923 // Label 709: @22209 9924 GIM_Try, /*On fail goto*//*Label 710*/ 22229, // Rule ID 1796 // 9925 GIM_CheckFeatures, GIFBS_HasMFence, 9926 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_sse2_mfence, 9927 // (intrinsic_void 6429:{ *:[iPTR] }) => (MFENCE) 9928 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::MFENCE, 9929 GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, 9930 GIR_EraseFromParent, /*InsnID*/0, 9931 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 9932 // GIR_Coverage, 1796, 9933 GIR_Done, 9934 // Label 710: @22229 9935 GIM_Try, /*On fail goto*//*Label 711*/ 22249, // Rule ID 2677 // 9936 GIM_CheckFeatures, GIFBS_HasAVX, 9937 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_avx_vzeroall, 9938 // (intrinsic_void 5483:{ *:[iPTR] }) => (VZEROALL) 9939 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VZEROALL, 9940 GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, 9941 GIR_EraseFromParent, /*InsnID*/0, 9942 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 9943 // GIR_Coverage, 2677, 9944 GIR_Done, 9945 // Label 711: @22249 9946 GIM_Try, /*On fail goto*//*Label 712*/ 22269, // Rule ID 2678 // 9947 GIM_CheckFeatures, GIFBS_HasAVX, 9948 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_avx_vzeroupper, 9949 // (intrinsic_void 5484:{ *:[iPTR] }) => (VZEROUPPER) 9950 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VZEROUPPER, 9951 GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, 9952 GIR_EraseFromParent, /*InsnID*/0, 9953 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 9954 // GIR_Coverage, 2678, 9955 GIR_Done, 9956 // Label 712: @22269 9957 GIM_Try, /*On fail goto*//*Label 713*/ 22289, // Rule ID 11766 // 9958 GIM_CheckFeatures, GIFBS_HasMMX, 9959 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_mmx_emms, 9960 // (intrinsic_void 6258:{ *:[iPTR] }) => (MMX_EMMS) 9961 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::MMX_EMMS, 9962 GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, 9963 GIR_EraseFromParent, /*InsnID*/0, 9964 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 9965 // GIR_Coverage, 11766, 9966 GIR_Done, 9967 // Label 713: @22289 9968 GIM_Try, /*On fail goto*//*Label 714*/ 22309, // Rule ID 11985 // 9969 GIM_CheckFeatures, GIFBS_Has3DNow, 9970 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_mmx_femms, 9971 // (intrinsic_void 6259:{ *:[iPTR] }) => (FEMMS) 9972 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::FEMMS, 9973 GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, 9974 GIR_EraseFromParent, /*InsnID*/0, 9975 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 9976 // GIR_Coverage, 11985, 9977 GIR_Done, 9978 // Label 714: @22309 9979 GIM_Try, /*On fail goto*//*Label 715*/ 22329, // Rule ID 12000 // 9980 GIM_CheckFeatures, GIFBS_HasRTM, 9981 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_xend, 9982 // (intrinsic_void 6579:{ *:[iPTR] }) => (XEND) 9983 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::XEND, 9984 GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, 9985 GIR_EraseFromParent, /*InsnID*/0, 9986 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 9987 // GIR_Coverage, 12000, 9988 GIR_Done, 9989 // Label 715: @22329 9990 GIM_Try, /*On fail goto*//*Label 716*/ 22347, // Rule ID 12009 // 9991 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_wbinvd, 9992 // (intrinsic_void 6566:{ *:[iPTR] }) => (WBINVD) 9993 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::WBINVD, 9994 GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, 9995 GIR_EraseFromParent, /*InsnID*/0, 9996 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 9997 // GIR_Coverage, 12009, 9998 GIR_Done, 9999 // Label 716: @22347 10000 GIM_Try, /*On fail goto*//*Label 717*/ 22367, // Rule ID 12010 // 10001 GIM_CheckFeatures, GIFBS_HasWBNOINVD, 10002 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_wbnoinvd, 10003 // (intrinsic_void 6567:{ *:[iPTR] }) => (WBNOINVD) 10004 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::WBNOINVD, 10005 GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, 10006 GIR_EraseFromParent, /*InsnID*/0, 10007 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 10008 // GIR_Coverage, 12010, 10009 GIR_Done, 10010 // Label 717: @22367 10011 GIM_Try, /*On fail goto*//*Label 718*/ 22385, // Rule ID 12015 // 10012 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_saveprevssp, 10013 // (intrinsic_void 6355:{ *:[iPTR] }) => (SAVEPREVSSP) 10014 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SAVEPREVSSP, 10015 GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, 10016 GIR_EraseFromParent, /*InsnID*/0, 10017 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 10018 // GIR_Coverage, 12015, 10019 GIR_Done, 10020 // Label 718: @22385 10021 GIM_Try, /*On fail goto*//*Label 719*/ 22403, // Rule ID 12021 // 10022 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_setssbsy, 10023 // (intrinsic_void 6360:{ *:[iPTR] }) => (SETSSBSY) 10024 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SETSSBSY, 10025 GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, 10026 GIR_EraseFromParent, /*InsnID*/0, 10027 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 10028 // GIR_Coverage, 12021, 10029 GIR_Done, 10030 // Label 719: @22403 10031 GIM_Try, /*On fail goto*//*Label 720*/ 23363, 10032 GIM_CheckNumOperands, /*MI*/0, /*Expected*/2, 10033 GIM_Try, /*On fail goto*//*Label 721*/ 22434, // Rule ID 12006 // 10034 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_int, 10035 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s8, 10036 GIM_CheckConstantInt, /*MI*/0, /*Op*/1, 3, 10037 // (intrinsic_void 6251:{ *:[iPTR] }, 3:{ *:[i8] }) => (INT3) 10038 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::INT3, 10039 GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, 10040 GIR_EraseFromParent, /*InsnID*/0, 10041 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 10042 // GIR_Coverage, 12006, 10043 GIR_Done, 10044 // Label 721: @22434 10045 GIM_Try, /*On fail goto*//*Label 722*/ 22471, // Rule ID 12002 // 10046 GIM_CheckFeatures, GIFBS_HasRTM, 10047 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_xabort, 10048 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s8, 10049 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] 10050 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, 10051 // MIs[1] Operand 1 10052 // No operand predicates 10053 GIM_CheckIsSafeToFold, /*InsnID*/1, 10054 // (intrinsic_void 6577:{ *:[iPTR] }, (imm:{ *:[i8] }):$imm) => (XABORT (imm:{ *:[i8] }):$imm) 10055 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::XABORT, 10056 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm 10057 GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, 1, GIU_MergeMemOperands_EndOfList, 10058 GIR_EraseFromParent, /*InsnID*/0, 10059 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 10060 // GIR_Coverage, 12002, 10061 GIR_Done, 10062 // Label 722: @22471 10063 GIM_Try, /*On fail goto*//*Label 723*/ 22506, // Rule ID 12007 // 10064 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_int, 10065 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s8, 10066 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] 10067 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, 10068 // MIs[1] Operand 1 10069 // No operand predicates 10070 GIM_CheckIsSafeToFold, /*InsnID*/1, 10071 // (intrinsic_void 6251:{ *:[iPTR] }, (imm:{ *:[i8] }):$trap) => (INT (imm:{ *:[i8] }):$trap) 10072 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::INT, 10073 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // trap 10074 GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, 1, GIU_MergeMemOperands_EndOfList, 10075 GIR_EraseFromParent, /*InsnID*/0, 10076 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 10077 // GIR_Coverage, 12007, 10078 GIR_Done, 10079 // Label 723: @22506 10080 GIM_Try, /*On fail goto*//*Label 724*/ 22538, // Rule ID 1 // 10081 GIM_CheckFeatures, GIFBS_Not64BitMode, 10082 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_flags_read_u32, 10083 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32, 10084 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, 10085 // (intrinsic_w_chain:{ *:[i32] } 6241:{ *:[iPTR] }) => (RDFLAGS32:{ *:[i32] }:{ *:[i32] }) 10086 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::RDFLAGS32, 10087 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 10088 GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, 10089 GIR_EraseFromParent, /*InsnID*/0, 10090 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 10091 // GIR_Coverage, 1, 10092 GIR_Done, 10093 // Label 724: @22538 10094 GIM_Try, /*On fail goto*//*Label 725*/ 22570, // Rule ID 2 // 10095 GIM_CheckFeatures, GIFBS_In64BitMode, 10096 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_flags_read_u64, 10097 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64, 10098 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, 10099 // (intrinsic_w_chain:{ *:[i64] } 6242:{ *:[iPTR] }) => (RDFLAGS64:{ *:[i64] }:{ *:[i32] }) 10100 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::RDFLAGS64, 10101 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 10102 GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, 10103 GIR_EraseFromParent, /*InsnID*/0, 10104 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 10105 // GIR_Coverage, 2, 10106 GIR_Done, 10107 // Label 725: @22570 10108 GIM_Try, /*On fail goto*//*Label 726*/ 22602, // Rule ID 95 // 10109 GIM_CheckFeatures, GIFBS_HasLWP, 10110 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_slwpcb, 10111 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32, 10112 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, 10113 // (intrinsic_w_chain:{ *:[i32] } 6368:{ *:[iPTR] }) => (SLWPCB:{ *:[i32] }) 10114 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SLWPCB, 10115 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 10116 GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, 10117 GIR_EraseFromParent, /*InsnID*/0, 10118 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 10119 // GIR_Coverage, 95, 10120 GIR_Done, 10121 // Label 726: @22602 10122 GIM_Try, /*On fail goto*//*Label 727*/ 22634, // Rule ID 97 // 10123 GIM_CheckFeatures, GIFBS_HasLWP, 10124 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_slwpcb, 10125 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64, 10126 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, 10127 // (intrinsic_w_chain:{ *:[i64] } 6368:{ *:[iPTR] }) => (SLWPCB64:{ *:[i64] }) 10128 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SLWPCB64, 10129 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 10130 GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, 10131 GIR_EraseFromParent, /*InsnID*/0, 10132 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 10133 // GIR_Coverage, 97, 10134 GIR_Done, 10135 // Label 727: @22634 10136 GIM_Try, /*On fail goto*//*Label 728*/ 22666, // Rule ID 11999 // 10137 GIM_CheckFeatures, GIFBS_HasRTM, 10138 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xbegin, 10139 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32, 10140 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, 10141 // (intrinsic_w_chain:{ *:[i32] } 6578:{ *:[iPTR] }) => (XBEGIN:{ *:[i32] }) 10142 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::XBEGIN, 10143 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 10144 GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, 10145 GIR_EraseFromParent, /*InsnID*/0, 10146 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 10147 // GIR_Coverage, 11999, 10148 GIR_Done, 10149 // Label 728: @22666 10150 GIM_Try, /*On fail goto*//*Label 729*/ 22696, // Rule ID 12037 // 10151 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_rdpkru, 10152 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32, 10153 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, 10154 // (intrinsic_w_chain:{ *:[i32] } 6342:{ *:[iPTR] }) => (RDPKRU:{ *:[i32] }) 10155 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::RDPKRU, 10156 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 10157 GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, 10158 GIR_EraseFromParent, /*InsnID*/0, 10159 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 10160 // GIR_Coverage, 12037, 10161 GIR_Done, 10162 // Label 729: @22696 10163 GIM_Try, /*On fail goto*//*Label 730*/ 22728, // Rule ID 12038 // 10164 GIM_CheckFeatures, GIFBS_HasFSGSBase_In64BitMode, 10165 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_rdfsbase_32, 10166 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32, 10167 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, 10168 // (intrinsic_w_chain:{ *:[i32] } 6337:{ *:[iPTR] }) => (RDFSBASE:{ *:[i32] }) 10169 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::RDFSBASE, 10170 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 10171 GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, 10172 GIR_EraseFromParent, /*InsnID*/0, 10173 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 10174 // GIR_Coverage, 12038, 10175 GIR_Done, 10176 // Label 730: @22728 10177 GIM_Try, /*On fail goto*//*Label 731*/ 22760, // Rule ID 12039 // 10178 GIM_CheckFeatures, GIFBS_HasFSGSBase_In64BitMode, 10179 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_rdfsbase_64, 10180 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64, 10181 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, 10182 // (intrinsic_w_chain:{ *:[i64] } 6338:{ *:[iPTR] }) => (RDFSBASE64:{ *:[i64] }) 10183 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::RDFSBASE64, 10184 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 10185 GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, 10186 GIR_EraseFromParent, /*InsnID*/0, 10187 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 10188 // GIR_Coverage, 12039, 10189 GIR_Done, 10190 // Label 731: @22760 10191 GIM_Try, /*On fail goto*//*Label 732*/ 22792, // Rule ID 12040 // 10192 GIM_CheckFeatures, GIFBS_HasFSGSBase_In64BitMode, 10193 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_rdgsbase_32, 10194 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32, 10195 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, 10196 // (intrinsic_w_chain:{ *:[i32] } 6339:{ *:[iPTR] }) => (RDGSBASE:{ *:[i32] }) 10197 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::RDGSBASE, 10198 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 10199 GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, 10200 GIR_EraseFromParent, /*InsnID*/0, 10201 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 10202 // GIR_Coverage, 12040, 10203 GIR_Done, 10204 // Label 732: @22792 10205 GIM_Try, /*On fail goto*//*Label 733*/ 22824, // Rule ID 12041 // 10206 GIM_CheckFeatures, GIFBS_HasFSGSBase_In64BitMode, 10207 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_rdgsbase_64, 10208 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64, 10209 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, 10210 // (intrinsic_w_chain:{ *:[i64] } 6340:{ *:[iPTR] }) => (RDGSBASE64:{ *:[i64] }) 10211 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::RDGSBASE64, 10212 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 10213 GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, 10214 GIR_EraseFromParent, /*InsnID*/0, 10215 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 10216 // GIR_Coverage, 12041, 10217 GIR_Done, 10218 // Label 733: @22824 10219 GIM_Try, /*On fail goto*//*Label 734*/ 22856, // Rule ID 12047 // 10220 GIM_CheckFeatures, GIFBS_HasRDPID_Not64BitMode, 10221 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_rdpid, 10222 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32, 10223 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, 10224 // (intrinsic_w_chain:{ *:[i32] } 6341:{ *:[iPTR] }) => (RDPID32:{ *:[i32] }) 10225 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::RDPID32, 10226 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 10227 GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, 10228 GIR_EraseFromParent, /*InsnID*/0, 10229 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 10230 // GIR_Coverage, 12047, 10231 GIR_Done, 10232 // Label 734: @22856 10233 GIM_Try, /*On fail goto*//*Label 735*/ 22888, // Rule ID 3 // 10234 GIM_CheckFeatures, GIFBS_Not64BitMode, 10235 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_flags_write_u32, 10236 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, 10237 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, 10238 // (intrinsic_void 6243:{ *:[iPTR] }, GR32:{ *:[i32] }:$src) => (WRFLAGS32:{ *:[i32] } GR32:{ *:[i32] }:$src) 10239 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::WRFLAGS32, 10240 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 10241 GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, 10242 GIR_EraseFromParent, /*InsnID*/0, 10243 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 10244 // GIR_Coverage, 3, 10245 GIR_Done, 10246 // Label 735: @22888 10247 GIM_Try, /*On fail goto*//*Label 736*/ 22920, // Rule ID 4 // 10248 GIM_CheckFeatures, GIFBS_In64BitMode, 10249 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_flags_write_u64, 10250 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, 10251 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, 10252 // (intrinsic_void 6244:{ *:[iPTR] }, GR64:{ *:[i64] }:$src) => (WRFLAGS64:{ *:[i64] } GR64:{ *:[i64] }:$src) 10253 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::WRFLAGS64, 10254 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 10255 GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, 10256 GIR_EraseFromParent, /*InsnID*/0, 10257 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 10258 // GIR_Coverage, 4, 10259 GIR_Done, 10260 // Label 736: @22920 10261 GIM_Try, /*On fail goto*//*Label 737*/ 22952, // Rule ID 94 // 10262 GIM_CheckFeatures, GIFBS_HasLWP, 10263 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_llwpcb, 10264 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, 10265 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, 10266 // (intrinsic_void 6253:{ *:[iPTR] }, GR32:{ *:[i32] }:$src) => (LLWPCB GR32:{ *:[i32] }:$src) 10267 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::LLWPCB, 10268 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 10269 GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, 10270 GIR_EraseFromParent, /*InsnID*/0, 10271 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 10272 // GIR_Coverage, 94, 10273 GIR_Done, 10274 // Label 737: @22952 10275 GIM_Try, /*On fail goto*//*Label 738*/ 22984, // Rule ID 96 // 10276 GIM_CheckFeatures, GIFBS_HasLWP, 10277 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_llwpcb, 10278 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, 10279 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, 10280 // (intrinsic_void 6253:{ *:[iPTR] }, GR64:{ *:[i64] }:$src) => (LLWPCB64 GR64:{ *:[i64] }:$src) 10281 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::LLWPCB64, 10282 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 10283 GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, 10284 GIR_EraseFromParent, /*InsnID*/0, 10285 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 10286 // GIR_Coverage, 96, 10287 GIR_Done, 10288 // Label 738: @22984 10289 GIM_Try, /*On fail goto*//*Label 739*/ 23016, // Rule ID 108 // 10290 GIM_CheckFeatures, GIFBS_HasWAITPKG_Not64BitMode, 10291 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_umonitor, 10292 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16, 10293 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID, 10294 // (intrinsic_void 6551:{ *:[iPTR] }, GR16:{ *:[i16] }:$src) => (UMONITOR16 GR16:{ *:[i16] }:$src) 10295 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::UMONITOR16, 10296 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 10297 GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, 10298 GIR_EraseFromParent, /*InsnID*/0, 10299 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 10300 // GIR_Coverage, 108, 10301 GIR_Done, 10302 // Label 739: @23016 10303 GIM_Try, /*On fail goto*//*Label 740*/ 23048, // Rule ID 109 // 10304 GIM_CheckFeatures, GIFBS_HasWAITPKG, 10305 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_umonitor, 10306 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, 10307 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, 10308 // (intrinsic_void 6551:{ *:[iPTR] }, GR32:{ *:[i32] }:$src) => (UMONITOR32 GR32:{ *:[i32] }:$src) 10309 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::UMONITOR32, 10310 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 10311 GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, 10312 GIR_EraseFromParent, /*InsnID*/0, 10313 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 10314 // GIR_Coverage, 109, 10315 GIR_Done, 10316 // Label 740: @23048 10317 GIM_Try, /*On fail goto*//*Label 741*/ 23080, // Rule ID 110 // 10318 GIM_CheckFeatures, GIFBS_HasWAITPKG_In64BitMode, 10319 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_umonitor, 10320 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, 10321 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, 10322 // (intrinsic_void 6551:{ *:[iPTR] }, GR64:{ *:[i64] }:$src) => (UMONITOR64 GR64:{ *:[i64] }:$src) 10323 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::UMONITOR64, 10324 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 10325 GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, 10326 GIR_EraseFromParent, /*InsnID*/0, 10327 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 10328 // GIR_Coverage, 110, 10329 GIR_Done, 10330 // Label 741: @23080 10331 GIM_Try, /*On fail goto*//*Label 742*/ 23110, // Rule ID 12011 // 10332 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_incsspd, 10333 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, 10334 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, 10335 // (intrinsic_void 6249:{ *:[iPTR] }, GR32:{ *:[i32] }:$src) => (INCSSPD GR32:{ *:[i32] }:$src) 10336 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::INCSSPD, 10337 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 10338 GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, 10339 GIR_EraseFromParent, /*InsnID*/0, 10340 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 10341 // GIR_Coverage, 12011, 10342 GIR_Done, 10343 // Label 742: @23110 10344 GIM_Try, /*On fail goto*//*Label 743*/ 23140, // Rule ID 12012 // 10345 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_incsspq, 10346 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, 10347 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, 10348 // (intrinsic_void 6250:{ *:[iPTR] }, GR64:{ *:[i64] }:$src) => (INCSSPQ GR64:{ *:[i64] }:$src) 10349 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::INCSSPQ, 10350 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 10351 GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, 10352 GIR_EraseFromParent, /*InsnID*/0, 10353 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 10354 // GIR_Coverage, 12012, 10355 GIR_Done, 10356 // Label 743: @23140 10357 GIM_Try, /*On fail goto*//*Label 744*/ 23170, // Rule ID 12036 // 10358 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_wrpkru, 10359 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, 10360 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, 10361 // (intrinsic_void 6572:{ *:[iPTR] }, GR32:{ *:[i32] }:$src) => (WRPKRU GR32:{ *:[i32] }:$src) 10362 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::WRPKRU, 10363 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 10364 GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, 10365 GIR_EraseFromParent, /*InsnID*/0, 10366 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 10367 // GIR_Coverage, 12036, 10368 GIR_Done, 10369 // Label 744: @23170 10370 GIM_Try, /*On fail goto*//*Label 745*/ 23202, // Rule ID 12042 // 10371 GIM_CheckFeatures, GIFBS_HasFSGSBase_In64BitMode, 10372 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_wrfsbase_32, 10373 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, 10374 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, 10375 // (intrinsic_void 6568:{ *:[iPTR] }, GR32:{ *:[i32] }:$src) => (WRFSBASE GR32:{ *:[i32] }:$src) 10376 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::WRFSBASE, 10377 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 10378 GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, 10379 GIR_EraseFromParent, /*InsnID*/0, 10380 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 10381 // GIR_Coverage, 12042, 10382 GIR_Done, 10383 // Label 745: @23202 10384 GIM_Try, /*On fail goto*//*Label 746*/ 23234, // Rule ID 12043 // 10385 GIM_CheckFeatures, GIFBS_HasFSGSBase_In64BitMode, 10386 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_wrfsbase_64, 10387 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, 10388 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, 10389 // (intrinsic_void 6569:{ *:[iPTR] }, GR64:{ *:[i64] }:$src) => (WRFSBASE64 GR64:{ *:[i64] }:$src) 10390 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::WRFSBASE64, 10391 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 10392 GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, 10393 GIR_EraseFromParent, /*InsnID*/0, 10394 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 10395 // GIR_Coverage, 12043, 10396 GIR_Done, 10397 // Label 746: @23234 10398 GIM_Try, /*On fail goto*//*Label 747*/ 23266, // Rule ID 12044 // 10399 GIM_CheckFeatures, GIFBS_HasFSGSBase_In64BitMode, 10400 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_wrgsbase_32, 10401 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, 10402 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, 10403 // (intrinsic_void 6570:{ *:[iPTR] }, GR32:{ *:[i32] }:$src) => (WRGSBASE GR32:{ *:[i32] }:$src) 10404 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::WRGSBASE, 10405 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 10406 GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, 10407 GIR_EraseFromParent, /*InsnID*/0, 10408 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 10409 // GIR_Coverage, 12044, 10410 GIR_Done, 10411 // Label 747: @23266 10412 GIM_Try, /*On fail goto*//*Label 748*/ 23298, // Rule ID 12045 // 10413 GIM_CheckFeatures, GIFBS_HasFSGSBase_In64BitMode, 10414 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_wrgsbase_64, 10415 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, 10416 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, 10417 // (intrinsic_void 6571:{ *:[iPTR] }, GR64:{ *:[i64] }:$src) => (WRGSBASE64 GR64:{ *:[i64] }:$src) 10418 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::WRGSBASE64, 10419 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 10420 GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, 10421 GIR_EraseFromParent, /*InsnID*/0, 10422 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 10423 // GIR_Coverage, 12045, 10424 GIR_Done, 10425 // Label 748: @23298 10426 GIM_Try, /*On fail goto*//*Label 749*/ 23330, // Rule ID 12050 // 10427 GIM_CheckFeatures, GIFBS_HasPTWRITE, 10428 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_ptwrite32, 10429 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, 10430 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, 10431 // (intrinsic_void 6335:{ *:[iPTR] }, GR32:{ *:[i32] }:$dst) => (PTWRITEr GR32:{ *:[i32] }:$dst) 10432 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::PTWRITEr, 10433 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // dst 10434 GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, 10435 GIR_EraseFromParent, /*InsnID*/0, 10436 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 10437 // GIR_Coverage, 12050, 10438 GIR_Done, 10439 // Label 749: @23330 10440 GIM_Try, /*On fail goto*//*Label 750*/ 23362, // Rule ID 12051 // 10441 GIM_CheckFeatures, GIFBS_HasPTWRITE_In64BitMode, 10442 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_ptwrite64, 10443 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, 10444 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, 10445 // (intrinsic_void 6336:{ *:[iPTR] }, GR64:{ *:[i64] }:$dst) => (PTWRITE64r GR64:{ *:[i64] }:$dst) 10446 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::PTWRITE64r, 10447 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // dst 10448 GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, 10449 GIR_EraseFromParent, /*InsnID*/0, 10450 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 10451 // GIR_Coverage, 12051, 10452 GIR_Done, 10453 // Label 750: @23362 10454 GIM_Reject, 10455 // Label 720: @23363 10456 GIM_Try, /*On fail goto*//*Label 751*/ 23453, 10457 GIM_CheckNumOperands, /*MI*/0, /*Expected*/3, 10458 GIM_Try, /*On fail goto*//*Label 752*/ 23410, // Rule ID 12013 // 10459 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_rdsspd, 10460 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32, 10461 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, 10462 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, 10463 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR32RegClassID, 10464 // (intrinsic_w_chain:{ *:[i32] } 6350:{ *:[iPTR] }, GR32:{ *:[i32] }:$src) => (RDSSPD:{ *:[i32] } GR32:{ *:[i32] }:$src) 10465 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::RDSSPD, 10466 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 10467 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src 10468 GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, 10469 GIR_EraseFromParent, /*InsnID*/0, 10470 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 10471 // GIR_Coverage, 12013, 10472 GIR_Done, 10473 // Label 752: @23410 10474 GIM_Try, /*On fail goto*//*Label 753*/ 23452, // Rule ID 12014 // 10475 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_rdsspq, 10476 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64, 10477 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, 10478 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, 10479 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR64RegClassID, 10480 // (intrinsic_w_chain:{ *:[i64] } 6351:{ *:[iPTR] }, GR64:{ *:[i64] }:$src) => (RDSSPQ:{ *:[i64] } GR64:{ *:[i64] }:$src) 10481 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::RDSSPQ, 10482 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 10483 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src 10484 GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, 10485 GIR_EraseFromParent, /*InsnID*/0, 10486 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 10487 // GIR_Coverage, 12014, 10488 GIR_Done, 10489 // Label 753: @23452 10490 GIM_Reject, 10491 // Label 751: @23453 10492 GIM_Try, /*On fail goto*//*Label 754*/ 23581, 10493 GIM_CheckNumOperands, /*MI*/0, /*Expected*/4, 10494 GIM_Try, /*On fail goto*//*Label 755*/ 23519, // Rule ID 102 // 10495 GIM_CheckFeatures, GIFBS_HasLWP, 10496 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_lwpval32, 10497 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, 10498 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, 10499 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32, 10500 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, 10501 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR32RegClassID, 10502 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1] 10503 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, 10504 // MIs[1] Operand 1 10505 // No operand predicates 10506 GIM_CheckIsSafeToFold, /*InsnID*/1, 10507 // (intrinsic_void 6256:{ *:[iPTR] }, GR32:{ *:[i32] }:$src0, GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$cntl) => (LWPVAL32rri GR32:{ *:[i32] }:$src0, GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$cntl) 10508 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::LWPVAL32rri, 10509 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src0 10510 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 10511 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // cntl 10512 GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, 1, GIU_MergeMemOperands_EndOfList, 10513 GIR_EraseFromParent, /*InsnID*/0, 10514 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 10515 // GIR_Coverage, 102, 10516 GIR_Done, 10517 // Label 755: @23519 10518 GIM_Try, /*On fail goto*//*Label 756*/ 23580, // Rule ID 104 // 10519 GIM_CheckFeatures, GIFBS_HasLWP, 10520 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_lwpval64, 10521 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, 10522 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, 10523 GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32, 10524 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, 10525 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR32RegClassID, 10526 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1] 10527 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, 10528 // MIs[1] Operand 1 10529 // No operand predicates 10530 GIM_CheckIsSafeToFold, /*InsnID*/1, 10531 // (intrinsic_void 6257:{ *:[iPTR] }, GR64:{ *:[i64] }:$src0, GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$cntl) => (LWPVAL64rri GR64:{ *:[i64] }:$src0, GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$cntl) 10532 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::LWPVAL64rri, 10533 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src0 10534 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 10535 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // cntl 10536 GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, 1, GIU_MergeMemOperands_EndOfList, 10537 GIR_EraseFromParent, /*InsnID*/0, 10538 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 10539 // GIR_Coverage, 104, 10540 GIR_Done, 10541 // Label 756: @23580 10542 GIM_Reject, 10543 // Label 754: @23581 10544 GIM_Reject, 10545 // Label 9: @23582 10546 GIM_Try, /*On fail goto*//*Label 757*/ 23697, 10547 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32, 10548 GIM_SwitchType, /*MI*/0, /*Op*/1, /*[*/1, 3, /*)*//*default:*//*Label 760*/ 23696, 10549 /*GILLT_s8*//*Label 758*/ 23596, 10550 /*GILLT_s16*//*Label 759*/ 23654, 10551 // Label 758: @23596 10552 GIM_Try, /*On fail goto*//*Label 761*/ 23653, 10553 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, 10554 GIM_Try, /*On fail goto*//*Label 762*/ 23639, // Rule ID 13741 // 10555 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] 10556 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_BITCAST, 10557 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s1, 10558 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::VK8RegClassID, 10559 GIM_CheckIsSafeToFold, /*InsnID*/1, 10560 // (anyext:{ *:[i32] } (bitconvert:{ *:[i8] } VK8:{ *:[v8i1] }:$src)) => (COPY_TO_REGCLASS:{ *:[i32] } VK8:{ *:[v8i1] }:$src, GR32:{ *:[i32] }) 10561 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 10562 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 10563 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src 10564 GIR_EraseFromParent, /*InsnID*/0, 10565 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC GR32*/27, 10566 // GIR_Coverage, 13741, 10567 GIR_Done, 10568 // Label 762: @23639 10569 GIM_Try, /*On fail goto*//*Label 763*/ 23652, // Rule ID 15933 // 10570 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR8RegClassID, 10571 // (anyext:{ *:[i32] } GR8:{ *:[i8] }:$src) => (MOVZX32rr8:{ *:[i32] } GR8:{ *:[i8] }:$src) 10572 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::MOVZX32rr8, 10573 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 10574 // GIR_Coverage, 15933, 10575 GIR_Done, 10576 // Label 763: @23652 10577 GIM_Reject, 10578 // Label 761: @23653 10579 GIM_Reject, 10580 // Label 759: @23654 10581 GIM_Try, /*On fail goto*//*Label 764*/ 23695, // Rule ID 13739 // 10582 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, 10583 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] 10584 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_BITCAST, 10585 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16s1, 10586 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::VK16RegClassID, 10587 GIM_CheckIsSafeToFold, /*InsnID*/1, 10588 // (anyext:{ *:[i32] } (bitconvert:{ *:[i16] } VK16:{ *:[v16i1] }:$src)) => (COPY_TO_REGCLASS:{ *:[i32] } VK16:{ *:[v16i1] }:$src, GR32:{ *:[i32] }) 10589 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 10590 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 10591 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src 10592 GIR_EraseFromParent, /*InsnID*/0, 10593 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC GR32*/27, 10594 // GIR_Coverage, 13739, 10595 GIR_Done, 10596 // Label 764: @23695 10597 GIM_Reject, 10598 // Label 760: @23696 10599 GIM_Reject, 10600 // Label 757: @23697 10601 GIM_Reject, 10602 // Label 10: @23698 10603 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/1, 22, /*)*//*default:*//*Label 773*/ 24032, 10604 /*GILLT_s8*//*Label 765*/ 23725, 10605 /*GILLT_s16*//*Label 766*/ 23804, 0, 0, 0, 0, 0, 0, 0, 10606 /*GILLT_v4s32*//*Label 767*/ 23842, 0, 0, 10607 /*GILLT_v8s16*//*Label 768*/ 23866, 10608 /*GILLT_v8s32*//*Label 769*/ 23913, 0, 0, 10609 /*GILLT_v16s8*//*Label 770*/ 23937, 10610 /*GILLT_v16s16*//*Label 771*/ 23984, 0, 0, 10611 /*GILLT_v32s8*//*Label 772*/ 24008, 10612 // Label 765: @23725 10613 GIM_Try, /*On fail goto*//*Label 774*/ 23764, // Rule ID 15981 // 10614 GIM_CheckFeatures, GIFBS_In64BitMode, 10615 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, 10616 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, 10617 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, 10618 // (trunc:{ *:[i8] } GR32:{ *:[i32] }:$src) => (EXTRACT_SUBREG:{ *:[i8] } GR32:{ *:[i32] }:$src, sub_8bit:{ *:[i32] }) 10619 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 10620 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 10621 GIR_CopySubReg, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, /*SubRegIdx*/1, // src 10622 GIR_EraseFromParent, /*InsnID*/0, 10623 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC GR8*/0, 10624 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, /*RC GR32*/27, 10625 // GIR_Coverage, 15981, 10626 GIR_Done, 10627 // Label 774: @23764 10628 GIM_Try, /*On fail goto*//*Label 775*/ 23803, // Rule ID 15982 // 10629 GIM_CheckFeatures, GIFBS_In64BitMode, 10630 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16, 10631 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR16RegClassID, 10632 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID, 10633 // (trunc:{ *:[i8] } GR16:{ *:[i16] }:$src) => (EXTRACT_SUBREG:{ *:[i8] } GR16:{ *:[i16] }:$src, sub_8bit:{ *:[i32] }) 10634 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 10635 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 10636 GIR_CopySubReg, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, /*SubRegIdx*/1, // src 10637 GIR_EraseFromParent, /*InsnID*/0, 10638 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC GR8*/0, 10639 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, /*RC GR16*/6, 10640 // GIR_Coverage, 15982, 10641 GIR_Done, 10642 // Label 775: @23803 10643 GIM_Reject, 10644 // Label 766: @23804 10645 GIM_Try, /*On fail goto*//*Label 776*/ 23841, // Rule ID 15975 // 10646 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, 10647 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, 10648 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, 10649 // (trunc:{ *:[i16] } GR32:{ *:[i32] }:$src) => (EXTRACT_SUBREG:{ *:[i16] } GR32:{ *:[i32] }:$src, sub_16bit:{ *:[i32] }) 10650 GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, 10651 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 10652 GIR_CopySubReg, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, /*SubRegIdx*/4, // src 10653 GIR_EraseFromParent, /*InsnID*/0, 10654 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC GR16*/6, 10655 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, /*RC GR32*/27, 10656 // GIR_Coverage, 15975, 10657 GIR_Done, 10658 // Label 776: @23841 10659 GIM_Reject, 10660 // Label 767: @23842 10661 GIM_Try, /*On fail goto*//*Label 777*/ 23865, // Rule ID 9395 // 10662 GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, 10663 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64, 10664 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, 10665 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, 10666 // (trunc:{ *:[v4i32] } VR256X:{ *:[v4i64] }:$src1) => (VPMOVQDZ256rr:{ *:[v4i32] } VR256X:{ *:[v4i64] }:$src1) 10667 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVQDZ256rr, 10668 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 10669 // GIR_Coverage, 9395, 10670 GIR_Done, 10671 // Label 777: @23865 10672 GIM_Reject, 10673 // Label 768: @23866 10674 GIM_Try, /*On fail goto*//*Label 778*/ 23889, // Rule ID 9371 // 10675 GIM_CheckFeatures, GIFBS_HasAVX512, 10676 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64, 10677 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, 10678 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, 10679 // (trunc:{ *:[v8i16] } VR512:{ *:[v8i64] }:$src1) => (VPMOVQWZrr:{ *:[v8i16] } VR512:{ *:[v8i64] }:$src1) 10680 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVQWZrr, 10681 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 10682 // GIR_Coverage, 9371, 10683 GIR_Done, 10684 // Label 778: @23889 10685 GIM_Try, /*On fail goto*//*Label 779*/ 23912, // Rule ID 9449 // 10686 GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, 10687 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32, 10688 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, 10689 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, 10690 // (trunc:{ *:[v8i16] } VR256X:{ *:[v8i32] }:$src1) => (VPMOVDWZ256rr:{ *:[v8i16] } VR256X:{ *:[v8i32] }:$src1) 10691 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVDWZ256rr, 10692 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 10693 // GIR_Coverage, 9449, 10694 GIR_Done, 10695 // Label 779: @23912 10696 GIM_Reject, 10697 // Label 769: @23913 10698 GIM_Try, /*On fail goto*//*Label 780*/ 23936, // Rule ID 9398 // 10699 GIM_CheckFeatures, GIFBS_HasAVX512, 10700 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64, 10701 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, 10702 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, 10703 // (trunc:{ *:[v8i32] } VR512:{ *:[v8i64] }:$src1) => (VPMOVQDZrr:{ *:[v8i32] } VR512:{ *:[v8i64] }:$src1) 10704 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVQDZrr, 10705 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 10706 // GIR_Coverage, 9398, 10707 GIR_Done, 10708 // Label 780: @23936 10709 GIM_Reject, 10710 // Label 770: @23937 10711 GIM_Try, /*On fail goto*//*Label 781*/ 23960, // Rule ID 9425 // 10712 GIM_CheckFeatures, GIFBS_HasAVX512, 10713 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32, 10714 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, 10715 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, 10716 // (trunc:{ *:[v16i8] } VR512:{ *:[v16i32] }:$src1) => (VPMOVDBZrr:{ *:[v16i8] } VR512:{ *:[v16i32] }:$src1) 10717 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVDBZrr, 10718 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 10719 // GIR_Coverage, 9425, 10720 GIR_Done, 10721 // Label 781: @23960 10722 GIM_Try, /*On fail goto*//*Label 782*/ 23983, // Rule ID 9476 // 10723 GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, 10724 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s16, 10725 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, 10726 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, 10727 // (trunc:{ *:[v16i8] } VR256X:{ *:[v16i16] }:$src1) => (VPMOVWBZ256rr:{ *:[v16i8] } VR256X:{ *:[v16i16] }:$src1) 10728 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVWBZ256rr, 10729 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 10730 // GIR_Coverage, 9476, 10731 GIR_Done, 10732 // Label 782: @23983 10733 GIM_Reject, 10734 // Label 771: @23984 10735 GIM_Try, /*On fail goto*//*Label 783*/ 24007, // Rule ID 9452 // 10736 GIM_CheckFeatures, GIFBS_HasAVX512, 10737 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32, 10738 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, 10739 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, 10740 // (trunc:{ *:[v16i16] } VR512:{ *:[v16i32] }:$src1) => (VPMOVDWZrr:{ *:[v16i16] } VR512:{ *:[v16i32] }:$src1) 10741 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVDWZrr, 10742 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 10743 // GIR_Coverage, 9452, 10744 GIR_Done, 10745 // Label 783: @24007 10746 GIM_Reject, 10747 // Label 772: @24008 10748 GIM_Try, /*On fail goto*//*Label 784*/ 24031, // Rule ID 9479 // 10749 GIM_CheckFeatures, GIFBS_HasBWI, 10750 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s16, 10751 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, 10752 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, 10753 // (trunc:{ *:[v32i8] } VR512:{ *:[v32i16] }:$src1) => (VPMOVWBZrr:{ *:[v32i8] } VR512:{ *:[v32i16] }:$src1) 10754 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVWBZrr, 10755 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 10756 // GIR_Coverage, 9479, 10757 GIR_Done, 10758 // Label 784: @24031 10759 GIM_Reject, 10760 // Label 773: @24032 10761 GIM_Reject, 10762 // Label 11: @24033 10763 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/1, 5, /*)*//*default:*//*Label 789*/ 24235, 10764 /*GILLT_s8*//*Label 785*/ 24043, 10765 /*GILLT_s16*//*Label 786*/ 24065, 10766 /*GILLT_s32*//*Label 787*/ 24087, 10767 /*GILLT_s64*//*Label 788*/ 24184, 10768 // Label 785: @24043 10769 GIM_Try, /*On fail goto*//*Label 790*/ 24064, // Rule ID 19 // 10770 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR8RegClassID, 10771 // MIs[0] Operand 1 10772 // No operand predicates 10773 // (imm:{ *:[i8] }):$src => (MOV8ri:{ *:[i8] } (imm:{ *:[i8] }):$src) 10774 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::MOV8ri, 10775 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 10776 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/0, // src 10777 GIR_EraseFromParent, /*InsnID*/0, 10778 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 10779 // GIR_Coverage, 19, 10780 GIR_Done, 10781 // Label 790: @24064 10782 GIM_Reject, 10783 // Label 786: @24065 10784 GIM_Try, /*On fail goto*//*Label 791*/ 24086, // Rule ID 20 // 10785 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR16RegClassID, 10786 // MIs[0] Operand 1 10787 // No operand predicates 10788 // (imm:{ *:[i16] }):$src => (MOV16ri:{ *:[i16] } (imm:{ *:[i16] }):$src) 10789 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::MOV16ri, 10790 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 10791 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/0, // src 10792 GIR_EraseFromParent, /*InsnID*/0, 10793 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 10794 // GIR_Coverage, 20, 10795 GIR_Done, 10796 // Label 791: @24086 10797 GIM_Reject, 10798 // Label 787: @24087 10799 GIM_Try, /*On fail goto*//*Label 792*/ 24109, // Rule ID 12069 // 10800 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, 10801 // MIs[0] Operand 1 10802 GIM_CheckLiteralInt, /*MI*/0, /*Op*/1, 0, 10803 // 0:{ *:[i32] } => (MOV32r0:{ *:[i32] }:{ *:[i32] }) 10804 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::MOV32r0, 10805 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 10806 GIR_EraseFromParent, /*InsnID*/0, 10807 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 10808 // GIR_Coverage, 12069, 10809 GIR_Done, 10810 // Label 792: @24109 10811 GIM_Try, /*On fail goto*//*Label 793*/ 24133, // Rule ID 12070 // 10812 GIM_CheckFeatures, GIFBS_Not64BitMode_OptForSize, 10813 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, 10814 // MIs[0] Operand 1 10815 GIM_CheckLiteralInt, /*MI*/0, /*Op*/1, 1, 10816 // 1:{ *:[i32] } => (MOV32r1:{ *:[i32] }:{ *:[i32] }) 10817 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::MOV32r1, 10818 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 10819 GIR_EraseFromParent, /*InsnID*/0, 10820 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 10821 // GIR_Coverage, 12070, 10822 GIR_Done, 10823 // Label 793: @24133 10824 GIM_Try, /*On fail goto*//*Label 794*/ 24157, // Rule ID 12071 // 10825 GIM_CheckFeatures, GIFBS_Not64BitMode_OptForSize, 10826 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, 10827 // MIs[0] Operand 1 10828 GIM_CheckLiteralInt, /*MI*/0, /*Op*/1, -1, 10829 // -1:{ *:[i32] } => (MOV32r_1:{ *:[i32] }:{ *:[i32] }) 10830 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::MOV32r_1, 10831 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 10832 GIR_EraseFromParent, /*InsnID*/0, 10833 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 10834 // GIR_Coverage, 12071, 10835 GIR_Done, 10836 // Label 794: @24157 10837 GIM_Try, /*On fail goto*//*Label 795*/ 24183, // Rule ID 12072 // 10838 GIM_CheckFeatures, GIFBS_NotWin64WithoutFP_OptForMinSize, 10839 GIM_CheckI64ImmPredicate, /*MI*/0, /*Predicate*/GIPFP_I64_Predicate_i32immSExt8, 10840 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, 10841 // MIs[0] Operand 1 10842 // No operand predicates 10843 // (imm:{ *:[i32] })<<P:Predicate_i32immSExt8>>:$src => (MOV32ImmSExti8:{ *:[i32] } (imm:{ *:[i32] }):$src) 10844 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::MOV32ImmSExti8, 10845 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 10846 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/0, // src 10847 GIR_EraseFromParent, /*InsnID*/0, 10848 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 10849 // GIR_Coverage, 12072, 10850 GIR_Done, 10851 // Label 795: @24183 10852 GIM_Reject, 10853 // Label 788: @24184 10854 GIM_Try, /*On fail goto*//*Label 796*/ 24210, // Rule ID 12073 // 10855 GIM_CheckFeatures, GIFBS_NotWin64WithoutFP_OptForMinSize, 10856 GIM_CheckI64ImmPredicate, /*MI*/0, /*Predicate*/GIPFP_I64_Predicate_i64immSExt8, 10857 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, 10858 // MIs[0] Operand 1 10859 // No operand predicates 10860 // (imm:{ *:[i64] })<<P:Predicate_i64immSExt8>>:$src => (MOV64ImmSExti8:{ *:[i64] } (imm:{ *:[i64] }):$src) 10861 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::MOV64ImmSExti8, 10862 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 10863 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/0, // src 10864 GIR_EraseFromParent, /*InsnID*/0, 10865 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 10866 // GIR_Coverage, 12073, 10867 GIR_Done, 10868 // Label 796: @24210 10869 GIM_Try, /*On fail goto*//*Label 797*/ 24234, // Rule ID 22 // 10870 GIM_CheckI64ImmPredicate, /*MI*/0, /*Predicate*/GIPFP_I64_Predicate_i64immSExt32, 10871 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, 10872 // MIs[0] Operand 1 10873 // No operand predicates 10874 // (imm:{ *:[i64] })<<P:Predicate_i64immSExt32>>:$src => (MOV64ri32:{ *:[i64] } (imm:{ *:[i64] }):$src) 10875 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::MOV64ri32, 10876 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 10877 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/0, // src 10878 GIR_EraseFromParent, /*InsnID*/0, 10879 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 10880 // GIR_Coverage, 22, 10881 GIR_Done, 10882 // Label 797: @24234 10883 GIM_Reject, 10884 // Label 789: @24235 10885 GIM_Reject, 10886 // Label 12: @24236 10887 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/3, 6, /*)*//*default:*//*Label 801*/ 24428, 10888 /*GILLT_s32*//*Label 798*/ 24245, 10889 /*GILLT_s64*//*Label 799*/ 24292, 10890 /*GILLT_s80*//*Label 800*/ 24385, 10891 // Label 798: @24245 10892 GIM_Try, /*On fail goto*//*Label 802*/ 24268, // Rule ID 891 // 10893 GIM_CheckFeatures, GIFBS_FPStackf32, 10894 GIM_CheckAPFloatImmPredicate, /*MI*/0, /*Predicate*/GIPFP_APFloat_Predicate_fpimm0, 10895 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP32RegClassID, 10896 // MIs[0] Operand 1 10897 // No operand predicates 10898 // (fpimm:{ *:[f32] })<<P:Predicate_fpimm0>> => (LD_Fp032:{ *:[f32] }:{ *:[i16] }) 10899 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::LD_Fp032, 10900 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 10901 GIR_EraseFromParent, /*InsnID*/0, 10902 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 10903 // GIR_Coverage, 891, 10904 GIR_Done, 10905 // Label 802: @24268 10906 GIM_Try, /*On fail goto*//*Label 803*/ 24291, // Rule ID 892 // 10907 GIM_CheckFeatures, GIFBS_FPStackf32, 10908 GIM_CheckAPFloatImmPredicate, /*MI*/0, /*Predicate*/GIPFP_APFloat_Predicate_fpimm1, 10909 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP32RegClassID, 10910 // MIs[0] Operand 1 10911 // No operand predicates 10912 // (fpimm:{ *:[f32] })<<P:Predicate_fpimm1>> => (LD_Fp132:{ *:[f32] }:{ *:[i16] }) 10913 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::LD_Fp132, 10914 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 10915 GIR_EraseFromParent, /*InsnID*/0, 10916 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 10917 // GIR_Coverage, 892, 10918 GIR_Done, 10919 // Label 803: @24291 10920 GIM_Reject, 10921 // Label 799: @24292 10922 GIM_Try, /*On fail goto*//*Label 804*/ 24315, // Rule ID 893 // 10923 GIM_CheckFeatures, GIFBS_FPStackf64, 10924 GIM_CheckAPFloatImmPredicate, /*MI*/0, /*Predicate*/GIPFP_APFloat_Predicate_fpimm0, 10925 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP64RegClassID, 10926 // MIs[0] Operand 1 10927 // No operand predicates 10928 // (fpimm:{ *:[f64] })<<P:Predicate_fpimm0>> => (LD_Fp064:{ *:[f64] }:{ *:[i16] }) 10929 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::LD_Fp064, 10930 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 10931 GIR_EraseFromParent, /*InsnID*/0, 10932 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 10933 // GIR_Coverage, 893, 10934 GIR_Done, 10935 // Label 804: @24315 10936 GIM_Try, /*On fail goto*//*Label 805*/ 24338, // Rule ID 894 // 10937 GIM_CheckFeatures, GIFBS_FPStackf64, 10938 GIM_CheckAPFloatImmPredicate, /*MI*/0, /*Predicate*/GIPFP_APFloat_Predicate_fpimm1, 10939 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP64RegClassID, 10940 // MIs[0] Operand 1 10941 // No operand predicates 10942 // (fpimm:{ *:[f64] })<<P:Predicate_fpimm1>> => (LD_Fp164:{ *:[f64] }:{ *:[i16] }) 10943 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::LD_Fp164, 10944 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 10945 GIR_EraseFromParent, /*InsnID*/0, 10946 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 10947 // GIR_Coverage, 894, 10948 GIR_Done, 10949 // Label 805: @24338 10950 GIM_Try, /*On fail goto*//*Label 806*/ 24361, // Rule ID 1281 // 10951 GIM_CheckFeatures, GIFBS_HasSSE2_NoAVX512, 10952 GIM_CheckAPFloatImmPredicate, /*MI*/0, /*Predicate*/GIPFP_APFloat_Predicate_fpimm0, 10953 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64RegClassID, 10954 // MIs[0] Operand 1 10955 // No operand predicates 10956 // (fpimm:{ *:[f64] })<<P:Predicate_fpimm0>> => (FsFLD0SD:{ *:[f64] }) 10957 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::FsFLD0SD, 10958 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 10959 GIR_EraseFromParent, /*InsnID*/0, 10960 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 10961 // GIR_Coverage, 1281, 10962 GIR_Done, 10963 // Label 806: @24361 10964 GIM_Try, /*On fail goto*//*Label 807*/ 24384, // Rule ID 2784 // 10965 GIM_CheckFeatures, GIFBS_HasAVX512, 10966 GIM_CheckAPFloatImmPredicate, /*MI*/0, /*Predicate*/GIPFP_APFloat_Predicate_fpimm0, 10967 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64XRegClassID, 10968 // MIs[0] Operand 1 10969 // No operand predicates 10970 // (fpimm:{ *:[f64] })<<P:Predicate_fpimm0>> => (AVX512_FsFLD0SD:{ *:[f64] }) 10971 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::AVX512_FsFLD0SD, 10972 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 10973 GIR_EraseFromParent, /*InsnID*/0, 10974 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 10975 // GIR_Coverage, 2784, 10976 GIR_Done, 10977 // Label 807: @24384 10978 GIM_Reject, 10979 // Label 800: @24385 10980 GIM_Try, /*On fail goto*//*Label 808*/ 24406, // Rule ID 895 // 10981 GIM_CheckAPFloatImmPredicate, /*MI*/0, /*Predicate*/GIPFP_APFloat_Predicate_fpimm0, 10982 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP80RegClassID, 10983 // MIs[0] Operand 1 10984 // No operand predicates 10985 // (fpimm:{ *:[f80] })<<P:Predicate_fpimm0>> => (LD_Fp080:{ *:[f80] }:{ *:[i16] }) 10986 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::LD_Fp080, 10987 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 10988 GIR_EraseFromParent, /*InsnID*/0, 10989 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 10990 // GIR_Coverage, 895, 10991 GIR_Done, 10992 // Label 808: @24406 10993 GIM_Try, /*On fail goto*//*Label 809*/ 24427, // Rule ID 896 // 10994 GIM_CheckAPFloatImmPredicate, /*MI*/0, /*Predicate*/GIPFP_APFloat_Predicate_fpimm1, 10995 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP80RegClassID, 10996 // MIs[0] Operand 1 10997 // No operand predicates 10998 // (fpimm:{ *:[f80] })<<P:Predicate_fpimm1>> => (LD_Fp180:{ *:[f80] }:{ *:[i16] }) 10999 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::LD_Fp180, 11000 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 11001 GIR_EraseFromParent, /*InsnID*/0, 11002 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 11003 // GIR_Coverage, 896, 11004 GIR_Done, 11005 // Label 809: @24427 11006 GIM_Reject, 11007 // Label 801: @24428 11008 GIM_Reject, 11009 // Label 13: @24429 11010 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/3, 25, /*)*//*default:*//*Label 824*/ 24932, 11011 /*GILLT_s32*//*Label 810*/ 24457, 11012 /*GILLT_s64*//*Label 811*/ 24500, 0, 0, 0, 11013 /*GILLT_v2s64*//*Label 812*/ 24566, 0, 11014 /*GILLT_v4s32*//*Label 813*/ 24590, 11015 /*GILLT_v4s64*//*Label 814*/ 24614, 0, 11016 /*GILLT_v8s16*//*Label 815*/ 24638, 11017 /*GILLT_v8s32*//*Label 816*/ 24662, 11018 /*GILLT_v8s64*//*Label 817*/ 24686, 0, 11019 /*GILLT_v16s8*//*Label 818*/ 24710, 11020 /*GILLT_v16s16*//*Label 819*/ 24773, 11021 /*GILLT_v16s32*//*Label 820*/ 24836, 0, 11022 /*GILLT_v32s8*//*Label 821*/ 24860, 11023 /*GILLT_v32s16*//*Label 822*/ 24884, 0, 11024 /*GILLT_v64s8*//*Label 823*/ 24908, 11025 // Label 810: @24457 11026 GIM_Try, /*On fail goto*//*Label 825*/ 24478, // Rule ID 536 // 11027 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s8, 11028 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, 11029 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR8RegClassID, 11030 // (sext:{ *:[i32] } GR8:{ *:[i8] }:$src) => (MOVSX32rr8:{ *:[i32] } GR8:{ *:[i8] }:$src) 11031 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::MOVSX32rr8, 11032 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 11033 // GIR_Coverage, 536, 11034 GIR_Done, 11035 // Label 825: @24478 11036 GIM_Try, /*On fail goto*//*Label 826*/ 24499, // Rule ID 538 // 11037 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16, 11038 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, 11039 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID, 11040 // (sext:{ *:[i32] } GR16:{ *:[i16] }:$src) => (MOVSX32rr16:{ *:[i32] } GR16:{ *:[i16] }:$src) 11041 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::MOVSX32rr16, 11042 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 11043 // GIR_Coverage, 538, 11044 GIR_Done, 11045 // Label 826: @24499 11046 GIM_Reject, 11047 // Label 811: @24500 11048 GIM_Try, /*On fail goto*//*Label 827*/ 24521, // Rule ID 544 // 11049 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s8, 11050 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, 11051 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR8RegClassID, 11052 // (sext:{ *:[i64] } GR8:{ *:[i8] }:$src) => (MOVSX64rr8:{ *:[i64] } GR8:{ *:[i8] }:$src) 11053 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::MOVSX64rr8, 11054 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 11055 // GIR_Coverage, 544, 11056 GIR_Done, 11057 // Label 827: @24521 11058 GIM_Try, /*On fail goto*//*Label 828*/ 24542, // Rule ID 546 // 11059 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16, 11060 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, 11061 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID, 11062 // (sext:{ *:[i64] } GR16:{ *:[i16] }:$src) => (MOVSX64rr16:{ *:[i64] } GR16:{ *:[i16] }:$src) 11063 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::MOVSX64rr16, 11064 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 11065 // GIR_Coverage, 546, 11066 GIR_Done, 11067 // Label 828: @24542 11068 GIM_Try, /*On fail goto*//*Label 829*/ 24565, // Rule ID 548 // 11069 GIM_CheckFeatures, GIFBS_In64BitMode, 11070 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, 11071 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, 11072 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, 11073 // (sext:{ *:[i64] } GR32:{ *:[i32] }:$src) => (MOVSX64rr32:{ *:[i64] } GR32:{ *:[i32] }:$src) 11074 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::MOVSX64rr32, 11075 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 11076 // GIR_Coverage, 548, 11077 GIR_Done, 11078 // Label 829: @24565 11079 GIM_Reject, 11080 // Label 812: @24566 11081 GIM_Try, /*On fail goto*//*Label 830*/ 24589, // Rule ID 9775 // 11082 GIM_CheckFeatures, GIFBS_HasDQI_HasVLX, 11083 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s1, 11084 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, 11085 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK2RegClassID, 11086 // (sext:{ *:[v2i64] } VK2:{ *:[v2i1] }:$src) => (VPMOVM2QZ128rr:{ *:[v2i64] } VK2:{ *:[v2i1] }:$src) 11087 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVM2QZ128rr, 11088 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 11089 // GIR_Coverage, 9775, 11090 GIR_Done, 11091 // Label 830: @24589 11092 GIM_Reject, 11093 // Label 813: @24590 11094 GIM_Try, /*On fail goto*//*Label 831*/ 24613, // Rule ID 9772 // 11095 GIM_CheckFeatures, GIFBS_HasDQI_HasVLX, 11096 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s1, 11097 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, 11098 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK4RegClassID, 11099 // (sext:{ *:[v4i32] } VK4:{ *:[v4i1] }:$src) => (VPMOVM2DZ128rr:{ *:[v4i32] } VK4:{ *:[v4i1] }:$src) 11100 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVM2DZ128rr, 11101 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 11102 // GIR_Coverage, 9772, 11103 GIR_Done, 11104 // Label 831: @24613 11105 GIM_Reject, 11106 // Label 814: @24614 11107 GIM_Try, /*On fail goto*//*Label 832*/ 24637, // Rule ID 9774 // 11108 GIM_CheckFeatures, GIFBS_HasDQI_HasVLX, 11109 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s1, 11110 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, 11111 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK4RegClassID, 11112 // (sext:{ *:[v4i64] } VK4:{ *:[v4i1] }:$src) => (VPMOVM2QZ256rr:{ *:[v4i64] } VK4:{ *:[v4i1] }:$src) 11113 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVM2QZ256rr, 11114 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 11115 // GIR_Coverage, 9774, 11116 GIR_Done, 11117 // Label 832: @24637 11118 GIM_Reject, 11119 // Label 815: @24638 11120 GIM_Try, /*On fail goto*//*Label 833*/ 24661, // Rule ID 9769 // 11121 GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, 11122 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s1, 11123 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, 11124 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK8RegClassID, 11125 // (sext:{ *:[v8i16] } VK8:{ *:[v8i1] }:$src) => (VPMOVM2WZ128rr:{ *:[v8i16] } VK8:{ *:[v8i1] }:$src) 11126 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVM2WZ128rr, 11127 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 11128 // GIR_Coverage, 9769, 11129 GIR_Done, 11130 // Label 833: @24661 11131 GIM_Reject, 11132 // Label 816: @24662 11133 GIM_Try, /*On fail goto*//*Label 834*/ 24685, // Rule ID 9771 // 11134 GIM_CheckFeatures, GIFBS_HasDQI_HasVLX, 11135 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s1, 11136 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, 11137 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK8RegClassID, 11138 // (sext:{ *:[v8i32] } VK8:{ *:[v8i1] }:$src) => (VPMOVM2DZ256rr:{ *:[v8i32] } VK8:{ *:[v8i1] }:$src) 11139 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVM2DZ256rr, 11140 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 11141 // GIR_Coverage, 9771, 11142 GIR_Done, 11143 // Label 834: @24685 11144 GIM_Reject, 11145 // Label 817: @24686 11146 GIM_Try, /*On fail goto*//*Label 835*/ 24709, // Rule ID 9773 // 11147 GIM_CheckFeatures, GIFBS_HasDQI, 11148 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s1, 11149 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, 11150 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK8RegClassID, 11151 // (sext:{ *:[v8i64] } VK8:{ *:[v8i1] }:$src) => (VPMOVM2QZrr:{ *:[v8i64] } VK8:{ *:[v8i1] }:$src) 11152 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVM2QZrr, 11153 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 11154 // GIR_Coverage, 9773, 11155 GIR_Done, 11156 // Label 835: @24709 11157 GIM_Reject, 11158 // Label 818: @24710 11159 GIM_Try, /*On fail goto*//*Label 836*/ 24772, 11160 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s1, 11161 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, 11162 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK16RegClassID, 11163 GIM_Try, /*On fail goto*//*Label 837*/ 24735, // Rule ID 9766 // 11164 GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, 11165 // (sext:{ *:[v16i8] } VK16:{ *:[v16i1] }:$src) => (VPMOVM2BZ128rr:{ *:[v16i8] } VK16:{ *:[v16i1] }:$src) 11166 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVM2BZ128rr, 11167 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 11168 // GIR_Coverage, 9766, 11169 GIR_Done, 11170 // Label 837: @24735 11171 GIM_Try, /*On fail goto*//*Label 838*/ 24771, // Rule ID 15227 // 11172 GIM_CheckFeatures, GIFBS_HasDQI_NoBWI, 11173 // (sext:{ *:[v16i8] } VK16:{ *:[v16i1] }:$src) => (VPMOVDBZrr:{ *:[v16i8] } (VPMOVM2DZrr:{ *:[v16i32] } VK16:{ *:[v16i1] }:$src)) 11174 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s32, 11175 GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::VPMOVM2DZrr, 11176 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, 11177 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src 11178 GIR_ConstrainSelectedInstOperands, /*InsnID*/1, 11179 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMOVDBZrr, 11180 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 11181 GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, 11182 GIR_EraseFromParent, /*InsnID*/0, 11183 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 11184 // GIR_Coverage, 15227, 11185 GIR_Done, 11186 // Label 838: @24771 11187 GIM_Reject, 11188 // Label 836: @24772 11189 GIM_Reject, 11190 // Label 819: @24773 11191 GIM_Try, /*On fail goto*//*Label 839*/ 24835, 11192 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s1, 11193 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, 11194 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK16RegClassID, 11195 GIM_Try, /*On fail goto*//*Label 840*/ 24798, // Rule ID 9768 // 11196 GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, 11197 // (sext:{ *:[v16i16] } VK16:{ *:[v16i1] }:$src) => (VPMOVM2WZ256rr:{ *:[v16i16] } VK16:{ *:[v16i1] }:$src) 11198 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVM2WZ256rr, 11199 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 11200 // GIR_Coverage, 9768, 11201 GIR_Done, 11202 // Label 840: @24798 11203 GIM_Try, /*On fail goto*//*Label 841*/ 24834, // Rule ID 15228 // 11204 GIM_CheckFeatures, GIFBS_HasDQI_NoBWI, 11205 // (sext:{ *:[v16i16] } VK16:{ *:[v16i1] }:$src) => (VPMOVDWZrr:{ *:[v16i16] } (VPMOVM2DZrr:{ *:[v16i32] } VK16:{ *:[v16i1] }:$src)) 11206 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s32, 11207 GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::VPMOVM2DZrr, 11208 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, 11209 GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src 11210 GIR_ConstrainSelectedInstOperands, /*InsnID*/1, 11211 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMOVDWZrr, 11212 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 11213 GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, 11214 GIR_EraseFromParent, /*InsnID*/0, 11215 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 11216 // GIR_Coverage, 15228, 11217 GIR_Done, 11218 // Label 841: @24834 11219 GIM_Reject, 11220 // Label 839: @24835 11221 GIM_Reject, 11222 // Label 820: @24836 11223 GIM_Try, /*On fail goto*//*Label 842*/ 24859, // Rule ID 9770 // 11224 GIM_CheckFeatures, GIFBS_HasDQI, 11225 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s1, 11226 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, 11227 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK16RegClassID, 11228 // (sext:{ *:[v16i32] } VK16:{ *:[v16i1] }:$src) => (VPMOVM2DZrr:{ *:[v16i32] } VK16:{ *:[v16i1] }:$src) 11229 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVM2DZrr, 11230 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 11231 // GIR_Coverage, 9770, 11232 GIR_Done, 11233 // Label 842: @24859 11234 GIM_Reject, 11235 // Label 821: @24860 11236 GIM_Try, /*On fail goto*//*Label 843*/ 24883, // Rule ID 9765 // 11237 GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, 11238 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s1, 11239 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, 11240 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK32RegClassID, 11241 // (sext:{ *:[v32i8] } VK32:{ *:[v32i1] }:$src) => (VPMOVM2BZ256rr:{ *:[v32i8] } VK32:{ *:[v32i1] }:$src) 11242 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVM2BZ256rr, 11243 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 11244 // GIR_Coverage, 9765, 11245 GIR_Done, 11246 // Label 843: @24883 11247 GIM_Reject, 11248 // Label 822: @24884 11249 GIM_Try, /*On fail goto*//*Label 844*/ 24907, // Rule ID 9767 // 11250 GIM_CheckFeatures, GIFBS_HasBWI, 11251 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s1, 11252 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, 11253 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK32RegClassID, 11254 // (sext:{ *:[v32i16] } VK32:{ *:[v32i1] }:$src) => (VPMOVM2WZrr:{ *:[v32i16] } VK32:{ *:[v32i1] }:$src) 11255 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVM2WZrr, 11256 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 11257 // GIR_Coverage, 9767, 11258 GIR_Done, 11259 // Label 844: @24907 11260 GIM_Reject, 11261 // Label 823: @24908 11262 GIM_Try, /*On fail goto*//*Label 845*/ 24931, // Rule ID 9764 // 11263 GIM_CheckFeatures, GIFBS_HasBWI, 11264 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v64s1, 11265 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, 11266 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK64RegClassID, 11267 // (sext:{ *:[v64i8] } VK64:{ *:[v64i1] }:$src) => (VPMOVM2BZrr:{ *:[v64i8] } VK64:{ *:[v64i1] }:$src) 11268 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVM2BZrr, 11269 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 11270 // GIR_Coverage, 9764, 11271 GIR_Done, 11272 // Label 845: @24931 11273 GIM_Reject, 11274 // Label 824: @24932 11275 GIM_Reject, 11276 // Label 14: @24933 11277 GIM_Try, /*On fail goto*//*Label 846*/ 25067, 11278 GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32, 11279 GIM_SwitchType, /*MI*/0, /*Op*/1, /*[*/1, 3, /*)*//*default:*//*Label 849*/ 25045, 11280 /*GILLT_s8*//*Label 847*/ 24947, 11281 /*GILLT_s16*//*Label 848*/ 25005, 11282 // Label 847: @24947 11283 GIM_Try, /*On fail goto*//*Label 850*/ 25004, 11284 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, 11285 GIM_Try, /*On fail goto*//*Label 851*/ 24990, // Rule ID 13740 // 11286 GIM_CheckFeatures, GIFBS_HasDQI, 11287 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] 11288 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_BITCAST, 11289 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s1, 11290 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::VK8RegClassID, 11291 GIM_CheckIsSafeToFold, /*InsnID*/1, 11292 // (zext:{ *:[i32] } (bitconvert:{ *:[i8] } VK8:{ *:[v8i1] }:$src)) => (KMOVBrk:{ *:[i32] } VK8:{ *:[v8i1] }:$src) 11293 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::KMOVBrk, 11294 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 11295 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src 11296 GIR_EraseFromParent, /*InsnID*/0, 11297 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 11298 // GIR_Coverage, 13740, 11299 GIR_Done, 11300 // Label 851: @24990 11301 GIM_Try, /*On fail goto*//*Label 852*/ 25003, // Rule ID 540 // 11302 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR8RegClassID, 11303 // (zext:{ *:[i32] } GR8:{ *:[i8] }:$src) => (MOVZX32rr8:{ *:[i32] } GR8:{ *:[i8] }:$src) 11304 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::MOVZX32rr8, 11305 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 11306 // GIR_Coverage, 540, 11307 GIR_Done, 11308 // Label 852: @25003 11309 GIM_Reject, 11310 // Label 850: @25004 11311 GIM_Reject, 11312 // Label 848: @25005 11313 GIM_Try, /*On fail goto*//*Label 853*/ 25044, // Rule ID 13738 // 11314 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, 11315 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] 11316 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_BITCAST, 11317 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16s1, 11318 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::VK16RegClassID, 11319 GIM_CheckIsSafeToFold, /*InsnID*/1, 11320 // (zext:{ *:[i32] } (bitconvert:{ *:[i16] } VK16:{ *:[v16i1] }:$src)) => (KMOVWrk:{ *:[i32] } VK16:{ *:[v16i1] }:$src) 11321 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::KMOVWrk, 11322 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 11323 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src 11324 GIR_EraseFromParent, /*InsnID*/0, 11325 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 11326 // GIR_Coverage, 13738, 11327 GIR_Done, 11328 // Label 853: @25044 11329 GIM_Reject, 11330 // Label 849: @25045 11331 GIM_Try, /*On fail goto*//*Label 854*/ 25066, // Rule ID 542 // 11332 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16, 11333 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, 11334 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID, 11335 // (zext:{ *:[i32] } GR16:{ *:[i16] }:$src) => (MOVZX32rr16:{ *:[i32] } GR16:{ *:[i16] }:$src) 11336 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::MOVZX32rr16, 11337 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 11338 // GIR_Coverage, 542, 11339 GIR_Done, 11340 // Label 854: @25066 11341 GIM_Reject, 11342 // Label 846: @25067 11343 GIM_Reject, 11344 // Label 15: @25068 11345 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/1, 23, /*)*//*default:*//*Label 868*/ 25792, 11346 /*GILLT_s8*//*Label 855*/ 25096, 11347 /*GILLT_s16*//*Label 856*/ 25172, 11348 /*GILLT_s32*//*Label 857*/ 25248, 11349 /*GILLT_s64*//*Label 858*/ 25324, 0, 0, 0, 11350 /*GILLT_v2s64*//*Label 859*/ 25400, 0, 11351 /*GILLT_v4s32*//*Label 860*/ 25458, 11352 /*GILLT_v4s64*//*Label 861*/ 25516, 0, 11353 /*GILLT_v8s16*//*Label 862*/ 25574, 11354 /*GILLT_v8s32*//*Label 863*/ 25606, 11355 /*GILLT_v8s64*//*Label 864*/ 25664, 0, 0, 11356 /*GILLT_v16s16*//*Label 865*/ 25696, 11357 /*GILLT_v16s32*//*Label 866*/ 25728, 0, 0, 11358 /*GILLT_v32s16*//*Label 867*/ 25760, 11359 // Label 855: @25096 11360 GIM_Try, /*On fail goto*//*Label 869*/ 25171, 11361 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s8, 11362 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8, 11363 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR8RegClassID, 11364 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR8RegClassID, 11365 GIM_Try, /*On fail goto*//*Label 870*/ 25140, // Rule ID 15997 // 11366 GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 1, 11367 // (shl:{ *:[i8] } GR8:{ *:[i8] }:$src1, 1:{ *:[i8] }) => (ADD8rr:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, GR8:{ *:[i8] }:$src1) 11368 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ADD8rr, 11369 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 11370 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 11371 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 11372 GIR_EraseFromParent, /*InsnID*/0, 11373 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 11374 // GIR_Coverage, 15997, 11375 GIR_Done, 11376 // Label 870: @25140 11377 GIM_Try, /*On fail goto*//*Label 871*/ 25170, // Rule ID 599 // 11378 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] 11379 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, 11380 // MIs[1] Operand 1 11381 // No operand predicates 11382 GIM_CheckIsSafeToFold, /*InsnID*/1, 11383 // (shl:{ *:[i8] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) => (SHL8ri:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) 11384 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHL8ri, 11385 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 11386 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 11387 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 11388 GIR_EraseFromParent, /*InsnID*/0, 11389 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 11390 // GIR_Coverage, 599, 11391 GIR_Done, 11392 // Label 871: @25170 11393 GIM_Reject, 11394 // Label 869: @25171 11395 GIM_Reject, 11396 // Label 856: @25172 11397 GIM_Try, /*On fail goto*//*Label 872*/ 25247, 11398 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16, 11399 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8, 11400 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR16RegClassID, 11401 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID, 11402 GIM_Try, /*On fail goto*//*Label 873*/ 25216, // Rule ID 15998 // 11403 GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 1, 11404 // (shl:{ *:[i16] } GR16:{ *:[i16] }:$src1, 1:{ *:[i8] }) => (ADD16rr:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src1) 11405 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ADD16rr, 11406 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 11407 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 11408 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 11409 GIR_EraseFromParent, /*InsnID*/0, 11410 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 11411 // GIR_Coverage, 15998, 11412 GIR_Done, 11413 // Label 873: @25216 11414 GIM_Try, /*On fail goto*//*Label 874*/ 25246, // Rule ID 600 // 11415 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] 11416 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, 11417 // MIs[1] Operand 1 11418 // No operand predicates 11419 GIM_CheckIsSafeToFold, /*InsnID*/1, 11420 // (shl:{ *:[i16] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i8] }):$src2) => (SHL16ri:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i8] }):$src2) 11421 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHL16ri, 11422 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 11423 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 11424 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 11425 GIR_EraseFromParent, /*InsnID*/0, 11426 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 11427 // GIR_Coverage, 600, 11428 GIR_Done, 11429 // Label 874: @25246 11430 GIM_Reject, 11431 // Label 872: @25247 11432 GIM_Reject, 11433 // Label 857: @25248 11434 GIM_Try, /*On fail goto*//*Label 875*/ 25323, 11435 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, 11436 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8, 11437 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, 11438 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, 11439 GIM_Try, /*On fail goto*//*Label 876*/ 25292, // Rule ID 15999 // 11440 GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 1, 11441 // (shl:{ *:[i32] } GR32:{ *:[i32] }:$src1, 1:{ *:[i8] }) => (ADD32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src1) 11442 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ADD32rr, 11443 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 11444 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 11445 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 11446 GIR_EraseFromParent, /*InsnID*/0, 11447 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 11448 // GIR_Coverage, 15999, 11449 GIR_Done, 11450 // Label 876: @25292 11451 GIM_Try, /*On fail goto*//*Label 877*/ 25322, // Rule ID 601 // 11452 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] 11453 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, 11454 // MIs[1] Operand 1 11455 // No operand predicates 11456 GIM_CheckIsSafeToFold, /*InsnID*/1, 11457 // (shl:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i8] }):$src2) => (SHL32ri:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i8] }):$src2) 11458 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHL32ri, 11459 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 11460 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 11461 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 11462 GIR_EraseFromParent, /*InsnID*/0, 11463 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 11464 // GIR_Coverage, 601, 11465 GIR_Done, 11466 // Label 877: @25322 11467 GIM_Reject, 11468 // Label 875: @25323 11469 GIM_Reject, 11470 // Label 858: @25324 11471 GIM_Try, /*On fail goto*//*Label 878*/ 25399, 11472 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, 11473 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8, 11474 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, 11475 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, 11476 GIM_Try, /*On fail goto*//*Label 879*/ 25368, // Rule ID 16000 // 11477 GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 1, 11478 // (shl:{ *:[i64] } GR64:{ *:[i64] }:$src1, 1:{ *:[i8] }) => (ADD64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src1) 11479 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ADD64rr, 11480 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 11481 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 11482 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 11483 GIR_EraseFromParent, /*InsnID*/0, 11484 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 11485 // GIR_Coverage, 16000, 11486 GIR_Done, 11487 // Label 879: @25368 11488 GIM_Try, /*On fail goto*//*Label 880*/ 25398, // Rule ID 602 // 11489 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] 11490 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, 11491 // MIs[1] Operand 1 11492 // No operand predicates 11493 GIM_CheckIsSafeToFold, /*InsnID*/1, 11494 // (shl:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i8] }):$src2) => (SHL64ri:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i8] }):$src2) 11495 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHL64ri, 11496 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 11497 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 11498 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 11499 GIR_EraseFromParent, /*InsnID*/0, 11500 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 11501 // GIR_Coverage, 602, 11502 GIR_Done, 11503 // Label 880: @25398 11504 GIM_Reject, 11505 // Label 878: @25399 11506 GIM_Reject, 11507 // Label 859: @25400 11508 GIM_Try, /*On fail goto*//*Label 881*/ 25457, 11509 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64, 11510 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, 11511 GIM_Try, /*On fail goto*//*Label 882*/ 25433, // Rule ID 2727 // 11512 GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX, 11513 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 11514 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, 11515 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 11516 // (shl:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (VPSLLVQrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) 11517 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSLLVQrr, 11518 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 11519 // GIR_Coverage, 2727, 11520 GIR_Done, 11521 // Label 882: @25433 11522 GIM_Try, /*On fail goto*//*Label 883*/ 25456, // Rule ID 6401 // 11523 GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, 11524 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, 11525 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, 11526 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, 11527 // (shl:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (VPSLLVQZ128rr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) 11528 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSLLVQZ128rr, 11529 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 11530 // GIR_Coverage, 6401, 11531 GIR_Done, 11532 // Label 883: @25456 11533 GIM_Reject, 11534 // Label 881: @25457 11535 GIM_Reject, 11536 // Label 860: @25458 11537 GIM_Try, /*On fail goto*//*Label 884*/ 25515, 11538 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, 11539 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, 11540 GIM_Try, /*On fail goto*//*Label 885*/ 25491, // Rule ID 2723 // 11541 GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX, 11542 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 11543 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, 11544 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 11545 // (shl:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (VPSLLVDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) 11546 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSLLVDrr, 11547 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 11548 // GIR_Coverage, 2723, 11549 GIR_Done, 11550 // Label 885: @25491 11551 GIM_Try, /*On fail goto*//*Label 886*/ 25514, // Rule ID 6374 // 11552 GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, 11553 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, 11554 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, 11555 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, 11556 // (shl:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2) => (VPSLLVDZ128rr:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2) 11557 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSLLVDZ128rr, 11558 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 11559 // GIR_Coverage, 6374, 11560 GIR_Done, 11561 // Label 886: @25514 11562 GIM_Reject, 11563 // Label 884: @25515 11564 GIM_Reject, 11565 // Label 861: @25516 11566 GIM_Try, /*On fail goto*//*Label 887*/ 25573, 11567 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64, 11568 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64, 11569 GIM_Try, /*On fail goto*//*Label 888*/ 25549, // Rule ID 2729 // 11570 GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX, 11571 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, 11572 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, 11573 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, 11574 // (shl:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) => (VPSLLVQYrr:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) 11575 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSLLVQYrr, 11576 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 11577 // GIR_Coverage, 2729, 11578 GIR_Done, 11579 // Label 888: @25549 11580 GIM_Try, /*On fail goto*//*Label 889*/ 25572, // Rule ID 6392 // 11581 GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, 11582 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, 11583 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, 11584 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, 11585 // (shl:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) => (VPSLLVQZ256rr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) 11586 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSLLVQZ256rr, 11587 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 11588 // GIR_Coverage, 6392, 11589 GIR_Done, 11590 // Label 889: @25572 11591 GIM_Reject, 11592 // Label 887: @25573 11593 GIM_Reject, 11594 // Label 862: @25574 11595 GIM_Try, /*On fail goto*//*Label 890*/ 25605, // Rule ID 6422 // 11596 GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, 11597 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16, 11598 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16, 11599 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, 11600 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, 11601 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, 11602 // (shl:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) => (VPSLLVWZ128rr:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) 11603 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSLLVWZ128rr, 11604 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 11605 // GIR_Coverage, 6422, 11606 GIR_Done, 11607 // Label 890: @25605 11608 GIM_Reject, 11609 // Label 863: @25606 11610 GIM_Try, /*On fail goto*//*Label 891*/ 25663, 11611 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32, 11612 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s32, 11613 GIM_Try, /*On fail goto*//*Label 892*/ 25639, // Rule ID 2725 // 11614 GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX, 11615 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, 11616 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, 11617 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, 11618 // (shl:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) => (VPSLLVDYrr:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) 11619 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSLLVDYrr, 11620 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 11621 // GIR_Coverage, 2725, 11622 GIR_Done, 11623 // Label 892: @25639 11624 GIM_Try, /*On fail goto*//*Label 893*/ 25662, // Rule ID 6365 // 11625 GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, 11626 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, 11627 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, 11628 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, 11629 // (shl:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2) => (VPSLLVDZ256rr:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2) 11630 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSLLVDZ256rr, 11631 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 11632 // GIR_Coverage, 6365, 11633 GIR_Done, 11634 // Label 893: @25662 11635 GIM_Reject, 11636 // Label 891: @25663 11637 GIM_Reject, 11638 // Label 864: @25664 11639 GIM_Try, /*On fail goto*//*Label 894*/ 25695, // Rule ID 6383 // 11640 GIM_CheckFeatures, GIFBS_HasAVX512, 11641 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64, 11642 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s64, 11643 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, 11644 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, 11645 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, 11646 // (shl:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) => (VPSLLVQZrr:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) 11647 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSLLVQZrr, 11648 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 11649 // GIR_Coverage, 6383, 11650 GIR_Done, 11651 // Label 894: @25695 11652 GIM_Reject, 11653 // Label 865: @25696 11654 GIM_Try, /*On fail goto*//*Label 895*/ 25727, // Rule ID 6416 // 11655 GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, 11656 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s16, 11657 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s16, 11658 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, 11659 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, 11660 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, 11661 // (shl:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) => (VPSLLVWZ256rr:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) 11662 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSLLVWZ256rr, 11663 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 11664 // GIR_Coverage, 6416, 11665 GIR_Done, 11666 // Label 895: @25727 11667 GIM_Reject, 11668 // Label 866: @25728 11669 GIM_Try, /*On fail goto*//*Label 896*/ 25759, // Rule ID 6356 // 11670 GIM_CheckFeatures, GIFBS_HasAVX512, 11671 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32, 11672 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s32, 11673 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, 11674 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, 11675 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, 11676 // (shl:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2) => (VPSLLVDZrr:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2) 11677 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSLLVDZrr, 11678 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 11679 // GIR_Coverage, 6356, 11680 GIR_Done, 11681 // Label 896: @25759 11682 GIM_Reject, 11683 // Label 867: @25760 11684 GIM_Try, /*On fail goto*//*Label 897*/ 25791, // Rule ID 6410 // 11685 GIM_CheckFeatures, GIFBS_HasBWI, 11686 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s16, 11687 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s16, 11688 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, 11689 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, 11690 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, 11691 // (shl:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) => (VPSLLVWZrr:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) 11692 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSLLVWZrr, 11693 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 11694 // GIR_Coverage, 6410, 11695 GIR_Done, 11696 // Label 897: @25791 11697 GIM_Reject, 11698 // Label 868: @25792 11699 GIM_Reject, 11700 // Label 16: @25793 11701 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/1, 23, /*)*//*default:*//*Label 911*/ 26623, 11702 /*GILLT_s8*//*Label 898*/ 25821, 11703 /*GILLT_s16*//*Label 899*/ 25893, 11704 /*GILLT_s32*//*Label 900*/ 25965, 11705 /*GILLT_s64*//*Label 901*/ 26159, 0, 0, 0, 11706 /*GILLT_v2s64*//*Label 902*/ 26231, 0, 11707 /*GILLT_v4s32*//*Label 903*/ 26289, 11708 /*GILLT_v4s64*//*Label 904*/ 26347, 0, 11709 /*GILLT_v8s16*//*Label 905*/ 26405, 11710 /*GILLT_v8s32*//*Label 906*/ 26437, 11711 /*GILLT_v8s64*//*Label 907*/ 26495, 0, 0, 11712 /*GILLT_v16s16*//*Label 908*/ 26527, 11713 /*GILLT_v16s32*//*Label 909*/ 26559, 0, 0, 11714 /*GILLT_v32s16*//*Label 910*/ 26591, 11715 // Label 898: @25821 11716 GIM_Try, /*On fail goto*//*Label 912*/ 25892, 11717 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s8, 11718 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8, 11719 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR8RegClassID, 11720 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR8RegClassID, 11721 GIM_Try, /*On fail goto*//*Label 913*/ 25861, // Rule ID 623 // 11722 GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 1, 11723 // (srl:{ *:[i8] } GR8:{ *:[i8] }:$src1, 1:{ *:[i8] }) => (SHR8r1:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1) 11724 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHR8r1, 11725 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 11726 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 11727 GIR_EraseFromParent, /*InsnID*/0, 11728 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 11729 // GIR_Coverage, 623, 11730 GIR_Done, 11731 // Label 913: @25861 11732 GIM_Try, /*On fail goto*//*Label 914*/ 25891, // Rule ID 619 // 11733 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] 11734 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, 11735 // MIs[1] Operand 1 11736 // No operand predicates 11737 GIM_CheckIsSafeToFold, /*InsnID*/1, 11738 // (srl:{ *:[i8] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) => (SHR8ri:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) 11739 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHR8ri, 11740 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 11741 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 11742 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 11743 GIR_EraseFromParent, /*InsnID*/0, 11744 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 11745 // GIR_Coverage, 619, 11746 GIR_Done, 11747 // Label 914: @25891 11748 GIM_Reject, 11749 // Label 912: @25892 11750 GIM_Reject, 11751 // Label 899: @25893 11752 GIM_Try, /*On fail goto*//*Label 915*/ 25964, 11753 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16, 11754 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8, 11755 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR16RegClassID, 11756 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID, 11757 GIM_Try, /*On fail goto*//*Label 916*/ 25933, // Rule ID 624 // 11758 GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 1, 11759 // (srl:{ *:[i16] } GR16:{ *:[i16] }:$src1, 1:{ *:[i8] }) => (SHR16r1:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1) 11760 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHR16r1, 11761 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 11762 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 11763 GIR_EraseFromParent, /*InsnID*/0, 11764 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 11765 // GIR_Coverage, 624, 11766 GIR_Done, 11767 // Label 916: @25933 11768 GIM_Try, /*On fail goto*//*Label 917*/ 25963, // Rule ID 620 // 11769 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] 11770 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, 11771 // MIs[1] Operand 1 11772 // No operand predicates 11773 GIM_CheckIsSafeToFold, /*InsnID*/1, 11774 // (srl:{ *:[i16] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i8] }):$src2) => (SHR16ri:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i8] }):$src2) 11775 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHR16ri, 11776 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 11777 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 11778 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 11779 GIR_EraseFromParent, /*InsnID*/0, 11780 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 11781 // GIR_Coverage, 620, 11782 GIR_Done, 11783 // Label 917: @25963 11784 GIM_Reject, 11785 // Label 915: @25964 11786 GIM_Reject, 11787 // Label 900: @25965 11788 GIM_Try, /*On fail goto*//*Label 918*/ 26158, 11789 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, 11790 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8, 11791 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, 11792 GIM_Try, /*On fail goto*//*Label 919*/ 26097, // Rule ID 12257 // 11793 GIM_CheckFeatures, GIFBS_HasBMI2, 11794 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] 11795 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SHL, 11796 GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, 11797 GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s8, 11798 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR32RegClassID, 11799 GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2] 11800 GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_TRUNC, 11801 GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s32, 11802 GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/1, // MIs[3] 11803 GIM_CheckOpcode, /*MI*/3, TargetOpcode::G_SUB, 11804 GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_s32, 11805 GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_s32, 11806 GIM_CheckConstantInt, /*MI*/3, /*Op*/1, 32, 11807 GIM_CheckRegBankForClass, /*MI*/3, /*Op*/2, /*RC*/X86::GR32RegClassID, 11808 GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/2, // MIs[4] 11809 GIM_CheckOpcode, /*MI*/4, TargetOpcode::G_TRUNC, 11810 GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_s32, 11811 GIM_RecordInsn, /*DefineMI*/5, /*MI*/4, /*OpIdx*/1, // MIs[5] 11812 GIM_CheckOpcode, /*MI*/5, TargetOpcode::G_SUB, 11813 GIM_CheckType, /*MI*/5, /*Op*/1, /*Type*/GILLT_s32, 11814 GIM_CheckConstantInt, /*MI*/5, /*Op*/1, 32, 11815 // MIs[5] lz 11816 GIM_CheckIsSameOperand, /*MI*/5, /*OpIdx*/2, /*OtherMI*/3, /*OtherOpIdx*/2, 11817 GIM_CheckIsSafeToFold, /*InsnID*/1, 11818 GIM_CheckIsSafeToFold, /*InsnID*/2, 11819 GIM_CheckIsSafeToFold, /*InsnID*/3, 11820 GIM_CheckIsSafeToFold, /*InsnID*/4, 11821 GIM_CheckIsSafeToFold, /*InsnID*/5, 11822 // (srl:{ *:[i32] } (shl:{ *:[i32] } GR32:{ *:[i32] }:$src, (trunc:{ *:[i8] } (sub:{ *:[i32] } 32:{ *:[i32] }, GR32:{ *:[i32] }:$lz))), (trunc:{ *:[i8] } (sub:{ *:[i32] } 32:{ *:[i32] }, GR32:{ *:[i32] }:$lz))) => (BZHI32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src, GR32:{ *:[i32] }:$lz) 11823 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BZHI32rr, 11824 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 11825 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src 11826 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/2, // lz 11827 GIR_EraseFromParent, /*InsnID*/0, 11828 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 11829 // GIR_Coverage, 12257, 11830 GIR_Done, 11831 // Label 919: @26097 11832 GIM_Try, /*On fail goto*//*Label 920*/ 26123, // Rule ID 625 // 11833 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, 11834 GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 1, 11835 // (srl:{ *:[i32] } GR32:{ *:[i32] }:$src1, 1:{ *:[i8] }) => (SHR32r1:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1) 11836 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHR32r1, 11837 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 11838 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 11839 GIR_EraseFromParent, /*InsnID*/0, 11840 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 11841 // GIR_Coverage, 625, 11842 GIR_Done, 11843 // Label 920: @26123 11844 GIM_Try, /*On fail goto*//*Label 921*/ 26157, // Rule ID 621 // 11845 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, 11846 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] 11847 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, 11848 // MIs[1] Operand 1 11849 // No operand predicates 11850 GIM_CheckIsSafeToFold, /*InsnID*/1, 11851 // (srl:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i8] }):$src2) => (SHR32ri:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i8] }):$src2) 11852 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHR32ri, 11853 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 11854 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 11855 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 11856 GIR_EraseFromParent, /*InsnID*/0, 11857 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 11858 // GIR_Coverage, 621, 11859 GIR_Done, 11860 // Label 921: @26157 11861 GIM_Reject, 11862 // Label 918: @26158 11863 GIM_Reject, 11864 // Label 901: @26159 11865 GIM_Try, /*On fail goto*//*Label 922*/ 26230, 11866 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, 11867 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8, 11868 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, 11869 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, 11870 GIM_Try, /*On fail goto*//*Label 923*/ 26199, // Rule ID 626 // 11871 GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 1, 11872 // (srl:{ *:[i64] } GR64:{ *:[i64] }:$src1, 1:{ *:[i8] }) => (SHR64r1:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1) 11873 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHR64r1, 11874 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 11875 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 11876 GIR_EraseFromParent, /*InsnID*/0, 11877 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 11878 // GIR_Coverage, 626, 11879 GIR_Done, 11880 // Label 923: @26199 11881 GIM_Try, /*On fail goto*//*Label 924*/ 26229, // Rule ID 622 // 11882 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] 11883 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, 11884 // MIs[1] Operand 1 11885 // No operand predicates 11886 GIM_CheckIsSafeToFold, /*InsnID*/1, 11887 // (srl:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i8] }):$src2) => (SHR64ri:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i8] }):$src2) 11888 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHR64ri, 11889 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 11890 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 11891 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 11892 GIR_EraseFromParent, /*InsnID*/0, 11893 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 11894 // GIR_Coverage, 622, 11895 GIR_Done, 11896 // Label 924: @26229 11897 GIM_Reject, 11898 // Label 922: @26230 11899 GIM_Reject, 11900 // Label 902: @26231 11901 GIM_Try, /*On fail goto*//*Label 925*/ 26288, 11902 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64, 11903 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, 11904 GIM_Try, /*On fail goto*//*Label 926*/ 26264, // Rule ID 2735 // 11905 GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX, 11906 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 11907 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, 11908 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 11909 // (srl:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (VPSRLVQrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) 11910 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSRLVQrr, 11911 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 11912 // GIR_Coverage, 2735, 11913 GIR_Done, 11914 // Label 926: @26264 11915 GIM_Try, /*On fail goto*//*Label 927*/ 26287, // Rule ID 6545 // 11916 GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, 11917 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, 11918 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, 11919 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, 11920 // (srl:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (VPSRLVQZ128rr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) 11921 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSRLVQZ128rr, 11922 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 11923 // GIR_Coverage, 6545, 11924 GIR_Done, 11925 // Label 927: @26287 11926 GIM_Reject, 11927 // Label 925: @26288 11928 GIM_Reject, 11929 // Label 903: @26289 11930 GIM_Try, /*On fail goto*//*Label 928*/ 26346, 11931 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, 11932 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, 11933 GIM_Try, /*On fail goto*//*Label 929*/ 26322, // Rule ID 2731 // 11934 GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX, 11935 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 11936 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, 11937 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 11938 // (srl:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (VPSRLVDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) 11939 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSRLVDrr, 11940 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 11941 // GIR_Coverage, 2731, 11942 GIR_Done, 11943 // Label 929: @26322 11944 GIM_Try, /*On fail goto*//*Label 930*/ 26345, // Rule ID 6518 // 11945 GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, 11946 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, 11947 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, 11948 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, 11949 // (srl:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2) => (VPSRLVDZ128rr:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2) 11950 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSRLVDZ128rr, 11951 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 11952 // GIR_Coverage, 6518, 11953 GIR_Done, 11954 // Label 930: @26345 11955 GIM_Reject, 11956 // Label 928: @26346 11957 GIM_Reject, 11958 // Label 904: @26347 11959 GIM_Try, /*On fail goto*//*Label 931*/ 26404, 11960 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64, 11961 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64, 11962 GIM_Try, /*On fail goto*//*Label 932*/ 26380, // Rule ID 2737 // 11963 GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX, 11964 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, 11965 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, 11966 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, 11967 // (srl:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) => (VPSRLVQYrr:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) 11968 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSRLVQYrr, 11969 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 11970 // GIR_Coverage, 2737, 11971 GIR_Done, 11972 // Label 932: @26380 11973 GIM_Try, /*On fail goto*//*Label 933*/ 26403, // Rule ID 6536 // 11974 GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, 11975 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, 11976 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, 11977 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, 11978 // (srl:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) => (VPSRLVQZ256rr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) 11979 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSRLVQZ256rr, 11980 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 11981 // GIR_Coverage, 6536, 11982 GIR_Done, 11983 // Label 933: @26403 11984 GIM_Reject, 11985 // Label 931: @26404 11986 GIM_Reject, 11987 // Label 905: @26405 11988 GIM_Try, /*On fail goto*//*Label 934*/ 26436, // Rule ID 6566 // 11989 GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, 11990 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16, 11991 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16, 11992 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, 11993 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, 11994 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, 11995 // (srl:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) => (VPSRLVWZ128rr:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) 11996 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSRLVWZ128rr, 11997 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 11998 // GIR_Coverage, 6566, 11999 GIR_Done, 12000 // Label 934: @26436 12001 GIM_Reject, 12002 // Label 906: @26437 12003 GIM_Try, /*On fail goto*//*Label 935*/ 26494, 12004 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32, 12005 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s32, 12006 GIM_Try, /*On fail goto*//*Label 936*/ 26470, // Rule ID 2733 // 12007 GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX, 12008 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, 12009 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, 12010 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, 12011 // (srl:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) => (VPSRLVDYrr:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) 12012 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSRLVDYrr, 12013 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 12014 // GIR_Coverage, 2733, 12015 GIR_Done, 12016 // Label 936: @26470 12017 GIM_Try, /*On fail goto*//*Label 937*/ 26493, // Rule ID 6509 // 12018 GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, 12019 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, 12020 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, 12021 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, 12022 // (srl:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2) => (VPSRLVDZ256rr:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2) 12023 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSRLVDZ256rr, 12024 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 12025 // GIR_Coverage, 6509, 12026 GIR_Done, 12027 // Label 937: @26493 12028 GIM_Reject, 12029 // Label 935: @26494 12030 GIM_Reject, 12031 // Label 907: @26495 12032 GIM_Try, /*On fail goto*//*Label 938*/ 26526, // Rule ID 6527 // 12033 GIM_CheckFeatures, GIFBS_HasAVX512, 12034 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64, 12035 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s64, 12036 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, 12037 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, 12038 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, 12039 // (srl:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) => (VPSRLVQZrr:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) 12040 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSRLVQZrr, 12041 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 12042 // GIR_Coverage, 6527, 12043 GIR_Done, 12044 // Label 938: @26526 12045 GIM_Reject, 12046 // Label 908: @26527 12047 GIM_Try, /*On fail goto*//*Label 939*/ 26558, // Rule ID 6560 // 12048 GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, 12049 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s16, 12050 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s16, 12051 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, 12052 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, 12053 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, 12054 // (srl:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) => (VPSRLVWZ256rr:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) 12055 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSRLVWZ256rr, 12056 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 12057 // GIR_Coverage, 6560, 12058 GIR_Done, 12059 // Label 939: @26558 12060 GIM_Reject, 12061 // Label 909: @26559 12062 GIM_Try, /*On fail goto*//*Label 940*/ 26590, // Rule ID 6500 // 12063 GIM_CheckFeatures, GIFBS_HasAVX512, 12064 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32, 12065 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s32, 12066 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, 12067 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, 12068 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, 12069 // (srl:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2) => (VPSRLVDZrr:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2) 12070 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSRLVDZrr, 12071 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 12072 // GIR_Coverage, 6500, 12073 GIR_Done, 12074 // Label 940: @26590 12075 GIM_Reject, 12076 // Label 910: @26591 12077 GIM_Try, /*On fail goto*//*Label 941*/ 26622, // Rule ID 6554 // 12078 GIM_CheckFeatures, GIFBS_HasBWI, 12079 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s16, 12080 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s16, 12081 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, 12082 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, 12083 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, 12084 // (srl:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) => (VPSRLVWZrr:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) 12085 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSRLVWZrr, 12086 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 12087 // GIR_Coverage, 6554, 12088 GIR_Done, 12089 // Label 941: @26622 12090 GIM_Reject, 12091 // Label 911: @26623 12092 GIM_Reject, 12093 // Label 17: @26624 12094 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/1, 23, /*)*//*default:*//*Label 955*/ 27280, 12095 /*GILLT_s8*//*Label 942*/ 26652, 12096 /*GILLT_s16*//*Label 943*/ 26724, 12097 /*GILLT_s32*//*Label 944*/ 26796, 12098 /*GILLT_s64*//*Label 945*/ 26868, 0, 0, 0, 12099 /*GILLT_v2s64*//*Label 946*/ 26940, 0, 12100 /*GILLT_v4s32*//*Label 947*/ 26972, 12101 /*GILLT_v4s64*//*Label 948*/ 27030, 0, 12102 /*GILLT_v8s16*//*Label 949*/ 27062, 12103 /*GILLT_v8s32*//*Label 950*/ 27094, 12104 /*GILLT_v8s64*//*Label 951*/ 27152, 0, 0, 12105 /*GILLT_v16s16*//*Label 952*/ 27184, 12106 /*GILLT_v16s32*//*Label 953*/ 27216, 0, 0, 12107 /*GILLT_v32s16*//*Label 954*/ 27248, 12108 // Label 942: @26652 12109 GIM_Try, /*On fail goto*//*Label 956*/ 26723, 12110 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s8, 12111 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8, 12112 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR8RegClassID, 12113 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR8RegClassID, 12114 GIM_Try, /*On fail goto*//*Label 957*/ 26692, // Rule ID 647 // 12115 GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 1, 12116 // (sra:{ *:[i8] } GR8:{ *:[i8] }:$src1, 1:{ *:[i8] }) => (SAR8r1:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1) 12117 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SAR8r1, 12118 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 12119 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 12120 GIR_EraseFromParent, /*InsnID*/0, 12121 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 12122 // GIR_Coverage, 647, 12123 GIR_Done, 12124 // Label 957: @26692 12125 GIM_Try, /*On fail goto*//*Label 958*/ 26722, // Rule ID 643 // 12126 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] 12127 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, 12128 // MIs[1] Operand 1 12129 // No operand predicates 12130 GIM_CheckIsSafeToFold, /*InsnID*/1, 12131 // (sra:{ *:[i8] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) => (SAR8ri:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) 12132 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SAR8ri, 12133 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 12134 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 12135 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 12136 GIR_EraseFromParent, /*InsnID*/0, 12137 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 12138 // GIR_Coverage, 643, 12139 GIR_Done, 12140 // Label 958: @26722 12141 GIM_Reject, 12142 // Label 956: @26723 12143 GIM_Reject, 12144 // Label 943: @26724 12145 GIM_Try, /*On fail goto*//*Label 959*/ 26795, 12146 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16, 12147 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8, 12148 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR16RegClassID, 12149 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID, 12150 GIM_Try, /*On fail goto*//*Label 960*/ 26764, // Rule ID 648 // 12151 GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 1, 12152 // (sra:{ *:[i16] } GR16:{ *:[i16] }:$src1, 1:{ *:[i8] }) => (SAR16r1:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1) 12153 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SAR16r1, 12154 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 12155 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 12156 GIR_EraseFromParent, /*InsnID*/0, 12157 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 12158 // GIR_Coverage, 648, 12159 GIR_Done, 12160 // Label 960: @26764 12161 GIM_Try, /*On fail goto*//*Label 961*/ 26794, // Rule ID 644 // 12162 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] 12163 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, 12164 // MIs[1] Operand 1 12165 // No operand predicates 12166 GIM_CheckIsSafeToFold, /*InsnID*/1, 12167 // (sra:{ *:[i16] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i8] }):$src2) => (SAR16ri:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i8] }):$src2) 12168 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SAR16ri, 12169 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 12170 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 12171 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 12172 GIR_EraseFromParent, /*InsnID*/0, 12173 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 12174 // GIR_Coverage, 644, 12175 GIR_Done, 12176 // Label 961: @26794 12177 GIM_Reject, 12178 // Label 959: @26795 12179 GIM_Reject, 12180 // Label 944: @26796 12181 GIM_Try, /*On fail goto*//*Label 962*/ 26867, 12182 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, 12183 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8, 12184 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, 12185 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, 12186 GIM_Try, /*On fail goto*//*Label 963*/ 26836, // Rule ID 649 // 12187 GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 1, 12188 // (sra:{ *:[i32] } GR32:{ *:[i32] }:$src1, 1:{ *:[i8] }) => (SAR32r1:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1) 12189 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SAR32r1, 12190 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 12191 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 12192 GIR_EraseFromParent, /*InsnID*/0, 12193 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 12194 // GIR_Coverage, 649, 12195 GIR_Done, 12196 // Label 963: @26836 12197 GIM_Try, /*On fail goto*//*Label 964*/ 26866, // Rule ID 645 // 12198 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] 12199 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, 12200 // MIs[1] Operand 1 12201 // No operand predicates 12202 GIM_CheckIsSafeToFold, /*InsnID*/1, 12203 // (sra:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i8] }):$src2) => (SAR32ri:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i8] }):$src2) 12204 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SAR32ri, 12205 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 12206 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 12207 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 12208 GIR_EraseFromParent, /*InsnID*/0, 12209 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 12210 // GIR_Coverage, 645, 12211 GIR_Done, 12212 // Label 964: @26866 12213 GIM_Reject, 12214 // Label 962: @26867 12215 GIM_Reject, 12216 // Label 945: @26868 12217 GIM_Try, /*On fail goto*//*Label 965*/ 26939, 12218 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, 12219 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8, 12220 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, 12221 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, 12222 GIM_Try, /*On fail goto*//*Label 966*/ 26908, // Rule ID 650 // 12223 GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 1, 12224 // (sra:{ *:[i64] } GR64:{ *:[i64] }:$src1, 1:{ *:[i8] }) => (SAR64r1:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1) 12225 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SAR64r1, 12226 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 12227 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 12228 GIR_EraseFromParent, /*InsnID*/0, 12229 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 12230 // GIR_Coverage, 650, 12231 GIR_Done, 12232 // Label 966: @26908 12233 GIM_Try, /*On fail goto*//*Label 967*/ 26938, // Rule ID 646 // 12234 GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] 12235 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, 12236 // MIs[1] Operand 1 12237 // No operand predicates 12238 GIM_CheckIsSafeToFold, /*InsnID*/1, 12239 // (sra:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i8] }):$src2) => (SAR64ri:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i8] }):$src2) 12240 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SAR64ri, 12241 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 12242 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 12243 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 12244 GIR_EraseFromParent, /*InsnID*/0, 12245 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 12246 // GIR_Coverage, 646, 12247 GIR_Done, 12248 // Label 967: @26938 12249 GIM_Reject, 12250 // Label 965: @26939 12251 GIM_Reject, 12252 // Label 946: @26940 12253 GIM_Try, /*On fail goto*//*Label 968*/ 26971, // Rule ID 6473 // 12254 GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, 12255 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64, 12256 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, 12257 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, 12258 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, 12259 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, 12260 // (sra:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (VPSRAVQZ128rr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) 12261 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSRAVQZ128rr, 12262 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 12263 // GIR_Coverage, 6473, 12264 GIR_Done, 12265 // Label 968: @26971 12266 GIM_Reject, 12267 // Label 947: @26972 12268 GIM_Try, /*On fail goto*//*Label 969*/ 27029, 12269 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, 12270 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, 12271 GIM_Try, /*On fail goto*//*Label 970*/ 27005, // Rule ID 2739 // 12272 GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX, 12273 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 12274 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, 12275 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 12276 // (sra:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (VPSRAVDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) 12277 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSRAVDrr, 12278 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 12279 // GIR_Coverage, 2739, 12280 GIR_Done, 12281 // Label 970: @27005 12282 GIM_Try, /*On fail goto*//*Label 971*/ 27028, // Rule ID 6446 // 12283 GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, 12284 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, 12285 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, 12286 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, 12287 // (sra:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2) => (VPSRAVDZ128rr:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2) 12288 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSRAVDZ128rr, 12289 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 12290 // GIR_Coverage, 6446, 12291 GIR_Done, 12292 // Label 971: @27028 12293 GIM_Reject, 12294 // Label 969: @27029 12295 GIM_Reject, 12296 // Label 948: @27030 12297 GIM_Try, /*On fail goto*//*Label 972*/ 27061, // Rule ID 6464 // 12298 GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, 12299 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64, 12300 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64, 12301 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, 12302 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, 12303 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, 12304 // (sra:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) => (VPSRAVQZ256rr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) 12305 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSRAVQZ256rr, 12306 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 12307 // GIR_Coverage, 6464, 12308 GIR_Done, 12309 // Label 972: @27061 12310 GIM_Reject, 12311 // Label 949: @27062 12312 GIM_Try, /*On fail goto*//*Label 973*/ 27093, // Rule ID 6494 // 12313 GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, 12314 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16, 12315 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16, 12316 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, 12317 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, 12318 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, 12319 // (sra:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) => (VPSRAVWZ128rr:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) 12320 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSRAVWZ128rr, 12321 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 12322 // GIR_Coverage, 6494, 12323 GIR_Done, 12324 // Label 973: @27093 12325 GIM_Reject, 12326 // Label 950: @27094 12327 GIM_Try, /*On fail goto*//*Label 974*/ 27151, 12328 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32, 12329 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s32, 12330 GIM_Try, /*On fail goto*//*Label 975*/ 27127, // Rule ID 2741 // 12331 GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX, 12332 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, 12333 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, 12334 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, 12335 // (sra:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) => (VPSRAVDYrr:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) 12336 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSRAVDYrr, 12337 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 12338 // GIR_Coverage, 2741, 12339 GIR_Done, 12340 // Label 975: @27127 12341 GIM_Try, /*On fail goto*//*Label 976*/ 27150, // Rule ID 6437 // 12342 GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, 12343 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, 12344 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, 12345 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, 12346 // (sra:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2) => (VPSRAVDZ256rr:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2) 12347 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSRAVDZ256rr, 12348 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 12349 // GIR_Coverage, 6437, 12350 GIR_Done, 12351 // Label 976: @27150 12352 GIM_Reject, 12353 // Label 974: @27151 12354 GIM_Reject, 12355 // Label 951: @27152 12356 GIM_Try, /*On fail goto*//*Label 977*/ 27183, // Rule ID 6455 // 12357 GIM_CheckFeatures, GIFBS_HasAVX512, 12358 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64, 12359 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s64, 12360 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, 12361 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, 12362 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, 12363 // (sra:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) => (VPSRAVQZrr:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) 12364 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSRAVQZrr, 12365 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 12366 // GIR_Coverage, 6455, 12367 GIR_Done, 12368 // Label 977: @27183 12369 GIM_Reject, 12370 // Label 952: @27184 12371 GIM_Try, /*On fail goto*//*Label 978*/ 27215, // Rule ID 6488 // 12372 GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, 12373 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s16, 12374 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s16, 12375 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, 12376 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, 12377 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, 12378 // (sra:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) => (VPSRAVWZ256rr:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) 12379 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSRAVWZ256rr, 12380 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 12381 // GIR_Coverage, 6488, 12382 GIR_Done, 12383 // Label 978: @27215 12384 GIM_Reject, 12385 // Label 953: @27216 12386 GIM_Try, /*On fail goto*//*Label 979*/ 27247, // Rule ID 6428 // 12387 GIM_CheckFeatures, GIFBS_HasAVX512, 12388 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32, 12389 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s32, 12390 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, 12391 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, 12392 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, 12393 // (sra:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2) => (VPSRAVDZrr:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2) 12394 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSRAVDZrr, 12395 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 12396 // GIR_Coverage, 6428, 12397 GIR_Done, 12398 // Label 979: @27247 12399 GIM_Reject, 12400 // Label 954: @27248 12401 GIM_Try, /*On fail goto*//*Label 980*/ 27279, // Rule ID 6482 // 12402 GIM_CheckFeatures, GIFBS_HasBWI, 12403 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s16, 12404 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s16, 12405 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, 12406 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, 12407 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, 12408 // (sra:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) => (VPSRAVWZrr:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) 12409 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSRAVWZrr, 12410 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 12411 // GIR_Coverage, 6482, 12412 GIR_Done, 12413 // Label 980: @27279 12414 GIM_Reject, 12415 // Label 955: @27280 12416 GIM_Reject, 12417 // Label 18: @27281 12418 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/3, 20, /*)*//*default:*//*Label 990*/ 27893, 12419 /*GILLT_s32*//*Label 981*/ 27304, 12420 /*GILLT_s64*//*Label 982*/ 27411, 12421 /*GILLT_s80*//*Label 983*/ 27518, 0, 0, 12422 /*GILLT_v2s64*//*Label 984*/ 27551, 0, 12423 /*GILLT_v4s32*//*Label 985*/ 27632, 12424 /*GILLT_v4s64*//*Label 986*/ 27713, 0, 0, 12425 /*GILLT_v8s32*//*Label 987*/ 27771, 12426 /*GILLT_v8s64*//*Label 988*/ 27829, 0, 0, 0, 12427 /*GILLT_v16s32*//*Label 989*/ 27861, 12428 // Label 981: @27304 12429 GIM_Try, /*On fail goto*//*Label 991*/ 27410, 12430 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, 12431 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, 12432 GIM_Try, /*On fail goto*//*Label 992*/ 27340, // Rule ID 744 // 12433 GIM_CheckFeatures, GIFBS_FPStackf32, 12434 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP32RegClassID, 12435 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP32RegClassID, 12436 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::RFP32RegClassID, 12437 // (fadd:{ *:[f32] } RFP32:{ *:[f32] }:$src1, RFP32:{ *:[f32] }:$src2) => (ADD_Fp32:{ *:[f32] }:{ *:[i16] } RFP32:{ *:[f32] }:$src1, RFP32:{ *:[f32] }:$src2) 12438 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::ADD_Fp32, 12439 GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW, 12440 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 12441 // GIR_Coverage, 744, 12442 GIR_Done, 12443 // Label 992: @27340 12444 GIM_Try, /*On fail goto*//*Label 993*/ 27363, // Rule ID 1581 // 12445 GIM_CheckFeatures, GIFBS_UseAVX, 12446 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID, 12447 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID, 12448 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR32RegClassID, 12449 // (fadd:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2) => (VADDSSrr:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2) 12450 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VADDSSrr, 12451 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 12452 // GIR_Coverage, 1581, 12453 GIR_Done, 12454 // Label 993: @27363 12455 GIM_Try, /*On fail goto*//*Label 994*/ 27386, // Rule ID 1585 // 12456 GIM_CheckFeatures, GIFBS_UseSSE1, 12457 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID, 12458 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID, 12459 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR32RegClassID, 12460 // (fadd:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2) => (ADDSSrr:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2) 12461 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::ADDSSrr, 12462 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 12463 // GIR_Coverage, 1585, 12464 GIR_Done, 12465 // Label 994: @27386 12466 GIM_Try, /*On fail goto*//*Label 995*/ 27409, // Rule ID 5070 // 12467 GIM_CheckFeatures, GIFBS_HasAVX512, 12468 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32XRegClassID, 12469 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32XRegClassID, 12470 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR32XRegClassID, 12471 // (fadd:{ *:[f32] } FR32X:{ *:[f32] }:$src1, FR32X:{ *:[f32] }:$src2) => (VADDSSZrr:{ *:[f32] } FR32X:{ *:[f32] }:$src1, FR32X:{ *:[f32] }:$src2) 12472 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VADDSSZrr, 12473 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 12474 // GIR_Coverage, 5070, 12475 GIR_Done, 12476 // Label 995: @27409 12477 GIM_Reject, 12478 // Label 991: @27410 12479 GIM_Reject, 12480 // Label 982: @27411 12481 GIM_Try, /*On fail goto*//*Label 996*/ 27517, 12482 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, 12483 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, 12484 GIM_Try, /*On fail goto*//*Label 997*/ 27447, // Rule ID 745 // 12485 GIM_CheckFeatures, GIFBS_FPStackf64, 12486 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP64RegClassID, 12487 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP64RegClassID, 12488 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::RFP64RegClassID, 12489 // (fadd:{ *:[f64] } RFP64:{ *:[f64] }:$src1, RFP64:{ *:[f64] }:$src2) => (ADD_Fp64:{ *:[f64] }:{ *:[i16] } RFP64:{ *:[f64] }:$src1, RFP64:{ *:[f64] }:$src2) 12490 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::ADD_Fp64, 12491 GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW, 12492 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 12493 // GIR_Coverage, 745, 12494 GIR_Done, 12495 // Label 997: @27447 12496 GIM_Try, /*On fail goto*//*Label 998*/ 27470, // Rule ID 1583 // 12497 GIM_CheckFeatures, GIFBS_UseAVX, 12498 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64RegClassID, 12499 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64RegClassID, 12500 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR64RegClassID, 12501 // (fadd:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2) => (VADDSDrr:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2) 12502 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VADDSDrr, 12503 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 12504 // GIR_Coverage, 1583, 12505 GIR_Done, 12506 // Label 998: @27470 12507 GIM_Try, /*On fail goto*//*Label 999*/ 27493, // Rule ID 1587 // 12508 GIM_CheckFeatures, GIFBS_UseSSE2, 12509 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64RegClassID, 12510 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64RegClassID, 12511 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR64RegClassID, 12512 // (fadd:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2) => (ADDSDrr:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2) 12513 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::ADDSDrr, 12514 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 12515 // GIR_Coverage, 1587, 12516 GIR_Done, 12517 // Label 999: @27493 12518 GIM_Try, /*On fail goto*//*Label 1000*/ 27516, // Rule ID 5081 // 12519 GIM_CheckFeatures, GIFBS_HasAVX512, 12520 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64XRegClassID, 12521 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64XRegClassID, 12522 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR64XRegClassID, 12523 // (fadd:{ *:[f64] } FR64X:{ *:[f64] }:$src1, FR64X:{ *:[f64] }:$src2) => (VADDSDZrr:{ *:[f64] } FR64X:{ *:[f64] }:$src1, FR64X:{ *:[f64] }:$src2) 12524 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VADDSDZrr, 12525 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 12526 // GIR_Coverage, 5081, 12527 GIR_Done, 12528 // Label 1000: @27516 12529 GIM_Reject, 12530 // Label 996: @27517 12531 GIM_Reject, 12532 // Label 983: @27518 12533 GIM_Try, /*On fail goto*//*Label 1001*/ 27550, // Rule ID 746 // 12534 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s80, 12535 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s80, 12536 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP80RegClassID, 12537 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP80RegClassID, 12538 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::RFP80RegClassID, 12539 // (fadd:{ *:[f80] } RFP80:{ *:[f80] }:$src1, RFP80:{ *:[f80] }:$src2) => (ADD_Fp80:{ *:[f80] }:{ *:[i16] } RFP80:{ *:[f80] }:$src1, RFP80:{ *:[f80] }:$src2) 12540 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::ADD_Fp80, 12541 GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW, 12542 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 12543 // GIR_Coverage, 746, 12544 GIR_Done, 12545 // Label 1001: @27550 12546 GIM_Reject, 12547 // Label 984: @27551 12548 GIM_Try, /*On fail goto*//*Label 1002*/ 27631, 12549 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64, 12550 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, 12551 GIM_Try, /*On fail goto*//*Label 1003*/ 27584, // Rule ID 1571 // 12552 GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, 12553 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 12554 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, 12555 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 12556 // (fadd:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2) => (VADDPDrr:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2) 12557 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VADDPDrr, 12558 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 12559 // GIR_Coverage, 1571, 12560 GIR_Done, 12561 // Label 1003: @27584 12562 GIM_Try, /*On fail goto*//*Label 1004*/ 27607, // Rule ID 1579 // 12563 GIM_CheckFeatures, GIFBS_UseSSE2, 12564 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 12565 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, 12566 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 12567 // (fadd:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2) => (ADDPDrr:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2) 12568 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::ADDPDrr, 12569 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 12570 // GIR_Coverage, 1579, 12571 GIR_Done, 12572 // Label 1004: @27607 12573 GIM_Try, /*On fail goto*//*Label 1005*/ 27630, // Rule ID 5240 // 12574 GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, 12575 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, 12576 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, 12577 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, 12578 // (fadd:{ *:[v2f64] } VR128X:{ *:[v2f64] }:$src1, VR128X:{ *:[v2f64] }:$src2) => (VADDPDZ128rr:{ *:[v2f64] } VR128X:{ *:[v2f64] }:$src1, VR128X:{ *:[v2f64] }:$src2) 12579 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VADDPDZ128rr, 12580 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 12581 // GIR_Coverage, 5240, 12582 GIR_Done, 12583 // Label 1005: @27630 12584 GIM_Reject, 12585 // Label 1002: @27631 12586 GIM_Reject, 12587 // Label 985: @27632 12588 GIM_Try, /*On fail goto*//*Label 1006*/ 27712, 12589 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, 12590 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, 12591 GIM_Try, /*On fail goto*//*Label 1007*/ 27665, // Rule ID 1569 // 12592 GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, 12593 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 12594 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, 12595 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 12596 // (fadd:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2) => (VADDPSrr:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2) 12597 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VADDPSrr, 12598 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 12599 // GIR_Coverage, 1569, 12600 GIR_Done, 12601 // Label 1007: @27665 12602 GIM_Try, /*On fail goto*//*Label 1008*/ 27688, // Rule ID 1577 // 12603 GIM_CheckFeatures, GIFBS_UseSSE1, 12604 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 12605 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, 12606 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 12607 // (fadd:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2) => (ADDPSrr:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2) 12608 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::ADDPSrr, 12609 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 12610 // GIR_Coverage, 1577, 12611 GIR_Done, 12612 // Label 1008: @27688 12613 GIM_Try, /*On fail goto*//*Label 1009*/ 27711, // Rule ID 5222 // 12614 GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, 12615 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, 12616 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, 12617 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, 12618 // (fadd:{ *:[v4f32] } VR128X:{ *:[v4f32] }:$src1, VR128X:{ *:[v4f32] }:$src2) => (VADDPSZ128rr:{ *:[v4f32] } VR128X:{ *:[v4f32] }:$src1, VR128X:{ *:[v4f32] }:$src2) 12619 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VADDPSZ128rr, 12620 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 12621 // GIR_Coverage, 5222, 12622 GIR_Done, 12623 // Label 1009: @27711 12624 GIM_Reject, 12625 // Label 1006: @27712 12626 GIM_Reject, 12627 // Label 986: @27713 12628 GIM_Try, /*On fail goto*//*Label 1010*/ 27770, 12629 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64, 12630 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64, 12631 GIM_Try, /*On fail goto*//*Label 1011*/ 27746, // Rule ID 1575 // 12632 GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, 12633 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, 12634 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, 12635 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, 12636 // (fadd:{ *:[v4f64] } VR256:{ *:[v4f64] }:$src1, VR256:{ *:[v4f64] }:$src2) => (VADDPDYrr:{ *:[v4f64] } VR256:{ *:[v4f64] }:$src1, VR256:{ *:[v4f64] }:$src2) 12637 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VADDPDYrr, 12638 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 12639 // GIR_Coverage, 1575, 12640 GIR_Done, 12641 // Label 1011: @27746 12642 GIM_Try, /*On fail goto*//*Label 1012*/ 27769, // Rule ID 5249 // 12643 GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, 12644 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, 12645 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, 12646 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, 12647 // (fadd:{ *:[v4f64] } VR256X:{ *:[v4f64] }:$src1, VR256X:{ *:[v4f64] }:$src2) => (VADDPDZ256rr:{ *:[v4f64] } VR256X:{ *:[v4f64] }:$src1, VR256X:{ *:[v4f64] }:$src2) 12648 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VADDPDZ256rr, 12649 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 12650 // GIR_Coverage, 5249, 12651 GIR_Done, 12652 // Label 1012: @27769 12653 GIM_Reject, 12654 // Label 1010: @27770 12655 GIM_Reject, 12656 // Label 987: @27771 12657 GIM_Try, /*On fail goto*//*Label 1013*/ 27828, 12658 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32, 12659 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s32, 12660 GIM_Try, /*On fail goto*//*Label 1014*/ 27804, // Rule ID 1573 // 12661 GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, 12662 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, 12663 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, 12664 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, 12665 // (fadd:{ *:[v8f32] } VR256:{ *:[v8f32] }:$src1, VR256:{ *:[v8f32] }:$src2) => (VADDPSYrr:{ *:[v8f32] } VR256:{ *:[v8f32] }:$src1, VR256:{ *:[v8f32] }:$src2) 12666 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VADDPSYrr, 12667 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 12668 // GIR_Coverage, 1573, 12669 GIR_Done, 12670 // Label 1014: @27804 12671 GIM_Try, /*On fail goto*//*Label 1015*/ 27827, // Rule ID 5231 // 12672 GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, 12673 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, 12674 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, 12675 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, 12676 // (fadd:{ *:[v8f32] } VR256X:{ *:[v8f32] }:$src1, VR256X:{ *:[v8f32] }:$src2) => (VADDPSZ256rr:{ *:[v8f32] } VR256X:{ *:[v8f32] }:$src1, VR256X:{ *:[v8f32] }:$src2) 12677 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VADDPSZ256rr, 12678 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 12679 // GIR_Coverage, 5231, 12680 GIR_Done, 12681 // Label 1015: @27827 12682 GIM_Reject, 12683 // Label 1013: @27828 12684 GIM_Reject, 12685 // Label 988: @27829 12686 GIM_Try, /*On fail goto*//*Label 1016*/ 27860, // Rule ID 5213 // 12687 GIM_CheckFeatures, GIFBS_HasAVX512, 12688 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64, 12689 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s64, 12690 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, 12691 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, 12692 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, 12693 // (fadd:{ *:[v8f64] } VR512:{ *:[v8f64] }:$src1, VR512:{ *:[v8f64] }:$src2) => (VADDPDZrr:{ *:[v8f64] } VR512:{ *:[v8f64] }:$src1, VR512:{ *:[v8f64] }:$src2) 12694 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VADDPDZrr, 12695 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 12696 // GIR_Coverage, 5213, 12697 GIR_Done, 12698 // Label 1016: @27860 12699 GIM_Reject, 12700 // Label 989: @27861 12701 GIM_Try, /*On fail goto*//*Label 1017*/ 27892, // Rule ID 5204 // 12702 GIM_CheckFeatures, GIFBS_HasAVX512, 12703 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32, 12704 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s32, 12705 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, 12706 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, 12707 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, 12708 // (fadd:{ *:[v16f32] } VR512:{ *:[v16f32] }:$src1, VR512:{ *:[v16f32] }:$src2) => (VADDPSZrr:{ *:[v16f32] } VR512:{ *:[v16f32] }:$src1, VR512:{ *:[v16f32] }:$src2) 12709 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VADDPSZrr, 12710 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 12711 // GIR_Coverage, 5204, 12712 GIR_Done, 12713 // Label 1017: @27892 12714 GIM_Reject, 12715 // Label 990: @27893 12716 GIM_Reject, 12717 // Label 19: @27894 12718 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/3, 20, /*)*//*default:*//*Label 1027*/ 28506, 12719 /*GILLT_s32*//*Label 1018*/ 27917, 12720 /*GILLT_s64*//*Label 1019*/ 28024, 12721 /*GILLT_s80*//*Label 1020*/ 28131, 0, 0, 12722 /*GILLT_v2s64*//*Label 1021*/ 28164, 0, 12723 /*GILLT_v4s32*//*Label 1022*/ 28245, 12724 /*GILLT_v4s64*//*Label 1023*/ 28326, 0, 0, 12725 /*GILLT_v8s32*//*Label 1024*/ 28384, 12726 /*GILLT_v8s64*//*Label 1025*/ 28442, 0, 0, 0, 12727 /*GILLT_v16s32*//*Label 1026*/ 28474, 12728 // Label 1018: @27917 12729 GIM_Try, /*On fail goto*//*Label 1028*/ 28023, 12730 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, 12731 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, 12732 GIM_Try, /*On fail goto*//*Label 1029*/ 27953, // Rule ID 747 // 12733 GIM_CheckFeatures, GIFBS_FPStackf32, 12734 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP32RegClassID, 12735 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP32RegClassID, 12736 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::RFP32RegClassID, 12737 // (fsub:{ *:[f32] } RFP32:{ *:[f32] }:$src1, RFP32:{ *:[f32] }:$src2) => (SUB_Fp32:{ *:[f32] }:{ *:[i16] } RFP32:{ *:[f32] }:$src1, RFP32:{ *:[f32] }:$src2) 12738 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::SUB_Fp32, 12739 GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW, 12740 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 12741 // GIR_Coverage, 747, 12742 GIR_Done, 12743 // Label 1029: @27953 12744 GIM_Try, /*On fail goto*//*Label 1030*/ 27976, // Rule ID 1621 // 12745 GIM_CheckFeatures, GIFBS_UseAVX, 12746 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID, 12747 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID, 12748 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR32RegClassID, 12749 // (fsub:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2) => (VSUBSSrr:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2) 12750 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSUBSSrr, 12751 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 12752 // GIR_Coverage, 1621, 12753 GIR_Done, 12754 // Label 1030: @27976 12755 GIM_Try, /*On fail goto*//*Label 1031*/ 27999, // Rule ID 1625 // 12756 GIM_CheckFeatures, GIFBS_UseSSE1, 12757 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID, 12758 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID, 12759 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR32RegClassID, 12760 // (fsub:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2) => (SUBSSrr:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2) 12761 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::SUBSSrr, 12762 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 12763 // GIR_Coverage, 1625, 12764 GIR_Done, 12765 // Label 1031: @27999 12766 GIM_Try, /*On fail goto*//*Label 1032*/ 28022, // Rule ID 5114 // 12767 GIM_CheckFeatures, GIFBS_HasAVX512, 12768 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32XRegClassID, 12769 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32XRegClassID, 12770 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR32XRegClassID, 12771 // (fsub:{ *:[f32] } FR32X:{ *:[f32] }:$src1, FR32X:{ *:[f32] }:$src2) => (VSUBSSZrr:{ *:[f32] } FR32X:{ *:[f32] }:$src1, FR32X:{ *:[f32] }:$src2) 12772 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSUBSSZrr, 12773 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 12774 // GIR_Coverage, 5114, 12775 GIR_Done, 12776 // Label 1032: @28022 12777 GIM_Reject, 12778 // Label 1028: @28023 12779 GIM_Reject, 12780 // Label 1019: @28024 12781 GIM_Try, /*On fail goto*//*Label 1033*/ 28130, 12782 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, 12783 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, 12784 GIM_Try, /*On fail goto*//*Label 1034*/ 28060, // Rule ID 748 // 12785 GIM_CheckFeatures, GIFBS_FPStackf64, 12786 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP64RegClassID, 12787 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP64RegClassID, 12788 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::RFP64RegClassID, 12789 // (fsub:{ *:[f64] } RFP64:{ *:[f64] }:$src1, RFP64:{ *:[f64] }:$src2) => (SUB_Fp64:{ *:[f64] }:{ *:[i16] } RFP64:{ *:[f64] }:$src1, RFP64:{ *:[f64] }:$src2) 12790 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::SUB_Fp64, 12791 GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW, 12792 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 12793 // GIR_Coverage, 748, 12794 GIR_Done, 12795 // Label 1034: @28060 12796 GIM_Try, /*On fail goto*//*Label 1035*/ 28083, // Rule ID 1623 // 12797 GIM_CheckFeatures, GIFBS_UseAVX, 12798 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64RegClassID, 12799 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64RegClassID, 12800 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR64RegClassID, 12801 // (fsub:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2) => (VSUBSDrr:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2) 12802 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSUBSDrr, 12803 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 12804 // GIR_Coverage, 1623, 12805 GIR_Done, 12806 // Label 1035: @28083 12807 GIM_Try, /*On fail goto*//*Label 1036*/ 28106, // Rule ID 1627 // 12808 GIM_CheckFeatures, GIFBS_UseSSE2, 12809 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64RegClassID, 12810 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64RegClassID, 12811 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR64RegClassID, 12812 // (fsub:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2) => (SUBSDrr:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2) 12813 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::SUBSDrr, 12814 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 12815 // GIR_Coverage, 1627, 12816 GIR_Done, 12817 // Label 1036: @28106 12818 GIM_Try, /*On fail goto*//*Label 1037*/ 28129, // Rule ID 5125 // 12819 GIM_CheckFeatures, GIFBS_HasAVX512, 12820 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64XRegClassID, 12821 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64XRegClassID, 12822 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR64XRegClassID, 12823 // (fsub:{ *:[f64] } FR64X:{ *:[f64] }:$src1, FR64X:{ *:[f64] }:$src2) => (VSUBSDZrr:{ *:[f64] } FR64X:{ *:[f64] }:$src1, FR64X:{ *:[f64] }:$src2) 12824 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSUBSDZrr, 12825 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 12826 // GIR_Coverage, 5125, 12827 GIR_Done, 12828 // Label 1037: @28129 12829 GIM_Reject, 12830 // Label 1033: @28130 12831 GIM_Reject, 12832 // Label 1020: @28131 12833 GIM_Try, /*On fail goto*//*Label 1038*/ 28163, // Rule ID 749 // 12834 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s80, 12835 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s80, 12836 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP80RegClassID, 12837 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP80RegClassID, 12838 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::RFP80RegClassID, 12839 // (fsub:{ *:[f80] } RFP80:{ *:[f80] }:$src1, RFP80:{ *:[f80] }:$src2) => (SUB_Fp80:{ *:[f80] }:{ *:[i16] } RFP80:{ *:[f80] }:$src1, RFP80:{ *:[f80] }:$src2) 12840 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::SUB_Fp80, 12841 GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW, 12842 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 12843 // GIR_Coverage, 749, 12844 GIR_Done, 12845 // Label 1038: @28163 12846 GIM_Reject, 12847 // Label 1021: @28164 12848 GIM_Try, /*On fail goto*//*Label 1039*/ 28244, 12849 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64, 12850 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, 12851 GIM_Try, /*On fail goto*//*Label 1040*/ 28197, // Rule ID 1611 // 12852 GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, 12853 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 12854 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, 12855 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 12856 // (fsub:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2) => (VSUBPDrr:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2) 12857 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSUBPDrr, 12858 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 12859 // GIR_Coverage, 1611, 12860 GIR_Done, 12861 // Label 1040: @28197 12862 GIM_Try, /*On fail goto*//*Label 1041*/ 28220, // Rule ID 1619 // 12863 GIM_CheckFeatures, GIFBS_UseSSE2, 12864 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 12865 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, 12866 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 12867 // (fsub:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2) => (SUBPDrr:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2) 12868 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::SUBPDrr, 12869 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 12870 // GIR_Coverage, 1619, 12871 GIR_Done, 12872 // Label 1041: @28220 12873 GIM_Try, /*On fail goto*//*Label 1042*/ 28243, // Rule ID 5360 // 12874 GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, 12875 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, 12876 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, 12877 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, 12878 // (fsub:{ *:[v2f64] } VR128X:{ *:[v2f64] }:$src1, VR128X:{ *:[v2f64] }:$src2) => (VSUBPDZ128rr:{ *:[v2f64] } VR128X:{ *:[v2f64] }:$src1, VR128X:{ *:[v2f64] }:$src2) 12879 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSUBPDZ128rr, 12880 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 12881 // GIR_Coverage, 5360, 12882 GIR_Done, 12883 // Label 1042: @28243 12884 GIM_Reject, 12885 // Label 1039: @28244 12886 GIM_Reject, 12887 // Label 1022: @28245 12888 GIM_Try, /*On fail goto*//*Label 1043*/ 28325, 12889 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, 12890 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, 12891 GIM_Try, /*On fail goto*//*Label 1044*/ 28278, // Rule ID 1609 // 12892 GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, 12893 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 12894 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, 12895 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 12896 // (fsub:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2) => (VSUBPSrr:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2) 12897 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSUBPSrr, 12898 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 12899 // GIR_Coverage, 1609, 12900 GIR_Done, 12901 // Label 1044: @28278 12902 GIM_Try, /*On fail goto*//*Label 1045*/ 28301, // Rule ID 1617 // 12903 GIM_CheckFeatures, GIFBS_UseSSE1, 12904 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 12905 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, 12906 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 12907 // (fsub:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2) => (SUBPSrr:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2) 12908 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::SUBPSrr, 12909 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 12910 // GIR_Coverage, 1617, 12911 GIR_Done, 12912 // Label 1045: @28301 12913 GIM_Try, /*On fail goto*//*Label 1046*/ 28324, // Rule ID 5342 // 12914 GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, 12915 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, 12916 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, 12917 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, 12918 // (fsub:{ *:[v4f32] } VR128X:{ *:[v4f32] }:$src1, VR128X:{ *:[v4f32] }:$src2) => (VSUBPSZ128rr:{ *:[v4f32] } VR128X:{ *:[v4f32] }:$src1, VR128X:{ *:[v4f32] }:$src2) 12919 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSUBPSZ128rr, 12920 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 12921 // GIR_Coverage, 5342, 12922 GIR_Done, 12923 // Label 1046: @28324 12924 GIM_Reject, 12925 // Label 1043: @28325 12926 GIM_Reject, 12927 // Label 1023: @28326 12928 GIM_Try, /*On fail goto*//*Label 1047*/ 28383, 12929 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64, 12930 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64, 12931 GIM_Try, /*On fail goto*//*Label 1048*/ 28359, // Rule ID 1615 // 12932 GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, 12933 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, 12934 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, 12935 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, 12936 // (fsub:{ *:[v4f64] } VR256:{ *:[v4f64] }:$src1, VR256:{ *:[v4f64] }:$src2) => (VSUBPDYrr:{ *:[v4f64] } VR256:{ *:[v4f64] }:$src1, VR256:{ *:[v4f64] }:$src2) 12937 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSUBPDYrr, 12938 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 12939 // GIR_Coverage, 1615, 12940 GIR_Done, 12941 // Label 1048: @28359 12942 GIM_Try, /*On fail goto*//*Label 1049*/ 28382, // Rule ID 5369 // 12943 GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, 12944 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, 12945 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, 12946 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, 12947 // (fsub:{ *:[v4f64] } VR256X:{ *:[v4f64] }:$src1, VR256X:{ *:[v4f64] }:$src2) => (VSUBPDZ256rr:{ *:[v4f64] } VR256X:{ *:[v4f64] }:$src1, VR256X:{ *:[v4f64] }:$src2) 12948 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSUBPDZ256rr, 12949 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 12950 // GIR_Coverage, 5369, 12951 GIR_Done, 12952 // Label 1049: @28382 12953 GIM_Reject, 12954 // Label 1047: @28383 12955 GIM_Reject, 12956 // Label 1024: @28384 12957 GIM_Try, /*On fail goto*//*Label 1050*/ 28441, 12958 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32, 12959 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s32, 12960 GIM_Try, /*On fail goto*//*Label 1051*/ 28417, // Rule ID 1613 // 12961 GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, 12962 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, 12963 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, 12964 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, 12965 // (fsub:{ *:[v8f32] } VR256:{ *:[v8f32] }:$src1, VR256:{ *:[v8f32] }:$src2) => (VSUBPSYrr:{ *:[v8f32] } VR256:{ *:[v8f32] }:$src1, VR256:{ *:[v8f32] }:$src2) 12966 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSUBPSYrr, 12967 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 12968 // GIR_Coverage, 1613, 12969 GIR_Done, 12970 // Label 1051: @28417 12971 GIM_Try, /*On fail goto*//*Label 1052*/ 28440, // Rule ID 5351 // 12972 GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, 12973 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, 12974 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, 12975 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, 12976 // (fsub:{ *:[v8f32] } VR256X:{ *:[v8f32] }:$src1, VR256X:{ *:[v8f32] }:$src2) => (VSUBPSZ256rr:{ *:[v8f32] } VR256X:{ *:[v8f32] }:$src1, VR256X:{ *:[v8f32] }:$src2) 12977 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSUBPSZ256rr, 12978 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 12979 // GIR_Coverage, 5351, 12980 GIR_Done, 12981 // Label 1052: @28440 12982 GIM_Reject, 12983 // Label 1050: @28441 12984 GIM_Reject, 12985 // Label 1025: @28442 12986 GIM_Try, /*On fail goto*//*Label 1053*/ 28473, // Rule ID 5333 // 12987 GIM_CheckFeatures, GIFBS_HasAVX512, 12988 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64, 12989 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s64, 12990 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, 12991 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, 12992 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, 12993 // (fsub:{ *:[v8f64] } VR512:{ *:[v8f64] }:$src1, VR512:{ *:[v8f64] }:$src2) => (VSUBPDZrr:{ *:[v8f64] } VR512:{ *:[v8f64] }:$src1, VR512:{ *:[v8f64] }:$src2) 12994 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSUBPDZrr, 12995 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 12996 // GIR_Coverage, 5333, 12997 GIR_Done, 12998 // Label 1053: @28473 12999 GIM_Reject, 13000 // Label 1026: @28474 13001 GIM_Try, /*On fail goto*//*Label 1054*/ 28505, // Rule ID 5324 // 13002 GIM_CheckFeatures, GIFBS_HasAVX512, 13003 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32, 13004 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s32, 13005 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, 13006 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, 13007 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, 13008 // (fsub:{ *:[v16f32] } VR512:{ *:[v16f32] }:$src1, VR512:{ *:[v16f32] }:$src2) => (VSUBPSZrr:{ *:[v16f32] } VR512:{ *:[v16f32] }:$src1, VR512:{ *:[v16f32] }:$src2) 13009 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSUBPSZrr, 13010 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 13011 // GIR_Coverage, 5324, 13012 GIR_Done, 13013 // Label 1054: @28505 13014 GIM_Reject, 13015 // Label 1027: @28506 13016 GIM_Reject, 13017 // Label 20: @28507 13018 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/3, 20, /*)*//*default:*//*Label 1064*/ 29119, 13019 /*GILLT_s32*//*Label 1055*/ 28530, 13020 /*GILLT_s64*//*Label 1056*/ 28637, 13021 /*GILLT_s80*//*Label 1057*/ 28744, 0, 0, 13022 /*GILLT_v2s64*//*Label 1058*/ 28777, 0, 13023 /*GILLT_v4s32*//*Label 1059*/ 28858, 13024 /*GILLT_v4s64*//*Label 1060*/ 28939, 0, 0, 13025 /*GILLT_v8s32*//*Label 1061*/ 28997, 13026 /*GILLT_v8s64*//*Label 1062*/ 29055, 0, 0, 0, 13027 /*GILLT_v16s32*//*Label 1063*/ 29087, 13028 // Label 1055: @28530 13029 GIM_Try, /*On fail goto*//*Label 1065*/ 28636, 13030 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, 13031 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, 13032 GIM_Try, /*On fail goto*//*Label 1066*/ 28566, // Rule ID 750 // 13033 GIM_CheckFeatures, GIFBS_FPStackf32, 13034 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP32RegClassID, 13035 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP32RegClassID, 13036 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::RFP32RegClassID, 13037 // (fmul:{ *:[f32] } RFP32:{ *:[f32] }:$src1, RFP32:{ *:[f32] }:$src2) => (MUL_Fp32:{ *:[f32] }:{ *:[i16] } RFP32:{ *:[f32] }:$src1, RFP32:{ *:[f32] }:$src2) 13038 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::MUL_Fp32, 13039 GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW, 13040 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 13041 // GIR_Coverage, 750, 13042 GIR_Done, 13043 // Label 1066: @28566 13044 GIM_Try, /*On fail goto*//*Label 1067*/ 28589, // Rule ID 1601 // 13045 GIM_CheckFeatures, GIFBS_UseAVX, 13046 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID, 13047 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID, 13048 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR32RegClassID, 13049 // (fmul:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2) => (VMULSSrr:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2) 13050 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMULSSrr, 13051 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 13052 // GIR_Coverage, 1601, 13053 GIR_Done, 13054 // Label 1067: @28589 13055 GIM_Try, /*On fail goto*//*Label 1068*/ 28612, // Rule ID 1605 // 13056 GIM_CheckFeatures, GIFBS_UseSSE1, 13057 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID, 13058 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID, 13059 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR32RegClassID, 13060 // (fmul:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2) => (MULSSrr:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2) 13061 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::MULSSrr, 13062 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 13063 // GIR_Coverage, 1605, 13064 GIR_Done, 13065 // Label 1068: @28612 13066 GIM_Try, /*On fail goto*//*Label 1069*/ 28635, // Rule ID 5092 // 13067 GIM_CheckFeatures, GIFBS_HasAVX512, 13068 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32XRegClassID, 13069 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32XRegClassID, 13070 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR32XRegClassID, 13071 // (fmul:{ *:[f32] } FR32X:{ *:[f32] }:$src1, FR32X:{ *:[f32] }:$src2) => (VMULSSZrr:{ *:[f32] } FR32X:{ *:[f32] }:$src1, FR32X:{ *:[f32] }:$src2) 13072 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMULSSZrr, 13073 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 13074 // GIR_Coverage, 5092, 13075 GIR_Done, 13076 // Label 1069: @28635 13077 GIM_Reject, 13078 // Label 1065: @28636 13079 GIM_Reject, 13080 // Label 1056: @28637 13081 GIM_Try, /*On fail goto*//*Label 1070*/ 28743, 13082 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, 13083 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, 13084 GIM_Try, /*On fail goto*//*Label 1071*/ 28673, // Rule ID 751 // 13085 GIM_CheckFeatures, GIFBS_FPStackf64, 13086 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP64RegClassID, 13087 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP64RegClassID, 13088 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::RFP64RegClassID, 13089 // (fmul:{ *:[f64] } RFP64:{ *:[f64] }:$src1, RFP64:{ *:[f64] }:$src2) => (MUL_Fp64:{ *:[f64] }:{ *:[i16] } RFP64:{ *:[f64] }:$src1, RFP64:{ *:[f64] }:$src2) 13090 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::MUL_Fp64, 13091 GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW, 13092 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 13093 // GIR_Coverage, 751, 13094 GIR_Done, 13095 // Label 1071: @28673 13096 GIM_Try, /*On fail goto*//*Label 1072*/ 28696, // Rule ID 1603 // 13097 GIM_CheckFeatures, GIFBS_UseAVX, 13098 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64RegClassID, 13099 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64RegClassID, 13100 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR64RegClassID, 13101 // (fmul:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2) => (VMULSDrr:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2) 13102 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMULSDrr, 13103 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 13104 // GIR_Coverage, 1603, 13105 GIR_Done, 13106 // Label 1072: @28696 13107 GIM_Try, /*On fail goto*//*Label 1073*/ 28719, // Rule ID 1607 // 13108 GIM_CheckFeatures, GIFBS_UseSSE2, 13109 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64RegClassID, 13110 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64RegClassID, 13111 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR64RegClassID, 13112 // (fmul:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2) => (MULSDrr:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2) 13113 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::MULSDrr, 13114 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 13115 // GIR_Coverage, 1607, 13116 GIR_Done, 13117 // Label 1073: @28719 13118 GIM_Try, /*On fail goto*//*Label 1074*/ 28742, // Rule ID 5103 // 13119 GIM_CheckFeatures, GIFBS_HasAVX512, 13120 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64XRegClassID, 13121 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64XRegClassID, 13122 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR64XRegClassID, 13123 // (fmul:{ *:[f64] } FR64X:{ *:[f64] }:$src1, FR64X:{ *:[f64] }:$src2) => (VMULSDZrr:{ *:[f64] } FR64X:{ *:[f64] }:$src1, FR64X:{ *:[f64] }:$src2) 13124 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMULSDZrr, 13125 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 13126 // GIR_Coverage, 5103, 13127 GIR_Done, 13128 // Label 1074: @28742 13129 GIM_Reject, 13130 // Label 1070: @28743 13131 GIM_Reject, 13132 // Label 1057: @28744 13133 GIM_Try, /*On fail goto*//*Label 1075*/ 28776, // Rule ID 752 // 13134 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s80, 13135 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s80, 13136 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP80RegClassID, 13137 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP80RegClassID, 13138 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::RFP80RegClassID, 13139 // (fmul:{ *:[f80] } RFP80:{ *:[f80] }:$src1, RFP80:{ *:[f80] }:$src2) => (MUL_Fp80:{ *:[f80] }:{ *:[i16] } RFP80:{ *:[f80] }:$src1, RFP80:{ *:[f80] }:$src2) 13140 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::MUL_Fp80, 13141 GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW, 13142 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 13143 // GIR_Coverage, 752, 13144 GIR_Done, 13145 // Label 1075: @28776 13146 GIM_Reject, 13147 // Label 1058: @28777 13148 GIM_Try, /*On fail goto*//*Label 1076*/ 28857, 13149 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64, 13150 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, 13151 GIM_Try, /*On fail goto*//*Label 1077*/ 28810, // Rule ID 1591 // 13152 GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, 13153 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 13154 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, 13155 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 13156 // (fmul:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2) => (VMULPDrr:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2) 13157 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMULPDrr, 13158 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 13159 // GIR_Coverage, 1591, 13160 GIR_Done, 13161 // Label 1077: @28810 13162 GIM_Try, /*On fail goto*//*Label 1078*/ 28833, // Rule ID 1599 // 13163 GIM_CheckFeatures, GIFBS_UseSSE2, 13164 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 13165 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, 13166 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 13167 // (fmul:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2) => (MULPDrr:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2) 13168 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::MULPDrr, 13169 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 13170 // GIR_Coverage, 1599, 13171 GIR_Done, 13172 // Label 1078: @28833 13173 GIM_Try, /*On fail goto*//*Label 1079*/ 28856, // Rule ID 5300 // 13174 GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, 13175 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, 13176 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, 13177 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, 13178 // (fmul:{ *:[v2f64] } VR128X:{ *:[v2f64] }:$src1, VR128X:{ *:[v2f64] }:$src2) => (VMULPDZ128rr:{ *:[v2f64] } VR128X:{ *:[v2f64] }:$src1, VR128X:{ *:[v2f64] }:$src2) 13179 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMULPDZ128rr, 13180 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 13181 // GIR_Coverage, 5300, 13182 GIR_Done, 13183 // Label 1079: @28856 13184 GIM_Reject, 13185 // Label 1076: @28857 13186 GIM_Reject, 13187 // Label 1059: @28858 13188 GIM_Try, /*On fail goto*//*Label 1080*/ 28938, 13189 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, 13190 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, 13191 GIM_Try, /*On fail goto*//*Label 1081*/ 28891, // Rule ID 1589 // 13192 GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, 13193 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 13194 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, 13195 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 13196 // (fmul:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2) => (VMULPSrr:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2) 13197 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMULPSrr, 13198 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 13199 // GIR_Coverage, 1589, 13200 GIR_Done, 13201 // Label 1081: @28891 13202 GIM_Try, /*On fail goto*//*Label 1082*/ 28914, // Rule ID 1597 // 13203 GIM_CheckFeatures, GIFBS_UseSSE1, 13204 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 13205 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, 13206 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 13207 // (fmul:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2) => (MULPSrr:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2) 13208 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::MULPSrr, 13209 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 13210 // GIR_Coverage, 1597, 13211 GIR_Done, 13212 // Label 1082: @28914 13213 GIM_Try, /*On fail goto*//*Label 1083*/ 28937, // Rule ID 5282 // 13214 GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, 13215 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, 13216 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, 13217 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, 13218 // (fmul:{ *:[v4f32] } VR128X:{ *:[v4f32] }:$src1, VR128X:{ *:[v4f32] }:$src2) => (VMULPSZ128rr:{ *:[v4f32] } VR128X:{ *:[v4f32] }:$src1, VR128X:{ *:[v4f32] }:$src2) 13219 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMULPSZ128rr, 13220 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 13221 // GIR_Coverage, 5282, 13222 GIR_Done, 13223 // Label 1083: @28937 13224 GIM_Reject, 13225 // Label 1080: @28938 13226 GIM_Reject, 13227 // Label 1060: @28939 13228 GIM_Try, /*On fail goto*//*Label 1084*/ 28996, 13229 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64, 13230 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64, 13231 GIM_Try, /*On fail goto*//*Label 1085*/ 28972, // Rule ID 1595 // 13232 GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, 13233 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, 13234 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, 13235 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, 13236 // (fmul:{ *:[v4f64] } VR256:{ *:[v4f64] }:$src1, VR256:{ *:[v4f64] }:$src2) => (VMULPDYrr:{ *:[v4f64] } VR256:{ *:[v4f64] }:$src1, VR256:{ *:[v4f64] }:$src2) 13237 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMULPDYrr, 13238 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 13239 // GIR_Coverage, 1595, 13240 GIR_Done, 13241 // Label 1085: @28972 13242 GIM_Try, /*On fail goto*//*Label 1086*/ 28995, // Rule ID 5309 // 13243 GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, 13244 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, 13245 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, 13246 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, 13247 // (fmul:{ *:[v4f64] } VR256X:{ *:[v4f64] }:$src1, VR256X:{ *:[v4f64] }:$src2) => (VMULPDZ256rr:{ *:[v4f64] } VR256X:{ *:[v4f64] }:$src1, VR256X:{ *:[v4f64] }:$src2) 13248 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMULPDZ256rr, 13249 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 13250 // GIR_Coverage, 5309, 13251 GIR_Done, 13252 // Label 1086: @28995 13253 GIM_Reject, 13254 // Label 1084: @28996 13255 GIM_Reject, 13256 // Label 1061: @28997 13257 GIM_Try, /*On fail goto*//*Label 1087*/ 29054, 13258 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32, 13259 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s32, 13260 GIM_Try, /*On fail goto*//*Label 1088*/ 29030, // Rule ID 1593 // 13261 GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, 13262 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, 13263 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, 13264 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, 13265 // (fmul:{ *:[v8f32] } VR256:{ *:[v8f32] }:$src1, VR256:{ *:[v8f32] }:$src2) => (VMULPSYrr:{ *:[v8f32] } VR256:{ *:[v8f32] }:$src1, VR256:{ *:[v8f32] }:$src2) 13266 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMULPSYrr, 13267 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 13268 // GIR_Coverage, 1593, 13269 GIR_Done, 13270 // Label 1088: @29030 13271 GIM_Try, /*On fail goto*//*Label 1089*/ 29053, // Rule ID 5291 // 13272 GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, 13273 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, 13274 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, 13275 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, 13276 // (fmul:{ *:[v8f32] } VR256X:{ *:[v8f32] }:$src1, VR256X:{ *:[v8f32] }:$src2) => (VMULPSZ256rr:{ *:[v8f32] } VR256X:{ *:[v8f32] }:$src1, VR256X:{ *:[v8f32] }:$src2) 13277 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMULPSZ256rr, 13278 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 13279 // GIR_Coverage, 5291, 13280 GIR_Done, 13281 // Label 1089: @29053 13282 GIM_Reject, 13283 // Label 1087: @29054 13284 GIM_Reject, 13285 // Label 1062: @29055 13286 GIM_Try, /*On fail goto*//*Label 1090*/ 29086, // Rule ID 5273 // 13287 GIM_CheckFeatures, GIFBS_HasAVX512, 13288 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64, 13289 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s64, 13290 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, 13291 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, 13292 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, 13293 // (fmul:{ *:[v8f64] } VR512:{ *:[v8f64] }:$src1, VR512:{ *:[v8f64] }:$src2) => (VMULPDZrr:{ *:[v8f64] } VR512:{ *:[v8f64] }:$src1, VR512:{ *:[v8f64] }:$src2) 13294 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMULPDZrr, 13295 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 13296 // GIR_Coverage, 5273, 13297 GIR_Done, 13298 // Label 1090: @29086 13299 GIM_Reject, 13300 // Label 1063: @29087 13301 GIM_Try, /*On fail goto*//*Label 1091*/ 29118, // Rule ID 5264 // 13302 GIM_CheckFeatures, GIFBS_HasAVX512, 13303 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32, 13304 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s32, 13305 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, 13306 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, 13307 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, 13308 // (fmul:{ *:[v16f32] } VR512:{ *:[v16f32] }:$src1, VR512:{ *:[v16f32] }:$src2) => (VMULPSZrr:{ *:[v16f32] } VR512:{ *:[v16f32] }:$src1, VR512:{ *:[v16f32] }:$src2) 13309 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMULPSZrr, 13310 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 13311 // GIR_Coverage, 5264, 13312 GIR_Done, 13313 // Label 1091: @29118 13314 GIM_Reject, 13315 // Label 1064: @29119 13316 GIM_Reject, 13317 // Label 21: @29120 13318 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/3, 20, /*)*//*default:*//*Label 1101*/ 29732, 13319 /*GILLT_s32*//*Label 1092*/ 29143, 13320 /*GILLT_s64*//*Label 1093*/ 29250, 13321 /*GILLT_s80*//*Label 1094*/ 29357, 0, 0, 13322 /*GILLT_v2s64*//*Label 1095*/ 29390, 0, 13323 /*GILLT_v4s32*//*Label 1096*/ 29471, 13324 /*GILLT_v4s64*//*Label 1097*/ 29552, 0, 0, 13325 /*GILLT_v8s32*//*Label 1098*/ 29610, 13326 /*GILLT_v8s64*//*Label 1099*/ 29668, 0, 0, 0, 13327 /*GILLT_v16s32*//*Label 1100*/ 29700, 13328 // Label 1092: @29143 13329 GIM_Try, /*On fail goto*//*Label 1102*/ 29249, 13330 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, 13331 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, 13332 GIM_Try, /*On fail goto*//*Label 1103*/ 29179, // Rule ID 753 // 13333 GIM_CheckFeatures, GIFBS_FPStackf32, 13334 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP32RegClassID, 13335 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP32RegClassID, 13336 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::RFP32RegClassID, 13337 // (fdiv:{ *:[f32] } RFP32:{ *:[f32] }:$src1, RFP32:{ *:[f32] }:$src2) => (DIV_Fp32:{ *:[f32] }:{ *:[i16] } RFP32:{ *:[f32] }:$src1, RFP32:{ *:[f32] }:$src2) 13338 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::DIV_Fp32, 13339 GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW, 13340 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 13341 // GIR_Coverage, 753, 13342 GIR_Done, 13343 // Label 1103: @29179 13344 GIM_Try, /*On fail goto*//*Label 1104*/ 29202, // Rule ID 1641 // 13345 GIM_CheckFeatures, GIFBS_UseAVX, 13346 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID, 13347 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID, 13348 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR32RegClassID, 13349 // (fdiv:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2) => (VDIVSSrr:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2) 13350 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VDIVSSrr, 13351 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 13352 // GIR_Coverage, 1641, 13353 GIR_Done, 13354 // Label 1104: @29202 13355 GIM_Try, /*On fail goto*//*Label 1105*/ 29225, // Rule ID 1645 // 13356 GIM_CheckFeatures, GIFBS_UseSSE1, 13357 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID, 13358 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID, 13359 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR32RegClassID, 13360 // (fdiv:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2) => (DIVSSrr:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2) 13361 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::DIVSSrr, 13362 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 13363 // GIR_Coverage, 1645, 13364 GIR_Done, 13365 // Label 1105: @29225 13366 GIM_Try, /*On fail goto*//*Label 1106*/ 29248, // Rule ID 5136 // 13367 GIM_CheckFeatures, GIFBS_HasAVX512, 13368 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32XRegClassID, 13369 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32XRegClassID, 13370 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR32XRegClassID, 13371 // (fdiv:{ *:[f32] } FR32X:{ *:[f32] }:$src1, FR32X:{ *:[f32] }:$src2) => (VDIVSSZrr:{ *:[f32] } FR32X:{ *:[f32] }:$src1, FR32X:{ *:[f32] }:$src2) 13372 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VDIVSSZrr, 13373 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 13374 // GIR_Coverage, 5136, 13375 GIR_Done, 13376 // Label 1106: @29248 13377 GIM_Reject, 13378 // Label 1102: @29249 13379 GIM_Reject, 13380 // Label 1093: @29250 13381 GIM_Try, /*On fail goto*//*Label 1107*/ 29356, 13382 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, 13383 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, 13384 GIM_Try, /*On fail goto*//*Label 1108*/ 29286, // Rule ID 754 // 13385 GIM_CheckFeatures, GIFBS_FPStackf64, 13386 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP64RegClassID, 13387 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP64RegClassID, 13388 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::RFP64RegClassID, 13389 // (fdiv:{ *:[f64] } RFP64:{ *:[f64] }:$src1, RFP64:{ *:[f64] }:$src2) => (DIV_Fp64:{ *:[f64] }:{ *:[i16] } RFP64:{ *:[f64] }:$src1, RFP64:{ *:[f64] }:$src2) 13390 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::DIV_Fp64, 13391 GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW, 13392 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 13393 // GIR_Coverage, 754, 13394 GIR_Done, 13395 // Label 1108: @29286 13396 GIM_Try, /*On fail goto*//*Label 1109*/ 29309, // Rule ID 1643 // 13397 GIM_CheckFeatures, GIFBS_UseAVX, 13398 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64RegClassID, 13399 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64RegClassID, 13400 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR64RegClassID, 13401 // (fdiv:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2) => (VDIVSDrr:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2) 13402 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VDIVSDrr, 13403 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 13404 // GIR_Coverage, 1643, 13405 GIR_Done, 13406 // Label 1109: @29309 13407 GIM_Try, /*On fail goto*//*Label 1110*/ 29332, // Rule ID 1647 // 13408 GIM_CheckFeatures, GIFBS_UseSSE2, 13409 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64RegClassID, 13410 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64RegClassID, 13411 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR64RegClassID, 13412 // (fdiv:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2) => (DIVSDrr:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2) 13413 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::DIVSDrr, 13414 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 13415 // GIR_Coverage, 1647, 13416 GIR_Done, 13417 // Label 1110: @29332 13418 GIM_Try, /*On fail goto*//*Label 1111*/ 29355, // Rule ID 5147 // 13419 GIM_CheckFeatures, GIFBS_HasAVX512, 13420 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64XRegClassID, 13421 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64XRegClassID, 13422 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR64XRegClassID, 13423 // (fdiv:{ *:[f64] } FR64X:{ *:[f64] }:$src1, FR64X:{ *:[f64] }:$src2) => (VDIVSDZrr:{ *:[f64] } FR64X:{ *:[f64] }:$src1, FR64X:{ *:[f64] }:$src2) 13424 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VDIVSDZrr, 13425 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 13426 // GIR_Coverage, 5147, 13427 GIR_Done, 13428 // Label 1111: @29355 13429 GIM_Reject, 13430 // Label 1107: @29356 13431 GIM_Reject, 13432 // Label 1094: @29357 13433 GIM_Try, /*On fail goto*//*Label 1112*/ 29389, // Rule ID 755 // 13434 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s80, 13435 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s80, 13436 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP80RegClassID, 13437 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP80RegClassID, 13438 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::RFP80RegClassID, 13439 // (fdiv:{ *:[f80] } RFP80:{ *:[f80] }:$src1, RFP80:{ *:[f80] }:$src2) => (DIV_Fp80:{ *:[f80] }:{ *:[i16] } RFP80:{ *:[f80] }:$src1, RFP80:{ *:[f80] }:$src2) 13440 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::DIV_Fp80, 13441 GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW, 13442 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 13443 // GIR_Coverage, 755, 13444 GIR_Done, 13445 // Label 1112: @29389 13446 GIM_Reject, 13447 // Label 1095: @29390 13448 GIM_Try, /*On fail goto*//*Label 1113*/ 29470, 13449 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64, 13450 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, 13451 GIM_Try, /*On fail goto*//*Label 1114*/ 29423, // Rule ID 1631 // 13452 GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, 13453 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 13454 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, 13455 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 13456 // (fdiv:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2) => (VDIVPDrr:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2) 13457 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VDIVPDrr, 13458 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 13459 // GIR_Coverage, 1631, 13460 GIR_Done, 13461 // Label 1114: @29423 13462 GIM_Try, /*On fail goto*//*Label 1115*/ 29446, // Rule ID 1639 // 13463 GIM_CheckFeatures, GIFBS_UseSSE2, 13464 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 13465 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, 13466 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 13467 // (fdiv:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2) => (DIVPDrr:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2) 13468 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::DIVPDrr, 13469 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 13470 // GIR_Coverage, 1639, 13471 GIR_Done, 13472 // Label 1115: @29446 13473 GIM_Try, /*On fail goto*//*Label 1116*/ 29469, // Rule ID 5420 // 13474 GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, 13475 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, 13476 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, 13477 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, 13478 // (fdiv:{ *:[v2f64] } VR128X:{ *:[v2f64] }:$src1, VR128X:{ *:[v2f64] }:$src2) => (VDIVPDZ128rr:{ *:[v2f64] } VR128X:{ *:[v2f64] }:$src1, VR128X:{ *:[v2f64] }:$src2) 13479 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VDIVPDZ128rr, 13480 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 13481 // GIR_Coverage, 5420, 13482 GIR_Done, 13483 // Label 1116: @29469 13484 GIM_Reject, 13485 // Label 1113: @29470 13486 GIM_Reject, 13487 // Label 1096: @29471 13488 GIM_Try, /*On fail goto*//*Label 1117*/ 29551, 13489 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, 13490 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, 13491 GIM_Try, /*On fail goto*//*Label 1118*/ 29504, // Rule ID 1629 // 13492 GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, 13493 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 13494 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, 13495 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 13496 // (fdiv:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2) => (VDIVPSrr:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2) 13497 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VDIVPSrr, 13498 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 13499 // GIR_Coverage, 1629, 13500 GIR_Done, 13501 // Label 1118: @29504 13502 GIM_Try, /*On fail goto*//*Label 1119*/ 29527, // Rule ID 1637 // 13503 GIM_CheckFeatures, GIFBS_UseSSE1, 13504 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 13505 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, 13506 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, 13507 // (fdiv:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2) => (DIVPSrr:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2) 13508 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::DIVPSrr, 13509 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 13510 // GIR_Coverage, 1637, 13511 GIR_Done, 13512 // Label 1119: @29527 13513 GIM_Try, /*On fail goto*//*Label 1120*/ 29550, // Rule ID 5402 // 13514 GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, 13515 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, 13516 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, 13517 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, 13518 // (fdiv:{ *:[v4f32] } VR128X:{ *:[v4f32] }:$src1, VR128X:{ *:[v4f32] }:$src2) => (VDIVPSZ128rr:{ *:[v4f32] } VR128X:{ *:[v4f32] }:$src1, VR128X:{ *:[v4f32] }:$src2) 13519 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VDIVPSZ128rr, 13520 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 13521 // GIR_Coverage, 5402, 13522 GIR_Done, 13523 // Label 1120: @29550 13524 GIM_Reject, 13525 // Label 1117: @29551 13526 GIM_Reject, 13527 // Label 1097: @29552 13528 GIM_Try, /*On fail goto*//*Label 1121*/ 29609, 13529 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64, 13530 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64, 13531 GIM_Try, /*On fail goto*//*Label 1122*/ 29585, // Rule ID 1635 // 13532 GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, 13533 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, 13534 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, 13535 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, 13536 // (fdiv:{ *:[v4f64] } VR256:{ *:[v4f64] }:$src1, VR256:{ *:[v4f64] }:$src2) => (VDIVPDYrr:{ *:[v4f64] } VR256:{ *:[v4f64] }:$src1, VR256:{ *:[v4f64] }:$src2) 13537 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VDIVPDYrr, 13538 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 13539 // GIR_Coverage, 1635, 13540 GIR_Done, 13541 // Label 1122: @29585 13542 GIM_Try, /*On fail goto*//*Label 1123*/ 29608, // Rule ID 5429 // 13543 GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, 13544 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, 13545 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, 13546 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, 13547 // (fdiv:{ *:[v4f64] } VR256X:{ *:[v4f64] }:$src1, VR256X:{ *:[v4f64] }:$src2) => (VDIVPDZ256rr:{ *:[v4f64] } VR256X:{ *:[v4f64] }:$src1, VR256X:{ *:[v4f64] }:$src2) 13548 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VDIVPDZ256rr, 13549 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 13550 // GIR_Coverage, 5429, 13551 GIR_Done, 13552 // Label 1123: @29608 13553 GIM_Reject, 13554 // Label 1121: @29609 13555 GIM_Reject, 13556 // Label 1098: @29610 13557 GIM_Try, /*On fail goto*//*Label 1124*/ 29667, 13558 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32, 13559 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s32, 13560 GIM_Try, /*On fail goto*//*Label 1125*/ 29643, // Rule ID 1633 // 13561 GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, 13562 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, 13563 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, 13564 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, 13565 // (fdiv:{ *:[v8f32] } VR256:{ *:[v8f32] }:$src1, VR256:{ *:[v8f32] }:$src2) => (VDIVPSYrr:{ *:[v8f32] } VR256:{ *:[v8f32] }:$src1, VR256:{ *:[v8f32] }:$src2) 13566 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VDIVPSYrr, 13567 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 13568 // GIR_Coverage, 1633, 13569 GIR_Done, 13570 // Label 1125: @29643 13571 GIM_Try, /*On fail goto*//*Label 1126*/ 29666, // Rule ID 5411 // 13572 GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, 13573 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, 13574 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, 13575 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, 13576 // (fdiv:{ *:[v8f32] } VR256X:{ *:[v8f32] }:$src1, VR256X:{ *:[v8f32] }:$src2) => (VDIVPSZ256rr:{ *:[v8f32] } VR256X:{ *:[v8f32] }:$src1, VR256X:{ *:[v8f32] }:$src2) 13577 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VDIVPSZ256rr, 13578 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 13579 // GIR_Coverage, 5411, 13580 GIR_Done, 13581 // Label 1126: @29666 13582 GIM_Reject, 13583 // Label 1124: @29667 13584 GIM_Reject, 13585 // Label 1099: @29668 13586 GIM_Try, /*On fail goto*//*Label 1127*/ 29699, // Rule ID 5393 // 13587 GIM_CheckFeatures, GIFBS_HasAVX512, 13588 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64, 13589 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s64, 13590 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, 13591 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, 13592 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, 13593 // (fdiv:{ *:[v8f64] } VR512:{ *:[v8f64] }:$src1, VR512:{ *:[v8f64] }:$src2) => (VDIVPDZrr:{ *:[v8f64] } VR512:{ *:[v8f64] }:$src1, VR512:{ *:[v8f64] }:$src2) 13594 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VDIVPDZrr, 13595 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 13596 // GIR_Coverage, 5393, 13597 GIR_Done, 13598 // Label 1127: @29699 13599 GIM_Reject, 13600 // Label 1100: @29700 13601 GIM_Try, /*On fail goto*//*Label 1128*/ 29731, // Rule ID 5384 // 13602 GIM_CheckFeatures, GIFBS_HasAVX512, 13603 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32, 13604 GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s32, 13605 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, 13606 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, 13607 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, 13608 // (fdiv:{ *:[v16f32] } VR512:{ *:[v16f32] }:$src1, VR512:{ *:[v16f32] }:$src2) => (VDIVPSZrr:{ *:[v16f32] } VR512:{ *:[v16f32] }:$src1, VR512:{ *:[v16f32] }:$src2) 13609 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VDIVPSZrr, 13610 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 13611 // GIR_Coverage, 5384, 13612 GIR_Done, 13613 // Label 1128: @29731 13614 GIM_Reject, 13615 // Label 1101: @29732 13616 GIM_Reject, 13617 // Label 22: @29733 13618 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/3, 6, /*)*//*default:*//*Label 1132*/ 29821, 13619 /*GILLT_s32*//*Label 1129*/ 29742, 13620 /*GILLT_s64*//*Label 1130*/ 29769, 13621 /*GILLT_s80*//*Label 1131*/ 29796, 13622 // Label 1129: @29742 13623 GIM_Try, /*On fail goto*//*Label 1133*/ 29768, // Rule ID 822 // 13624 GIM_CheckFeatures, GIFBS_FPStackf32, 13625 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, 13626 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP32RegClassID, 13627 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP32RegClassID, 13628 // (fneg:{ *:[f32] } RFP32:{ *:[f32] }:$src) => (CHS_Fp32:{ *:[f32] }:{ *:[i16] } RFP32:{ *:[f32] }:$src) 13629 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::CHS_Fp32, 13630 GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW, 13631 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 13632 // GIR_Coverage, 822, 13633 GIR_Done, 13634 // Label 1133: @29768 13635 GIM_Reject, 13636 // Label 1130: @29769 13637 GIM_Try, /*On fail goto*//*Label 1134*/ 29795, // Rule ID 823 // 13638 GIM_CheckFeatures, GIFBS_FPStackf64, 13639 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, 13640 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP64RegClassID, 13641 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP64RegClassID, 13642 // (fneg:{ *:[f64] } RFP64:{ *:[f64] }:$src) => (CHS_Fp64:{ *:[f64] }:{ *:[i16] } RFP64:{ *:[f64] }:$src) 13643 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::CHS_Fp64, 13644 GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW, 13645 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 13646 // GIR_Coverage, 823, 13647 GIR_Done, 13648 // Label 1134: @29795 13649 GIM_Reject, 13650 // Label 1131: @29796 13651 GIM_Try, /*On fail goto*//*Label 1135*/ 29820, // Rule ID 824 // 13652 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s80, 13653 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP80RegClassID, 13654 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP80RegClassID, 13655 // (fneg:{ *:[f80] } RFP80:{ *:[f80] }:$src) => (CHS_Fp80:{ *:[f80] }:{ *:[i16] } RFP80:{ *:[f80] }:$src) 13656 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::CHS_Fp80, 13657 GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW, 13658 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 13659 // GIR_Coverage, 824, 13660 GIR_Done, 13661 // Label 1135: @29820 13662 GIM_Reject, 13663 // Label 1132: @29821 13664 GIM_Reject, 13665 // Label 23: @29822 13666 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/4, 16, /*)*//*default:*//*Label 1140*/ 30097, 13667 /*GILLT_s64*//*Label 1136*/ 29840, 13668 /*GILLT_s80*//*Label 1137*/ 29976, 0, 0, 0, 0, 0, 13669 /*GILLT_v4s64*//*Label 1138*/ 30027, 0, 0, 0, 13670 /*GILLT_v8s64*//*Label 1139*/ 30073, 13671 // Label 1136: @29840 13672 GIM_Try, /*On fail goto*//*Label 1141*/ 29975, 13673 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, 13674 GIM_Try, /*On fail goto*//*Label 1142*/ 29865, // Rule ID 1407 // 13675 GIM_CheckFeatures, GIFBS_UseSSE2, 13676 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64RegClassID, 13677 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID, 13678 // (fpextend:{ *:[f64] } FR32:{ *:[f32] }:$src) => (CVTSS2SDrr:{ *:[f64] } FR32:{ *:[f32] }:$src) 13679 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::CVTSS2SDrr, 13680 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 13681 // GIR_Coverage, 1407, 13682 GIR_Done, 13683 // Label 1142: @29865 13684 GIM_Try, /*On fail goto*//*Label 1143*/ 29886, // Rule ID 12327 // 13685 GIM_CheckFeatures, GIFBS_FPStackf32, 13686 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP64RegClassID, 13687 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP32RegClassID, 13688 // (fpextend:{ *:[f64] } RFP32:{ *:[f32] }:$src) => (COPY_TO_REGCLASS:{ *:[f64] } RFP32:{ *:[f32] }:$src, RFP64:{ *:[i32] }) 13689 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/TargetOpcode::COPY, 13690 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC RFP64*/43, 13691 // GIR_Coverage, 12327, 13692 GIR_Done, 13693 // Label 1143: @29886 13694 GIM_Try, /*On fail goto*//*Label 1144*/ 29930, // Rule ID 12476 // 13695 GIM_CheckFeatures, GIFBS_UseAVX, 13696 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64RegClassID, 13697 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID, 13698 // (fpextend:{ *:[f64] } FR32:{ *:[f32] }:$src) => (VCVTSS2SDrr:{ *:[f64] } (IMPLICIT_DEF:{ *:[f64] }), FR32:{ *:[f32] }:$src) 13699 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64, 13700 GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::IMPLICIT_DEF, 13701 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, 13702 GIR_ConstrainSelectedInstOperands, /*InsnID*/1, 13703 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTSS2SDrr, 13704 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 13705 GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, 13706 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 13707 GIR_EraseFromParent, /*InsnID*/0, 13708 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 13709 // GIR_Coverage, 12476, 13710 GIR_Done, 13711 // Label 1144: @29930 13712 GIM_Try, /*On fail goto*//*Label 1145*/ 29974, // Rule ID 14867 // 13713 GIM_CheckFeatures, GIFBS_HasAVX512, 13714 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64XRegClassID, 13715 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32XRegClassID, 13716 // (fpextend:{ *:[f64] } FR32X:{ *:[f32] }:$src) => (VCVTSS2SDZrr:{ *:[f64] } (IMPLICIT_DEF:{ *:[f64] }), FR32X:{ *:[f32] }:$src) 13717 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64, 13718 GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::IMPLICIT_DEF, 13719 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, 13720 GIR_ConstrainSelectedInstOperands, /*InsnID*/1, 13721 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTSS2SDZrr, 13722 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 13723 GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, 13724 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 13725 GIR_EraseFromParent, /*InsnID*/0, 13726 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 13727 // GIR_Coverage, 14867, 13728 GIR_Done, 13729 // Label 1145: @29974 13730 GIM_Reject, 13731 // Label 1141: @29975 13732 GIM_Reject, 13733 // Label 1137: @29976 13734 GIM_Try, /*On fail goto*//*Label 1146*/ 30001, // Rule ID 12328 // 13735 GIM_CheckFeatures, GIFBS_FPStackf32, 13736 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, 13737 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP80RegClassID, 13738 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP32RegClassID, 13739 // (fpextend:{ *:[f80] } RFP32:{ *:[f32] }:$src) => (COPY_TO_REGCLASS:{ *:[f80] } RFP32:{ *:[f32] }:$src, RFP80:{ *:[i32] }) 13740 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/TargetOpcode::COPY, 13741 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC RFP80*/72, 13742 // GIR_Coverage, 12328, 13743 GIR_Done, 13744 // Label 1146: @30001 13745 GIM_Try, /*On fail goto*//*Label 1147*/ 30026, // Rule ID 12329 // 13746 GIM_CheckFeatures, GIFBS_FPStackf64, 13747 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, 13748 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP80RegClassID, 13749 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP64RegClassID, 13750 // (fpextend:{ *:[f80] } RFP64:{ *:[f64] }:$src) => (COPY_TO_REGCLASS:{ *:[f80] } RFP64:{ *:[f64] }:$src, RFP80:{ *:[i32] }) 13751 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/TargetOpcode::COPY, 13752 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC RFP80*/72, 13753 // GIR_Coverage, 12329, 13754 GIR_Done, 13755 // Label 1147: @30026 13756 GIM_Reject, 13757 // Label 1138: @30027 13758 GIM_Try, /*On fail goto*//*Label 1148*/ 30072, 13759 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, 13760 GIM_Try, /*On fail goto*//*Label 1149*/ 30052, // Rule ID 1435 // 13761 GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, 13762 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, 13763 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, 13764 // (fpextend:{ *:[v4f64] } VR128:{ *:[v4f32] }:$src) => (VCVTPS2PDYrr:{ *:[v4f64] } VR128:{ *:[v4f32] }:$src) 13765 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTPS2PDYrr, 13766 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 13767 // GIR_Coverage, 1435, 13768 GIR_Done, 13769 // Label 1149: @30052 13770 GIM_Try, /*On fail goto*//*Label 1150*/ 30071, // Rule ID 8159 // 13771 GIM_CheckFeatures, GIFBS_HasVLX, 13772 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, 13773 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, 13774 // (fpextend:{ *:[v4f64] } VR128X:{ *:[v4f32] }:$src) => (VCVTPS2PDZ256rr:{ *:[v4f64] } VR128X:{ *:[v4f32] }:$src) 13775 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTPS2PDZ256rr, 13776 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 13777 // GIR_Coverage, 8159, 13778 GIR_Done, 13779 // Label 1150: @30071 13780 GIM_Reject, 13781 // Label 1148: @30072 13782 GIM_Reject, 13783 // Label 1139: @30073 13784 GIM_Try, /*On fail goto*//*Label 1151*/ 30096, // Rule ID 8138 // 13785 GIM_CheckFeatures, GIFBS_HasAVX512, 13786 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32, 13787 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, 13788 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, 13789 // (fpextend:{ *:[v8f64] } VR256X:{ *:[v8f32] }:$src) => (VCVTPS2PDZrr:{ *:[v8f64] } VR256X:{ *:[v8f32] }:$src) 13790 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTPS2PDZrr, 13791 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 13792 // GIR_Coverage, 8138, 13793 GIR_Done, 13794 // Label 1151: @30096 13795 GIM_Reject, 13796 // Label 1140: @30097 13797 GIM_Reject, 13798 // Label 24: @30098 13799 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/3, 15, /*)*//*default:*//*Label 1156*/ 30382, 13800 /*GILLT_s32*//*Label 1152*/ 30116, 13801 /*GILLT_s64*//*Label 1153*/ 30286, 0, 0, 0, 0, 0, 13802 /*GILLT_v4s32*//*Label 1154*/ 30312, 0, 0, 0, 13803 /*GILLT_v8s32*//*Label 1155*/ 30358, 13804 // Label 1152: @30116 13805 GIM_Try, /*On fail goto*//*Label 1157*/ 30139, // Rule ID 1401 // 13806 GIM_CheckFeatures, GIFBS_UseSSE2, 13807 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, 13808 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID, 13809 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64RegClassID, 13810 // (fpround:{ *:[f32] } FR64:{ *:[f64] }:$src) => (CVTSD2SSrr:{ *:[f32] } FR64:{ *:[f64] }:$src) 13811 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::CVTSD2SSrr, 13812 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 13813 // GIR_Coverage, 1401, 13814 GIR_Done, 13815 // Label 1157: @30139 13816 GIM_Try, /*On fail goto*//*Label 1158*/ 30164, // Rule ID 12330 // 13817 GIM_CheckFeatures, GIFBS_FPStackf32, 13818 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, 13819 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP32RegClassID, 13820 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP64RegClassID, 13821 // (fpround:{ *:[f32] } RFP64:{ *:[f64] }:$src) => (COPY_TO_REGCLASS:{ *:[f32] } RFP64:{ *:[f64] }:$src, RFP32:{ *:[i32] }) 13822 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/TargetOpcode::COPY, 13823 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC RFP32*/33, 13824 // GIR_Coverage, 12330, 13825 GIR_Done, 13826 // Label 1158: @30164 13827 GIM_Try, /*On fail goto*//*Label 1159*/ 30189, // Rule ID 12331 // 13828 GIM_CheckFeatures, GIFBS_FPStackf32, 13829 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s80, 13830 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP32RegClassID, 13831 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP80RegClassID, 13832 // (fpround:{ *:[f32] } RFP80:{ *:[f80] }:$src) => (COPY_TO_REGCLASS:{ *:[f32] } RFP80:{ *:[f80] }:$src, RFP32:{ *:[i32] }) 13833 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/TargetOpcode::COPY, 13834 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC RFP32*/33, 13835 // GIR_Coverage, 12331, 13836 GIR_Done, 13837 // Label 1159: @30189 13838 GIM_Try, /*On fail goto*//*Label 1160*/ 30237, // Rule ID 12475 // 13839 GIM_CheckFeatures, GIFBS_UseAVX, 13840 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, 13841 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID, 13842 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64RegClassID, 13843 // (fpround:{ *:[f32] } FR64:{ *:[f64] }:$src) => (VCVTSD2SSrr:{ *:[f32] } (IMPLICIT_DEF:{ *:[f32] }), FR64:{ *:[f64] }:$src) 13844 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, 13845 GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::IMPLICIT_DEF, 13846 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, 13847 GIR_ConstrainSelectedInstOperands, /*InsnID*/1, 13848 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTSD2SSrr, 13849 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 13850 GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, 13851 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 13852 GIR_EraseFromParent, /*InsnID*/0, 13853 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 13854 // GIR_Coverage, 12475, 13855 GIR_Done, 13856 // Label 1160: @30237 13857 GIM_Try, /*On fail goto*//*Label 1161*/ 30285, // Rule ID 14871 // 13858 GIM_CheckFeatures, GIFBS_HasAVX512, 13859 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, 13860 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32XRegClassID, 13861 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64XRegClassID, 13862 // (fpround:{ *:[f32] } FR64X:{ *:[f64] }:$src) => (VCVTSD2SSZrr:{ *:[f32] } (IMPLICIT_DEF:{ *:[f32] }), FR64X:{ *:[f64] }:$src) 13863 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, 13864 GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::IMPLICIT_DEF, 13865 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, 13866 GIR_ConstrainSelectedInstOperands, /*InsnID*/1, 13867 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTSD2SSZrr, 13868 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 13869 GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, 13870 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 13871 GIR_EraseFromParent, /*InsnID*/0, 13872 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 13873 // GIR_Coverage, 14871, 13874 GIR_Done, 13875 // Label 1161: @30285 13876 GIM_Reject, 13877 // Label 1153: @30286 13878 GIM_Try, /*On fail goto*//*Label 1162*/ 30311, // Rule ID 12332 // 13879 GIM_CheckFeatures, GIFBS_FPStackf64, 13880 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s80, 13881 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP64RegClassID, 13882 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP80RegClassID, 13883 // (fpround:{ *:[f64] } RFP80:{ *:[f80] }:$src) => (COPY_TO_REGCLASS:{ *:[f64] } RFP80:{ *:[f80] }:$src, RFP64:{ *:[i32] }) 13884 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/TargetOpcode::COPY, 13885 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC RFP64*/43, 13886 // GIR_Coverage, 12332, 13887 GIR_Done, 13888 // Label 1162: @30311 13889 GIM_Reject, 13890 // Label 1154: @30312 13891 GIM_Try, /*On fail goto*//*Label 1163*/ 30357, 13892 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64, 13893 GIM_Try, /*On fail goto*//*Label 1164*/ 30337, // Rule ID 1447 // 13894 GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, 13895 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 13896 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, 13897 // (fpround:{ *:[v4f32] } VR256:{ *:[v4f64] }:$src) => (VCVTPD2PSYrr:{ *:[v4f32] } VR256:{ *:[v4f64] }:$src) 13898 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTPD2PSYrr, 13899 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 13900 // GIR_Coverage, 1447, 13901 GIR_Done, 13902 // Label 1164: @30337 13903 GIM_Try, /*On fail goto*//*Label 1165*/ 30356, // Rule ID 8129 // 13904 GIM_CheckFeatures, GIFBS_HasVLX, 13905 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, 13906 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, 13907 // (fpround:{ *:[v4f32] } VR256X:{ *:[v4f64] }:$src) => (VCVTPD2PSZ256rr:{ *:[v4f32] } VR256X:{ *:[v4f64] }:$src) 13908 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTPD2PSZ256rr, 13909 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 13910 // GIR_Coverage, 8129, 13911 GIR_Done, 13912 // Label 1165: @30356 13913 GIM_Reject, 13914 // Label 1163: @30357 13915 GIM_Reject, 13916 // Label 1155: @30358 13917 GIM_Try, /*On fail goto*//*Label 1166*/ 30381, // Rule ID 8108 // 13918 GIM_CheckFeatures, GIFBS_HasAVX512, 13919 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64, 13920 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, 13921 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, 13922 // (fpround:{ *:[v8f32] } VR512:{ *:[v8f64] }:$src) => (VCVTPD2PSZrr:{ *:[v8f32] } VR512:{ *:[v8f64] }:$src) 13923 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTPD2PSZrr, 13924 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 13925 // GIR_Coverage, 8108, 13926 GIR_Done, 13927 // Label 1166: @30381 13928 GIM_Reject, 13929 // Label 1156: @30382 13930 GIM_Reject, 13931 // Label 25: @30383 13932 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/3, 20, /*)*//*default:*//*Label 1175*/ 31012, 13933 /*GILLT_s32*//*Label 1167*/ 30406, 13934 /*GILLT_s64*//*Label 1168*/ 30545, 0, 0, 0, 13935 /*GILLT_v2s64*//*Label 1169*/ 30684, 0, 13936 /*GILLT_v4s32*//*Label 1170*/ 30708, 13937 /*GILLT_v4s64*//*Label 1171*/ 30824, 0, 0, 13938 /*GILLT_v8s32*//*Label 1172*/ 30871, 13939 /*GILLT_v8s64*//*Label 1173*/ 30941, 0, 0, 0, 13940 /*GILLT_v16s32*//*Label 1174*/ 30988, 13941 // Label 1167: @30406 13942 GIM_Try, /*On fail goto*//*Label 1176*/ 30429, // Rule ID 1339 // 13943 GIM_CheckFeatures, GIFBS_UseAVX, 13944 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, 13945 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, 13946 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID, 13947 // (fp_to_sint:{ *:[i32] } FR32:{ *:[f32] }:$src) => (VCVTTSS2SIrr:{ *:[i32] } FR32:{ *:[f32] }:$src) 13948 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTTSS2SIrr, 13949 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 13950 // GIR_Coverage, 1339, 13951 GIR_Done, 13952 // Label 1176: @30429 13953 GIM_Try, /*On fail goto*//*Label 1177*/ 30452, // Rule ID 1343 // 13954 GIM_CheckFeatures, GIFBS_UseAVX, 13955 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, 13956 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, 13957 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64RegClassID, 13958 // (fp_to_sint:{ *:[i32] } FR64:{ *:[f64] }:$src) => (VCVTTSD2SIrr:{ *:[i32] } FR64:{ *:[f64] }:$src) 13959 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTTSD2SIrr, 13960 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 13961 // GIR_Coverage, 1343, 13962 GIR_Done, 13963 // Label 1177: @30452 13964 GIM_Try, /*On fail goto*//*Label 1178*/ 30475, // Rule ID 1347 // 13965 GIM_CheckFeatures, GIFBS_UseSSE1, 13966 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, 13967 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, 13968 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID, 13969 // (fp_to_sint:{ *:[i32] } FR32:{ *:[f32] }:$src) => (CVTTSS2SIrr:{ *:[i32] } FR32:{ *:[f32] }:$src) 13970 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::CVTTSS2SIrr, 13971 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 13972 // GIR_Coverage, 1347, 13973 GIR_Done, 13974 // Label 1178: @30475 13975 GIM_Try, /*On fail goto*//*Label 1179*/ 30498, // Rule ID 1351 // 13976 GIM_CheckFeatures, GIFBS_UseSSE2, 13977 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, 13978 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, 13979 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64RegClassID, 13980 // (fp_to_sint:{ *:[i32] } FR64:{ *:[f64] }:$src) => (CVTTSD2SIrr:{ *:[i32] } FR64:{ *:[f64] }:$src) 13981 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::CVTTSD2SIrr, 13982 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 13983 // GIR_Coverage, 1351, 13984 GIR_Done, 13985 // Label 1179: @30498 13986 GIM_Try, /*On fail goto*//*Label 1180*/ 30521, // Rule ID 8050 // 13987 GIM_CheckFeatures, GIFBS_HasAVX512, 13988 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, 13989 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, 13990 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32XRegClassID, 13991 // (fp_to_sint:{ *:[i32] } FR32X:{ *:[f32] }:$src) => (VCVTTSS2SIZrr:{ *:[i32] } FR32X:{ *:[f32] }:$src) 13992 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTTSS2SIZrr, 13993 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 13994 // GIR_Coverage, 8050, 13995 GIR_Done, 13996 // Label 1180: @30521 13997 GIM_Try, /*On fail goto*//*Label 1181*/ 30544, // Rule ID 8060 // 13998 GIM_CheckFeatures, GIFBS_HasAVX512, 13999 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, 14000 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, 14001 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64XRegClassID, 14002 // (fp_to_sint:{ *:[i32] } FR64X:{ *:[f64] }:$src) => (VCVTTSD2SIZrr:{ *:[i32] } FR64X:{ *:[f64] }:$src) 14003 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTTSD2SIZrr, 14004 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 14005 // GIR_Coverage, 8060, 14006 GIR_Done, 14007 // Label 1181: @30544 14008 GIM_Reject, 14009 // Label 1168: @30545 14010 GIM_Try, /*On fail goto*//*Label 1182*/ 30568, // Rule ID 1341 // 14011 GIM_CheckFeatures, GIFBS_UseAVX, 14012 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, 14013 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, 14014 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID, 14015 // (fp_to_sint:{ *:[i64] } FR32:{ *:[f32] }:$src) => (VCVTTSS2SI64rr:{ *:[i64] } FR32:{ *:[f32] }:$src) 14016 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTTSS2SI64rr, 14017 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 14018 // GIR_Coverage, 1341, 14019 GIR_Done, 14020 // Label 1182: @30568 14021 GIM_Try, /*On fail goto*//*Label 1183*/ 30591, // Rule ID 1345 // 14022 GIM_CheckFeatures, GIFBS_UseAVX, 14023 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, 14024 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, 14025 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64RegClassID, 14026 // (fp_to_sint:{ *:[i64] } FR64:{ *:[f64] }:$src) => (VCVTTSD2SI64rr:{ *:[i64] } FR64:{ *:[f64] }:$src) 14027 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTTSD2SI64rr, 14028 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 14029 // GIR_Coverage, 1345, 14030 GIR_Done, 14031 // Label 1183: @30591 14032 GIM_Try, /*On fail goto*//*Label 1184*/ 30614, // Rule ID 1349 // 14033 GIM_CheckFeatures, GIFBS_UseSSE1, 14034 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, 14035 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, 14036 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID, 14037 // (fp_to_sint:{ *:[i64] } FR32:{ *:[f32] }:$src) => (CVTTSS2SI64rr:{ *:[i64] } FR32:{ *:[f32] }:$src) 14038 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::CVTTSS2SI64rr, 14039 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 14040 // GIR_Coverage, 1349, 14041 GIR_Done, 14042 // Label 1184: @30614 14043 GIM_Try, /*On fail goto*//*Label 1185*/ 30637, // Rule ID 1353 // 14044 GIM_CheckFeatures, GIFBS_UseSSE2, 14045 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, 14046 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, 14047 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64RegClassID, 14048 // (fp_to_sint:{ *:[i64] } FR64:{ *:[f64] }:$src) => (CVTTSD2SI64rr:{ *:[i64] } FR64:{ *:[f64] }:$src) 14049 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::CVTTSD2SI64rr, 14050 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 14051 // GIR_Coverage, 1353, 14052 GIR_Done, 14053 // Label 1185: @30637 14054 GIM_Try, /*On fail goto*//*Label 1186*/ 30660, // Rule ID 8055 // 14055 GIM_CheckFeatures, GIFBS_HasAVX512, 14056 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, 14057 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, 14058 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32XRegClassID, 14059 // (fp_to_sint:{ *:[i64] } FR32X:{ *:[f32] }:$src) => (VCVTTSS2SI64Zrr:{ *:[i64] } FR32X:{ *:[f32] }:$src) 14060 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTTSS2SI64Zrr, 14061 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 14062 // GIR_Coverage, 8055, 14063 GIR_Done, 14064 // Label 1186: @30660 14065 GIM_Try, /*On fail goto*//*Label 1187*/ 30683, // Rule ID 8065 // 14066 GIM_CheckFeatures, GIFBS_HasAVX512, 14067 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, 14068 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, 14069 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64XRegClassID, 14070 // (fp_to_sint:{ *:[i64] } FR64X:{ *:[f64] }:$src) => (VCVTTSD2SI64Zrr:{ *:[i64] } FR64X:{ *:[f64] }:$src) 14071 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTTSD2SI64Zrr, 14072 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 14073 // GIR_Coverage, 8065, 14074 GIR_Done, 14075 // Label 1187: @30683 14076 GIM_Reject, 14077 // Label 1169: @30684 14078 GIM_Try, /*On fail goto*//*Label 1188*/ 30707, // Rule ID 14911 // 14079 GIM_CheckFeatures, GIFBS_HasDQI_HasVLX, 14080 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64, 14081 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, 14082 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, 14083 // (fp_to_sint:{ *:[v2i64] } VR128X:{ *:[v2f64] }:$src) => (VCVTTPD2QQZ128rr:{ *:[v2i64] } VR128X:{ *:[v2f64] }:$src) 14084 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTTPD2QQZ128rr, 14085 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 14086 // GIR_Coverage, 14911, 14087 GIR_Done, 14088 // Label 1188: @30707 14089 GIM_Reject, 14090 // Label 1170: @30708 14091 GIM_Try, /*On fail goto*//*Label 1189*/ 30731, // Rule ID 12502 // 14092 GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, 14093 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, 14094 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 14095 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, 14096 // (fp_to_sint:{ *:[v4i32] } VR128:{ *:[v4f32] }:$src) => (VCVTTPS2DQrr:{ *:[v4i32] } VR128:{ *:[v4f32] }:$src) 14097 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTTPS2DQrr, 14098 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 14099 // GIR_Coverage, 12502, 14100 GIR_Done, 14101 // Label 1189: @30731 14102 GIM_Try, /*On fail goto*//*Label 1190*/ 30754, // Rule ID 12506 // 14103 GIM_CheckFeatures, GIFBS_UseSSE2, 14104 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, 14105 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 14106 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, 14107 // (fp_to_sint:{ *:[v4i32] } VR128:{ *:[v4f32] }:$src) => (CVTTPS2DQrr:{ *:[v4i32] } VR128:{ *:[v4f32] }:$src) 14108 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::CVTTPS2DQrr, 14109 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 14110 // GIR_Coverage, 12506, 14111 GIR_Done, 14112 // Label 1190: @30754 14113 GIM_Try, /*On fail goto*//*Label 1191*/ 30777, // Rule ID 12508 // 14114 GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, 14115 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64, 14116 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 14117 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, 14118 // (fp_to_sint:{ *:[v4i32] } VR256:{ *:[v4f64] }:$src) => (VCVTTPD2DQYrr:{ *:[v4i32] } VR256:{ *:[v4f64] }:$src) 14119 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTTPD2DQYrr, 14120 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 14121 // GIR_Coverage, 12508, 14122 GIR_Done, 14123 // Label 1191: @30777 14124 GIM_Try, /*On fail goto*//*Label 1192*/ 30800, // Rule ID 14887 // 14125 GIM_CheckFeatures, GIFBS_HasVLX, 14126 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, 14127 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, 14128 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, 14129 // (fp_to_sint:{ *:[v4i32] } VR128X:{ *:[v4f32] }:$src) => (VCVTTPS2DQZ128rr:{ *:[v4i32] } VR128X:{ *:[v4f32] }:$src) 14130 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTTPS2DQZ128rr, 14131 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 14132 // GIR_Coverage, 14887, 14133 GIR_Done, 14134 // Label 1192: @30800 14135 GIM_Try, /*On fail goto*//*Label 1193*/ 30823, // Rule ID 14895 // 14136 GIM_CheckFeatures, GIFBS_HasVLX, 14137 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64, 14138 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, 14139 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, 14140 // (fp_to_sint:{ *:[v4i32] } VR256X:{ *:[v4f64] }:$src) => (VCVTTPD2DQZ256rr:{ *:[v4i32] } VR256X:{ *:[v4f64] }:$src) 14141 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTTPD2DQZ256rr, 14142 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 14143 // GIR_Coverage, 14895, 14144 GIR_Done, 14145 // Label 1193: @30823 14146 GIM_Reject, 14147 // Label 1171: @30824 14148 GIM_Try, /*On fail goto*//*Label 1194*/ 30847, // Rule ID 14907 // 14149 GIM_CheckFeatures, GIFBS_HasDQI_HasVLX, 14150 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, 14151 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, 14152 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, 14153 // (fp_to_sint:{ *:[v4i64] } VR128X:{ *:[v4f32] }:$src) => (VCVTTPS2QQZ256rr:{ *:[v4i64] } VR128X:{ *:[v4f32] }:$src) 14154 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTTPS2QQZ256rr, 14155 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 14156 // GIR_Coverage, 14907, 14157 GIR_Done, 14158 // Label 1194: @30847 14159 GIM_Try, /*On fail goto*//*Label 1195*/ 30870, // Rule ID 14915 // 14160 GIM_CheckFeatures, GIFBS_HasDQI_HasVLX, 14161 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64, 14162 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, 14163 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, 14164 // (fp_to_sint:{ *:[v4i64] } VR256X:{ *:[v4f64] }:$src) => (VCVTTPD2QQZ256rr:{ *:[v4i64] } VR256X:{ *:[v4f64] }:$src) 14165 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTTPD2QQZ256rr, 14166 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 14167 // GIR_Coverage, 14915, 14168 GIR_Done, 14169 // Label 1195: @30870 14170 GIM_Reject, 14171 // Label 1172: @30871 14172 GIM_Try, /*On fail goto*//*Label 1196*/ 30894, // Rule ID 12504 // 14173 GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, 14174 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32, 14175 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, 14176 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, 14177 // (fp_to_sint:{ *:[v8i32] } VR256:{ *:[v8f32] }:$src) => (VCVTTPS2DQYrr:{ *:[v8i32] } VR256:{ *:[v8f32] }:$src) 14178 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTTPS2DQYrr, 14179 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 14180 // GIR_Coverage, 12504, 14181 GIR_Done, 14182 // Label 1196: @30894 14183 GIM_Try, /*On fail goto*//*Label 1197*/ 30917, // Rule ID 14883 // 14184 GIM_CheckFeatures, GIFBS_HasAVX512, 14185 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64, 14186 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, 14187 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, 14188 // (fp_to_sint:{ *:[v8i32] } VR512:{ *:[v8f64] }:$src) => (VCVTTPD2DQZrr:{ *:[v8i32] } VR512:{ *:[v8f64] }:$src) 14189 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTTPD2DQZrr, 14190 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 14191 // GIR_Coverage, 14883, 14192 GIR_Done, 14193 // Label 1197: @30917 14194 GIM_Try, /*On fail goto*//*Label 1198*/ 30940, // Rule ID 14891 // 14195 GIM_CheckFeatures, GIFBS_HasVLX, 14196 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32, 14197 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, 14198 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, 14199 // (fp_to_sint:{ *:[v8i32] } VR256X:{ *:[v8f32] }:$src) => (VCVTTPS2DQZ256rr:{ *:[v8i32] } VR256X:{ *:[v8f32] }:$src) 14200 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTTPS2DQZ256rr, 14201 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 14202 // GIR_Coverage, 14891, 14203 GIR_Done, 14204 // Label 1198: @30940 14205 GIM_Reject, 14206 // Label 1173: @30941 14207 GIM_Try, /*On fail goto*//*Label 1199*/ 30964, // Rule ID 14899 // 14208 GIM_CheckFeatures, GIFBS_HasDQI, 14209 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32, 14210 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, 14211 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, 14212 // (fp_to_sint:{ *:[v8i64] } VR256X:{ *:[v8f32] }:$src) => (VCVTTPS2QQZrr:{ *:[v8i64] } VR256X:{ *:[v8f32] }:$src) 14213 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTTPS2QQZrr, 14214 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 14215 // GIR_Coverage, 14899, 14216 GIR_Done, 14217 // Label 1199: @30964 14218 GIM_Try, /*On fail goto*//*Label 1200*/ 30987, // Rule ID 14903 // 14219 GIM_CheckFeatures, GIFBS_HasDQI, 14220 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64, 14221 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, 14222 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, 14223 // (fp_to_sint:{ *:[v8i64] } VR512:{ *:[v8f64] }:$src) => (VCVTTPD2QQZrr:{ *:[v8i64] } VR512:{ *:[v8f64] }:$src) 14224 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTTPD2QQZrr, 14225 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 14226 // GIR_Coverage, 14903, 14227 GIR_Done, 14228 // Label 1200: @30987 14229 GIM_Reject, 14230 // Label 1174: @30988 14231 GIM_Try, /*On fail goto*//*Label 1201*/ 31011, // Rule ID 14879 // 14232 GIM_CheckFeatures, GIFBS_HasAVX512, 14233 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32, 14234 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, 14235 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, 14236 // (fp_to_sint:{ *:[v16i32] } VR512:{ *:[v16f32] }:$src) => (VCVTTPS2DQZrr:{ *:[v16i32] } VR512:{ *:[v16f32] }:$src) 14237 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTTPS2DQZrr, 14238 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 14239 // GIR_Coverage, 14879, 14240 GIR_Done, 14241 // Label 1201: @31011 14242 GIM_Reject, 14243 // Label 1175: @31012 14244 GIM_Reject, 14245 // Label 26: @31013 14246 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/3, 20, /*)*//*default:*//*Label 1210*/ 31366, 14247 /*GILLT_s32*//*Label 1202*/ 31036, 14248 /*GILLT_s64*//*Label 1203*/ 31083, 0, 0, 0, 14249 /*GILLT_v2s64*//*Label 1204*/ 31130, 0, 14250 /*GILLT_v4s32*//*Label 1205*/ 31154, 14251 /*GILLT_v4s64*//*Label 1206*/ 31201, 0, 0, 14252 /*GILLT_v8s32*//*Label 1207*/ 31248, 14253 /*GILLT_v8s64*//*Label 1208*/ 31295, 0, 0, 0, 14254 /*GILLT_v16s32*//*Label 1209*/ 31342, 14255 // Label 1202: @31036 14256 GIM_Try, /*On fail goto*//*Label 1211*/ 31059, // Rule ID 8070 // 14257 GIM_CheckFeatures, GIFBS_HasAVX512, 14258 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, 14259 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, 14260 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32XRegClassID, 14261 // (fp_to_uint:{ *:[i32] } FR32X:{ *:[f32] }:$src) => (VCVTTSS2USIZrr:{ *:[i32] } FR32X:{ *:[f32] }:$src) 14262 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTTSS2USIZrr, 14263 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 14264 // GIR_Coverage, 8070, 14265 GIR_Done, 14266 // Label 1211: @31059 14267 GIM_Try, /*On fail goto*//*Label 1212*/ 31082, // Rule ID 8080 // 14268 GIM_CheckFeatures, GIFBS_HasAVX512, 14269 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, 14270 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, 14271 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64XRegClassID, 14272 // (fp_to_uint:{ *:[i32] } FR64X:{ *:[f64] }:$src) => (VCVTTSD2USIZrr:{ *:[i32] } FR64X:{ *:[f64] }:$src) 14273 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTTSD2USIZrr, 14274 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 14275 // GIR_Coverage, 8080, 14276 GIR_Done, 14277 // Label 1212: @31082 14278 GIM_Reject, 14279 // Label 1203: @31083 14280 GIM_Try, /*On fail goto*//*Label 1213*/ 31106, // Rule ID 8075 // 14281 GIM_CheckFeatures, GIFBS_HasAVX512, 14282 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, 14283 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, 14284 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32XRegClassID, 14285 // (fp_to_uint:{ *:[i64] } FR32X:{ *:[f32] }:$src) => (VCVTTSS2USI64Zrr:{ *:[i64] } FR32X:{ *:[f32] }:$src) 14286 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTTSS2USI64Zrr, 14287 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 14288 // GIR_Coverage, 8075, 14289 GIR_Done, 14290 // Label 1213: @31106 14291 GIM_Try, /*On fail goto*//*Label 1214*/ 31129, // Rule ID 8085 // 14292 GIM_CheckFeatures, GIFBS_HasAVX512, 14293 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, 14294 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, 14295 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64XRegClassID, 14296 // (fp_to_uint:{ *:[i64] } FR64X:{ *:[f64] }:$src) => (VCVTTSD2USI64Zrr:{ *:[i64] } FR64X:{ *:[f64] }:$src) 14297 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTTSD2USI64Zrr, 14298 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 14299 // GIR_Coverage, 8085, 14300 GIR_Done, 14301 // Label 1214: @31129 14302 GIM_Reject, 14303 // Label 1204: @31130 14304 GIM_Try, /*On fail goto*//*Label 1215*/ 31153, // Rule ID 14913 // 14305 GIM_CheckFeatures, GIFBS_HasDQI_HasVLX, 14306 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64, 14307 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, 14308 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, 14309 // (fp_to_uint:{ *:[v2i64] } VR128X:{ *:[v2f64] }:$src) => (VCVTTPD2UQQZ128rr:{ *:[v2i64] } VR128X:{ *:[v2f64] }:$src) 14310 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTTPD2UQQZ128rr, 14311 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 14312 // GIR_Coverage, 14913, 14313 GIR_Done, 14314 // Label 1215: @31153 14315 GIM_Reject, 14316 // Label 1205: @31154 14317 GIM_Try, /*On fail goto*//*Label 1216*/ 31177, // Rule ID 14889 // 14318 GIM_CheckFeatures, GIFBS_HasVLX, 14319 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, 14320 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, 14321 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, 14322 // (fp_to_uint:{ *:[v4i32] } VR128X:{ *:[v4f32] }:$src) => (VCVTTPS2UDQZ128rr:{ *:[v4i32] } VR128X:{ *:[v4f32] }:$src) 14323 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTTPS2UDQZ128rr, 14324 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 14325 // GIR_Coverage, 14889, 14326 GIR_Done, 14327 // Label 1216: @31177 14328 GIM_Try, /*On fail goto*//*Label 1217*/ 31200, // Rule ID 14897 // 14329 GIM_CheckFeatures, GIFBS_HasVLX, 14330 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64, 14331 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, 14332 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, 14333 // (fp_to_uint:{ *:[v4i32] } VR256X:{ *:[v4f64] }:$src) => (VCVTTPD2UDQZ256rr:{ *:[v4i32] } VR256X:{ *:[v4f64] }:$src) 14334 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTTPD2UDQZ256rr, 14335 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 14336 // GIR_Coverage, 14897, 14337 GIR_Done, 14338 // Label 1217: @31200 14339 GIM_Reject, 14340 // Label 1206: @31201 14341 GIM_Try, /*On fail goto*//*Label 1218*/ 31224, // Rule ID 14909 // 14342 GIM_CheckFeatures, GIFBS_HasDQI_HasVLX, 14343 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, 14344 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, 14345 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, 14346 // (fp_to_uint:{ *:[v4i64] } VR128X:{ *:[v4f32] }:$src) => (VCVTTPS2UQQZ256rr:{ *:[v4i64] } VR128X:{ *:[v4f32] }:$src) 14347 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTTPS2UQQZ256rr, 14348 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 14349 // GIR_Coverage, 14909, 14350 GIR_Done, 14351 // Label 1218: @31224 14352 GIM_Try, /*On fail goto*//*Label 1219*/ 31247, // Rule ID 14917 // 14353 GIM_CheckFeatures, GIFBS_HasDQI_HasVLX, 14354 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64, 14355 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, 14356 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, 14357 // (fp_to_uint:{ *:[v4i64] } VR256X:{ *:[v4f64] }:$src) => (VCVTTPD2UQQZ256rr:{ *:[v4i64] } VR256X:{ *:[v4f64] }:$src) 14358 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTTPD2UQQZ256rr, 14359 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 14360 // GIR_Coverage, 14917, 14361 GIR_Done, 14362 // Label 1219: @31247 14363 GIM_Reject, 14364 // Label 1207: @31248 14365 GIM_Try, /*On fail goto*//*Label 1220*/ 31271, // Rule ID 14885 // 14366 GIM_CheckFeatures, GIFBS_HasAVX512, 14367 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64, 14368 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, 14369 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, 14370 // (fp_to_uint:{ *:[v8i32] } VR512:{ *:[v8f64] }:$src) => (VCVTTPD2UDQZrr:{ *:[v8i32] } VR512:{ *:[v8f64] }:$src) 14371 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTTPD2UDQZrr, 14372 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 14373 // GIR_Coverage, 14885, 14374 GIR_Done, 14375 // Label 1220: @31271 14376 GIM_Try, /*On fail goto*//*Label 1221*/ 31294, // Rule ID 14893 // 14377 GIM_CheckFeatures, GIFBS_HasVLX, 14378 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32, 14379 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, 14380 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, 14381 // (fp_to_uint:{ *:[v8i32] } VR256X:{ *:[v8f32] }:$src) => (VCVTTPS2UDQZ256rr:{ *:[v8i32] } VR256X:{ *:[v8f32] }:$src) 14382 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTTPS2UDQZ256rr, 14383 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 14384 // GIR_Coverage, 14893, 14385 GIR_Done, 14386 // Label 1221: @31294 14387 GIM_Reject, 14388 // Label 1208: @31295 14389 GIM_Try, /*On fail goto*//*Label 1222*/ 31318, // Rule ID 14901 // 14390 GIM_CheckFeatures, GIFBS_HasDQI, 14391 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32, 14392 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, 14393 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, 14394 // (fp_to_uint:{ *:[v8i64] } VR256X:{ *:[v8f32] }:$src) => (VCVTTPS2UQQZrr:{ *:[v8i64] } VR256X:{ *:[v8f32] }:$src) 14395 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTTPS2UQQZrr, 14396 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 14397 // GIR_Coverage, 14901, 14398 GIR_Done, 14399 // Label 1222: @31318 14400 GIM_Try, /*On fail goto*//*Label 1223*/ 31341, // Rule ID 14905 // 14401 GIM_CheckFeatures, GIFBS_HasDQI, 14402 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64, 14403 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, 14404 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, 14405 // (fp_to_uint:{ *:[v8i64] } VR512:{ *:[v8f64] }:$src) => (VCVTTPD2UQQZrr:{ *:[v8i64] } VR512:{ *:[v8f64] }:$src) 14406 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTTPD2UQQZrr, 14407 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 14408 // GIR_Coverage, 14905, 14409 GIR_Done, 14410 // Label 1223: @31341 14411 GIM_Reject, 14412 // Label 1209: @31342 14413 GIM_Try, /*On fail goto*//*Label 1224*/ 31365, // Rule ID 14881 // 14414 GIM_CheckFeatures, GIFBS_HasAVX512, 14415 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32, 14416 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, 14417 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, 14418 // (fp_to_uint:{ *:[v16i32] } VR512:{ *:[v16f32] }:$src) => (VCVTTPS2UDQZrr:{ *:[v16i32] } VR512:{ *:[v16f32] }:$src) 14419 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTTPS2UDQZrr, 14420 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 14421 // GIR_Coverage, 14881, 14422 GIR_Done, 14423 // Label 1224: @31365 14424 GIM_Reject, 14425 // Label 1210: @31366 14426 GIM_Reject, 14427 // Label 27: @31367 14428 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/3, 20, /*)*//*default:*//*Label 1233*/ 32196, 14429 /*GILLT_s32*//*Label 1225*/ 31390, 14430 /*GILLT_s64*//*Label 1226*/ 31629, 0, 0, 0, 14431 /*GILLT_v2s64*//*Label 1227*/ 31868, 0, 14432 /*GILLT_v4s32*//*Label 1228*/ 31892, 14433 /*GILLT_v4s64*//*Label 1229*/ 31985, 0, 0, 14434 /*GILLT_v8s32*//*Label 1230*/ 32055, 14435 /*GILLT_v8s64*//*Label 1231*/ 32125, 0, 0, 0, 14436 /*GILLT_v16s32*//*Label 1232*/ 32172, 14437 // Label 1225: @31390 14438 GIM_Try, /*On fail goto*//*Label 1234*/ 31413, // Rule ID 1355 // 14439 GIM_CheckFeatures, GIFBS_UseSSE1, 14440 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, 14441 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID, 14442 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, 14443 // (sint_to_fp:{ *:[f32] } GR32:{ *:[i32] }:$src) => (CVTSI2SSrr:{ *:[f32] } GR32:{ *:[i32] }:$src) 14444 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::CVTSI2SSrr, 14445 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 14446 // GIR_Coverage, 1355, 14447 GIR_Done, 14448 // Label 1234: @31413 14449 GIM_Try, /*On fail goto*//*Label 1235*/ 31436, // Rule ID 1357 // 14450 GIM_CheckFeatures, GIFBS_UseSSE1, 14451 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, 14452 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID, 14453 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, 14454 // (sint_to_fp:{ *:[f32] } GR64:{ *:[i64] }:$src) => (CVTSI642SSrr:{ *:[f32] } GR64:{ *:[i64] }:$src) 14455 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::CVTSI642SSrr, 14456 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 14457 // GIR_Coverage, 1357, 14458 GIR_Done, 14459 // Label 1235: @31436 14460 GIM_Try, /*On fail goto*//*Label 1236*/ 31484, // Rule ID 12471 // 14461 GIM_CheckFeatures, GIFBS_UseAVX, 14462 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, 14463 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID, 14464 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, 14465 // (sint_to_fp:{ *:[f32] } GR32:{ *:[i32] }:$src) => (VCVTSI2SSrr:{ *:[f32] } (IMPLICIT_DEF:{ *:[f32] }), GR32:{ *:[i32] }:$src) 14466 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, 14467 GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::IMPLICIT_DEF, 14468 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, 14469 GIR_ConstrainSelectedInstOperands, /*InsnID*/1, 14470 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTSI2SSrr, 14471 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 14472 GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, 14473 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 14474 GIR_EraseFromParent, /*InsnID*/0, 14475 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 14476 // GIR_Coverage, 12471, 14477 GIR_Done, 14478 // Label 1236: @31484 14479 GIM_Try, /*On fail goto*//*Label 1237*/ 31532, // Rule ID 12472 // 14480 GIM_CheckFeatures, GIFBS_UseAVX, 14481 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, 14482 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID, 14483 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, 14484 // (sint_to_fp:{ *:[f32] } GR64:{ *:[i64] }:$src) => (VCVTSI642SSrr:{ *:[f32] } (IMPLICIT_DEF:{ *:[f32] }), GR64:{ *:[i64] }:$src) 14485 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, 14486 GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::IMPLICIT_DEF, 14487 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, 14488 GIR_ConstrainSelectedInstOperands, /*InsnID*/1, 14489 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTSI642SSrr, 14490 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 14491 GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, 14492 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 14493 GIR_EraseFromParent, /*InsnID*/0, 14494 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 14495 // GIR_Coverage, 12472, 14496 GIR_Done, 14497 // Label 1237: @31532 14498 GIM_Try, /*On fail goto*//*Label 1238*/ 31580, // Rule ID 14823 // 14499 GIM_CheckFeatures, GIFBS_HasAVX512, 14500 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, 14501 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32XRegClassID, 14502 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, 14503 // (sint_to_fp:{ *:[f32] } GR32:{ *:[i32] }:$src) => (VCVTSI2SSZrr:{ *:[f32] } (IMPLICIT_DEF:{ *:[f32] }), GR32:{ *:[i32] }:$src) 14504 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, 14505 GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::IMPLICIT_DEF, 14506 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, 14507 GIR_ConstrainSelectedInstOperands, /*InsnID*/1, 14508 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTSI2SSZrr, 14509 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 14510 GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, 14511 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 14512 GIR_EraseFromParent, /*InsnID*/0, 14513 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 14514 // GIR_Coverage, 14823, 14515 GIR_Done, 14516 // Label 1238: @31580 14517 GIM_Try, /*On fail goto*//*Label 1239*/ 31628, // Rule ID 14824 // 14518 GIM_CheckFeatures, GIFBS_HasAVX512, 14519 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, 14520 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32XRegClassID, 14521 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, 14522 // (sint_to_fp:{ *:[f32] } GR64:{ *:[i64] }:$src) => (VCVTSI642SSZrr:{ *:[f32] } (IMPLICIT_DEF:{ *:[f32] }), GR64:{ *:[i64] }:$src) 14523 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, 14524 GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::IMPLICIT_DEF, 14525 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, 14526 GIR_ConstrainSelectedInstOperands, /*InsnID*/1, 14527 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTSI642SSZrr, 14528 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 14529 GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, 14530 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 14531 GIR_EraseFromParent, /*InsnID*/0, 14532 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 14533 // GIR_Coverage, 14824, 14534 GIR_Done, 14535 // Label 1239: @31628 14536 GIM_Reject, 14537 // Label 1226: @31629 14538 GIM_Try, /*On fail goto*//*Label 1240*/ 31652, // Rule ID 1359 // 14539 GIM_CheckFeatures, GIFBS_UseSSE2, 14540 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, 14541 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64RegClassID, 14542 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, 14543 // (sint_to_fp:{ *:[f64] } GR32:{ *:[i32] }:$src) => (CVTSI2SDrr:{ *:[f64] } GR32:{ *:[i32] }:$src) 14544 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::CVTSI2SDrr, 14545 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 14546 // GIR_Coverage, 1359, 14547 GIR_Done, 14548 // Label 1240: @31652 14549 GIM_Try, /*On fail goto*//*Label 1241*/ 31675, // Rule ID 1361 // 14550 GIM_CheckFeatures, GIFBS_UseSSE2, 14551 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, 14552 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64RegClassID, 14553 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, 14554 // (sint_to_fp:{ *:[f64] } GR64:{ *:[i64] }:$src) => (CVTSI642SDrr:{ *:[f64] } GR64:{ *:[i64] }:$src) 14555 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::CVTSI642SDrr, 14556 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 14557 // GIR_Coverage, 1361, 14558 GIR_Done, 14559 // Label 1241: @31675 14560 GIM_Try, /*On fail goto*//*Label 1242*/ 31723, // Rule ID 12473 // 14561 GIM_CheckFeatures, GIFBS_UseAVX, 14562 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, 14563 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64RegClassID, 14564 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, 14565 // (sint_to_fp:{ *:[f64] } GR32:{ *:[i32] }:$src) => (VCVTSI2SDrr:{ *:[f64] } (IMPLICIT_DEF:{ *:[f64] }), GR32:{ *:[i32] }:$src) 14566 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64, 14567 GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::IMPLICIT_DEF, 14568 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, 14569 GIR_ConstrainSelectedInstOperands, /*InsnID*/1, 14570 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTSI2SDrr, 14571 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 14572 GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, 14573 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 14574 GIR_EraseFromParent, /*InsnID*/0, 14575 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 14576 // GIR_Coverage, 12473, 14577 GIR_Done, 14578 // Label 1242: @31723 14579 GIM_Try, /*On fail goto*//*Label 1243*/ 31771, // Rule ID 12474 // 14580 GIM_CheckFeatures, GIFBS_UseAVX, 14581 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, 14582 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64RegClassID, 14583 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, 14584 // (sint_to_fp:{ *:[f64] } GR64:{ *:[i64] }:$src) => (VCVTSI642SDrr:{ *:[f64] } (IMPLICIT_DEF:{ *:[f64] }), GR64:{ *:[i64] }:$src) 14585 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64, 14586 GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::IMPLICIT_DEF, 14587 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, 14588 GIR_ConstrainSelectedInstOperands, /*InsnID*/1, 14589 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTSI642SDrr, 14590 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 14591 GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, 14592 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 14593 GIR_EraseFromParent, /*InsnID*/0, 14594 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 14595 // GIR_Coverage, 12474, 14596 GIR_Done, 14597 // Label 1243: @31771 14598 GIM_Try, /*On fail goto*//*Label 1244*/ 31819, // Rule ID 14825 // 14599 GIM_CheckFeatures, GIFBS_HasAVX512, 14600 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, 14601 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64XRegClassID, 14602 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, 14603 // (sint_to_fp:{ *:[f64] } GR32:{ *:[i32] }:$src) => (VCVTSI2SDZrr:{ *:[f64] } (IMPLICIT_DEF:{ *:[f64] }), GR32:{ *:[i32] }:$src) 14604 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64, 14605 GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::IMPLICIT_DEF, 14606 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, 14607 GIR_ConstrainSelectedInstOperands, /*InsnID*/1, 14608 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTSI2SDZrr, 14609 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 14610 GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, 14611 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 14612 GIR_EraseFromParent, /*InsnID*/0, 14613 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 14614 // GIR_Coverage, 14825, 14615 GIR_Done, 14616 // Label 1244: @31819 14617 GIM_Try, /*On fail goto*//*Label 1245*/ 31867, // Rule ID 14826 // 14618 GIM_CheckFeatures, GIFBS_HasAVX512, 14619 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, 14620 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64XRegClassID, 14621 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, 14622 // (sint_to_fp:{ *:[f64] } GR64:{ *:[i64] }:$src) => (VCVTSI642SDZrr:{ *:[f64] } (IMPLICIT_DEF:{ *:[f64] }), GR64:{ *:[i64] }:$src) 14623 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64, 14624 GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::IMPLICIT_DEF, 14625 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, 14626 GIR_ConstrainSelectedInstOperands, /*InsnID*/1, 14627 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTSI642SDZrr, 14628 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 14629 GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, 14630 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 14631 GIR_EraseFromParent, /*InsnID*/0, 14632 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 14633 // GIR_Coverage, 14826, 14634 GIR_Done, 14635 // Label 1245: @31867 14636 GIM_Reject, 14637 // Label 1227: @31868 14638 GIM_Try, /*On fail goto*//*Label 1246*/ 31891, // Rule ID 8774 // 14639 GIM_CheckFeatures, GIFBS_HasDQI_HasVLX, 14640 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64, 14641 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, 14642 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, 14643 // (sint_to_fp:{ *:[v2f64] } VR128X:{ *:[v2i64] }:$src) => (VCVTQQ2PDZ128rr:{ *:[v2f64] } VR128X:{ *:[v2i64] }:$src) 14644 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTQQ2PDZ128rr, 14645 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 14646 // GIR_Coverage, 8774, 14647 GIR_Done, 14648 // Label 1246: @31891 14649 GIM_Reject, 14650 // Label 1228: @31892 14651 GIM_Try, /*On fail goto*//*Label 1247*/ 31915, // Rule ID 1395 // 14652 GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, 14653 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, 14654 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 14655 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, 14656 // (sint_to_fp:{ *:[v4f32] } VR128:{ *:[v4i32] }:$src) => (VCVTDQ2PSrr:{ *:[v4f32] } VR128:{ *:[v4i32] }:$src) 14657 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTDQ2PSrr, 14658 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 14659 // GIR_Coverage, 1395, 14660 GIR_Done, 14661 // Label 1247: @31915 14662 GIM_Try, /*On fail goto*//*Label 1248*/ 31938, // Rule ID 1399 // 14663 GIM_CheckFeatures, GIFBS_UseSSE2, 14664 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, 14665 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, 14666 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, 14667 // (sint_to_fp:{ *:[v4f32] } VR128:{ *:[v4i32] }:$src) => (CVTDQ2PSrr:{ *:[v4f32] } VR128:{ *:[v4i32] }:$src) 14668 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::CVTDQ2PSrr, 14669 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 14670 // GIR_Coverage, 1399, 14671 GIR_Done, 14672 // Label 1248: @31938 14673 GIM_Try, /*On fail goto*//*Label 1249*/ 31961, // Rule ID 8207 // 14674 GIM_CheckFeatures, GIFBS_HasVLX, 14675 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, 14676 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, 14677 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, 14678 // (sint_to_fp:{ *:[v4f32] } VR128X:{ *:[v4i32] }:$src) => (VCVTDQ2PSZ128rr:{ *:[v4f32] } VR128X:{ *:[v4i32] }:$src) 14679 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTDQ2PSZ128rr, 14680 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 14681 // GIR_Coverage, 8207, 14682 GIR_Done, 14683 // Label 1249: @31961 14684 GIM_Try, /*On fail goto*//*Label 1250*/ 31984, // Rule ID 8843 // 14685 GIM_CheckFeatures, GIFBS_HasDQI_HasVLX, 14686 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64, 14687 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, 14688 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, 14689 // (sint_to_fp:{ *:[v4f32] } VR256X:{ *:[v4i64] }:$src) => (VCVTQQ2PSZ256rr:{ *:[v4f32] } VR256X:{ *:[v4i64] }:$src) 14690 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTQQ2PSZ256rr, 14691 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 14692 // GIR_Coverage, 8843, 14693 GIR_Done, 14694 // Label 1250: @31984 14695 GIM_Reject, 14696 // Label 1229: @31985 14697 GIM_Try, /*On fail goto*//*Label 1251*/ 32008, // Rule ID 1442 // 14698 GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, 14699 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, 14700 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, 14701 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, 14702 // (sint_to_fp:{ *:[v4f64] } VR128:{ *:[v4i32] }:$src) => (VCVTDQ2PDYrr:{ *:[v4f64] } VR128:{ *:[v4i32] }:$src) 14703 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTDQ2PDYrr, 14704 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 14705 // GIR_Coverage, 1442, 14706 GIR_Done, 14707 // Label 1251: @32008 14708 GIM_Try, /*On fail goto*//*Label 1252*/ 32031, // Rule ID 8186 // 14709 GIM_CheckFeatures, GIFBS_HasVLX, 14710 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, 14711 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, 14712 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, 14713 // (sint_to_fp:{ *:[v4f64] } VR128X:{ *:[v4i32] }:$src) => (VCVTDQ2PDZ256rr:{ *:[v4f64] } VR128X:{ *:[v4i32] }:$src) 14714 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTDQ2PDZ256rr, 14715 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 14716 // GIR_Coverage, 8186, 14717 GIR_Done, 14718 // Label 1252: @32031 14719 GIM_Try, /*On fail goto*//*Label 1253*/ 32054, // Rule ID 8783 // 14720 GIM_CheckFeatures, GIFBS_HasDQI_HasVLX, 14721 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64, 14722 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, 14723 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, 14724 // (sint_to_fp:{ *:[v4f64] } VR256X:{ *:[v4i64] }:$src) => (VCVTQQ2PDZ256rr:{ *:[v4f64] } VR256X:{ *:[v4i64] }:$src) 14725 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTQQ2PDZ256rr, 14726 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 14727 // GIR_Coverage, 8783, 14728 GIR_Done, 14729 // Label 1253: @32054 14730 GIM_Reject, 14731 // Label 1230: @32055 14732 GIM_Try, /*On fail goto*//*Label 1254*/ 32078, // Rule ID 1397 // 14733 GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, 14734 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32, 14735 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, 14736 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, 14737 // (sint_to_fp:{ *:[v8f32] } VR256:{ *:[v8i32] }:$src) => (VCVTDQ2PSYrr:{ *:[v8f32] } VR256:{ *:[v8i32] }:$src) 14738 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTDQ2PSYrr, 14739 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 14740 // GIR_Coverage, 1397, 14741 GIR_Done, 14742 // Label 1254: @32078 14743 GIM_Try, /*On fail goto*//*Label 1255*/ 32101, // Rule ID 8216 // 14744 GIM_CheckFeatures, GIFBS_HasVLX, 14745 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32, 14746 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, 14747 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, 14748 // (sint_to_fp:{ *:[v8f32] } VR256X:{ *:[v8i32] }:$src) => (VCVTDQ2PSZ256rr:{ *:[v8f32] } VR256X:{ *:[v8i32] }:$src) 14749 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTDQ2PSZ256rr, 14750 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 14751 // GIR_Coverage, 8216, 14752 GIR_Done, 14753 // Label 1255: @32101 14754 GIM_Try, /*On fail goto*//*Label 1256*/ 32124, // Rule ID 8822 // 14755 GIM_CheckFeatures, GIFBS_HasDQI, 14756 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64, 14757 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, 14758 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, 14759 // (sint_to_fp:{ *:[v8f32] } VR512:{ *:[v8i64] }:$src) => (VCVTQQ2PSZrr:{ *:[v8f32] } VR512:{ *:[v8i64] }:$src) 14760 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTQQ2PSZrr, 14761 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 14762 // GIR_Coverage, 8822, 14763 GIR_Done, 14764 // Label 1256: @32124 14765 GIM_Reject, 14766 // Label 1231: @32125 14767 GIM_Try, /*On fail goto*//*Label 1257*/ 32148, // Rule ID 8168 // 14768 GIM_CheckFeatures, GIFBS_HasAVX512, 14769 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32, 14770 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, 14771 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, 14772 // (sint_to_fp:{ *:[v8f64] } VR256X:{ *:[v8i32] }:$src) => (VCVTDQ2PDZrr:{ *:[v8f64] } VR256X:{ *:[v8i32] }:$src) 14773 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTDQ2PDZrr, 14774 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 14775 // GIR_Coverage, 8168, 14776 GIR_Done, 14777 // Label 1257: @32148 14778 GIM_Try, /*On fail goto*//*Label 1258*/ 32171, // Rule ID 8762 // 14779 GIM_CheckFeatures, GIFBS_HasDQI, 14780 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64, 14781 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, 14782 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, 14783 // (sint_to_fp:{ *:[v8f64] } VR512:{ *:[v8i64] }:$src) => (VCVTQQ2PDZrr:{ *:[v8f64] } VR512:{ *:[v8i64] }:$src) 14784 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTQQ2PDZrr, 14785 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 14786 // GIR_Coverage, 8762, 14787 GIR_Done, 14788 // Label 1258: @32171 14789 GIM_Reject, 14790 // Label 1232: @32172 14791 GIM_Try, /*On fail goto*//*Label 1259*/ 32195, // Rule ID 8195 // 14792 GIM_CheckFeatures, GIFBS_HasAVX512, 14793 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32, 14794 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, 14795 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, 14796 // (sint_to_fp:{ *:[v16f32] } VR512:{ *:[v16i32] }:$src) => (VCVTDQ2PSZrr:{ *:[v16f32] } VR512:{ *:[v16i32] }:$src) 14797 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTDQ2PSZrr, 14798 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 14799 // GIR_Coverage, 8195, 14800 GIR_Done, 14801 // Label 1259: @32195 14802 GIM_Reject, 14803 // Label 1233: @32196 14804 GIM_Reject, 14805 // Label 28: @32197 14806 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/3, 20, /*)*//*default:*//*Label 1268*/ 32650, 14807 /*GILLT_s32*//*Label 1260*/ 32220, 14808 /*GILLT_s64*//*Label 1261*/ 32317, 0, 0, 0, 14809 /*GILLT_v2s64*//*Label 1262*/ 32414, 0, 14810 /*GILLT_v4s32*//*Label 1263*/ 32438, 14811 /*GILLT_v4s64*//*Label 1264*/ 32485, 0, 0, 14812 /*GILLT_v8s32*//*Label 1265*/ 32532, 14813 /*GILLT_v8s64*//*Label 1266*/ 32579, 0, 0, 0, 14814 /*GILLT_v16s32*//*Label 1267*/ 32626, 14815 // Label 1260: @32220 14816 GIM_Try, /*On fail goto*//*Label 1269*/ 32268, // Rule ID 14831 // 14817 GIM_CheckFeatures, GIFBS_HasAVX512, 14818 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, 14819 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32XRegClassID, 14820 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, 14821 // (uint_to_fp:{ *:[f32] } GR32:{ *:[i32] }:$src) => (VCVTUSI2SSZrr:{ *:[f32] } (IMPLICIT_DEF:{ *:[f32] }), GR32:{ *:[i32] }:$src) 14822 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, 14823 GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::IMPLICIT_DEF, 14824 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, 14825 GIR_ConstrainSelectedInstOperands, /*InsnID*/1, 14826 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTUSI2SSZrr, 14827 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 14828 GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, 14829 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 14830 GIR_EraseFromParent, /*InsnID*/0, 14831 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 14832 // GIR_Coverage, 14831, 14833 GIR_Done, 14834 // Label 1269: @32268 14835 GIM_Try, /*On fail goto*//*Label 1270*/ 32316, // Rule ID 14832 // 14836 GIM_CheckFeatures, GIFBS_HasAVX512, 14837 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, 14838 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32XRegClassID, 14839 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, 14840 // (uint_to_fp:{ *:[f32] } GR64:{ *:[i64] }:$src) => (VCVTUSI642SSZrr:{ *:[f32] } (IMPLICIT_DEF:{ *:[f32] }), GR64:{ *:[i64] }:$src) 14841 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, 14842 GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::IMPLICIT_DEF, 14843 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, 14844 GIR_ConstrainSelectedInstOperands, /*InsnID*/1, 14845 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTUSI642SSZrr, 14846 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 14847 GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, 14848 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 14849 GIR_EraseFromParent, /*InsnID*/0, 14850 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 14851 // GIR_Coverage, 14832, 14852 GIR_Done, 14853 // Label 1270: @32316 14854 GIM_Reject, 14855 // Label 1261: @32317 14856 GIM_Try, /*On fail goto*//*Label 1271*/ 32365, // Rule ID 14833 // 14857 GIM_CheckFeatures, GIFBS_HasAVX512, 14858 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, 14859 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64XRegClassID, 14860 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, 14861 // (uint_to_fp:{ *:[f64] } GR32:{ *:[i32] }:$src) => (VCVTUSI2SDZrr:{ *:[f64] } (IMPLICIT_DEF:{ *:[f64] }), GR32:{ *:[i32] }:$src) 14862 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64, 14863 GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::IMPLICIT_DEF, 14864 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, 14865 GIR_ConstrainSelectedInstOperands, /*InsnID*/1, 14866 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTUSI2SDZrr, 14867 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 14868 GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, 14869 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 14870 GIR_EraseFromParent, /*InsnID*/0, 14871 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 14872 // GIR_Coverage, 14833, 14873 GIR_Done, 14874 // Label 1271: @32365 14875 GIM_Try, /*On fail goto*//*Label 1272*/ 32413, // Rule ID 14834 // 14876 GIM_CheckFeatures, GIFBS_HasAVX512, 14877 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, 14878 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64XRegClassID, 14879 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, 14880 // (uint_to_fp:{ *:[f64] } GR64:{ *:[i64] }:$src) => (VCVTUSI642SDZrr:{ *:[f64] } (IMPLICIT_DEF:{ *:[f64] }), GR64:{ *:[i64] }:$src) 14881 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64, 14882 GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::IMPLICIT_DEF, 14883 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, 14884 GIR_ConstrainSelectedInstOperands, /*InsnID*/1, 14885 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTUSI642SDZrr, 14886 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 14887 GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, 14888 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 14889 GIR_EraseFromParent, /*InsnID*/0, 14890 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 14891 // GIR_Coverage, 14834, 14892 GIR_Done, 14893 // Label 1272: @32413 14894 GIM_Reject, 14895 // Label 1262: @32414 14896 GIM_Try, /*On fail goto*//*Label 1273*/ 32437, // Rule ID 8804 // 14897 GIM_CheckFeatures, GIFBS_HasDQI_HasVLX, 14898 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64, 14899 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, 14900 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, 14901 // (uint_to_fp:{ *:[v2f64] } VR128X:{ *:[v2i64] }:$src) => (VCVTUQQ2PDZ128rr:{ *:[v2f64] } VR128X:{ *:[v2i64] }:$src) 14902 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTUQQ2PDZ128rr, 14903 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 14904 // GIR_Coverage, 8804, 14905 GIR_Done, 14906 // Label 1273: @32437 14907 GIM_Reject, 14908 // Label 1263: @32438 14909 GIM_Try, /*On fail goto*//*Label 1274*/ 32461, // Rule ID 8384 // 14910 GIM_CheckFeatures, GIFBS_HasVLX, 14911 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, 14912 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, 14913 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, 14914 // (uint_to_fp:{ *:[v4f32] } VR128X:{ *:[v4i32] }:$src) => (VCVTUDQ2PSZ128rr:{ *:[v4f32] } VR128X:{ *:[v4i32] }:$src) 14915 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTUDQ2PSZ128rr, 14916 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 14917 // GIR_Coverage, 8384, 14918 GIR_Done, 14919 // Label 1274: @32461 14920 GIM_Try, /*On fail goto*//*Label 1275*/ 32484, // Rule ID 8873 // 14921 GIM_CheckFeatures, GIFBS_HasDQI_HasVLX, 14922 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64, 14923 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, 14924 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, 14925 // (uint_to_fp:{ *:[v4f32] } VR256X:{ *:[v4i64] }:$src) => (VCVTUQQ2PSZ256rr:{ *:[v4f32] } VR256X:{ *:[v4i64] }:$src) 14926 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTUQQ2PSZ256rr, 14927 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 14928 // GIR_Coverage, 8873, 14929 GIR_Done, 14930 // Label 1275: @32484 14931 GIM_Reject, 14932 // Label 1264: @32485 14933 GIM_Try, /*On fail goto*//*Label 1276*/ 32508, // Rule ID 8363 // 14934 GIM_CheckFeatures, GIFBS_HasVLX, 14935 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, 14936 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, 14937 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, 14938 // (uint_to_fp:{ *:[v4f64] } VR128X:{ *:[v4i32] }:$src) => (VCVTUDQ2PDZ256rr:{ *:[v4f64] } VR128X:{ *:[v4i32] }:$src) 14939 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTUDQ2PDZ256rr, 14940 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 14941 // GIR_Coverage, 8363, 14942 GIR_Done, 14943 // Label 1276: @32508 14944 GIM_Try, /*On fail goto*//*Label 1277*/ 32531, // Rule ID 8813 // 14945 GIM_CheckFeatures, GIFBS_HasDQI_HasVLX, 14946 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64, 14947 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, 14948 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, 14949 // (uint_to_fp:{ *:[v4f64] } VR256X:{ *:[v4i64] }:$src) => (VCVTUQQ2PDZ256rr:{ *:[v4f64] } VR256X:{ *:[v4i64] }:$src) 14950 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTUQQ2PDZ256rr, 14951 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 14952 // GIR_Coverage, 8813, 14953 GIR_Done, 14954 // Label 1277: @32531 14955 GIM_Reject, 14956 // Label 1265: @32532 14957 GIM_Try, /*On fail goto*//*Label 1278*/ 32555, // Rule ID 8393 // 14958 GIM_CheckFeatures, GIFBS_HasVLX, 14959 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32, 14960 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, 14961 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, 14962 // (uint_to_fp:{ *:[v8f32] } VR256X:{ *:[v8i32] }:$src) => (VCVTUDQ2PSZ256rr:{ *:[v8f32] } VR256X:{ *:[v8i32] }:$src) 14963 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTUDQ2PSZ256rr, 14964 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 14965 // GIR_Coverage, 8393, 14966 GIR_Done, 14967 // Label 1278: @32555 14968 GIM_Try, /*On fail goto*//*Label 1279*/ 32578, // Rule ID 8852 // 14969 GIM_CheckFeatures, GIFBS_HasDQI, 14970 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64, 14971 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, 14972 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, 14973 // (uint_to_fp:{ *:[v8f32] } VR512:{ *:[v8i64] }:$src) => (VCVTUQQ2PSZrr:{ *:[v8f32] } VR512:{ *:[v8i64] }:$src) 14974 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTUQQ2PSZrr, 14975 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 14976 // GIR_Coverage, 8852, 14977 GIR_Done, 14978 // Label 1279: @32578 14979 GIM_Reject, 14980 // Label 1266: @32579 14981 GIM_Try, /*On fail goto*//*Label 1280*/ 32602, // Rule ID 8345 // 14982 GIM_CheckFeatures, GIFBS_HasAVX512, 14983 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32, 14984 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, 14985 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, 14986 // (uint_to_fp:{ *:[v8f64] } VR256X:{ *:[v8i32] }:$src) => (VCVTUDQ2PDZrr:{ *:[v8f64] } VR256X:{ *:[v8i32] }:$src) 14987 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTUDQ2PDZrr, 14988 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 14989 // GIR_Coverage, 8345, 14990 GIR_Done, 14991 // Label 1280: @32602 14992 GIM_Try, /*On fail goto*//*Label 1281*/ 32625, // Rule ID 8792 // 14993 GIM_CheckFeatures, GIFBS_HasDQI, 14994 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64, 14995 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, 14996 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, 14997 // (uint_to_fp:{ *:[v8f64] } VR512:{ *:[v8i64] }:$src) => (VCVTUQQ2PDZrr:{ *:[v8f64] } VR512:{ *:[v8i64] }:$src) 14998 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTUQQ2PDZrr, 14999 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 15000 // GIR_Coverage, 8792, 15001 GIR_Done, 15002 // Label 1281: @32625 15003 GIM_Reject, 15004 // Label 1267: @32626 15005 GIM_Try, /*On fail goto*//*Label 1282*/ 32649, // Rule ID 8372 // 15006 GIM_CheckFeatures, GIFBS_HasAVX512, 15007 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32, 15008 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, 15009 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, 15010 // (uint_to_fp:{ *:[v16f32] } VR512:{ *:[v16i32] }:$src) => (VCVTUDQ2PSZrr:{ *:[v16f32] } VR512:{ *:[v16i32] }:$src) 15011 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTUDQ2PSZrr, 15012 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 15013 // GIR_Coverage, 8372, 15014 GIR_Done, 15015 // Label 1282: @32649 15016 GIM_Reject, 15017 // Label 1268: @32650 15018 GIM_Reject, 15019 // Label 29: @32651 15020 GIM_Try, /*On fail goto*//*Label 1283*/ 32663, // Rule ID 552 // 15021 // MIs[0] dst 15022 GIM_CheckIsMBB, /*MI*/0, /*Op*/0, 15023 // (br (bb:{ *:[Other] }):$dst) => (JMP_1 (bb:{ *:[Other] }):$dst) 15024 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::JMP_1, 15025 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 15026 // GIR_Coverage, 552, 15027 GIR_Done, 15028 // Label 1283: @32663 15029 GIM_Reject, 15030 // Label 30: @32664 15031 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/2, 5, /*)*//*default:*//*Label 1287*/ 32753, 15032 /*GILLT_s16*//*Label 1284*/ 32673, 15033 /*GILLT_s32*//*Label 1285*/ 32709, 15034 /*GILLT_s64*//*Label 1286*/ 32731, 15035 // Label 1284: @32673 15036 GIM_Try, /*On fail goto*//*Label 1288*/ 32708, // Rule ID 16193 // 15037 GIM_CheckFeatures, GIFBS_HasMOVBE, 15038 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16, 15039 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR16RegClassID, 15040 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID, 15041 // (bswap:{ *:[i16] } GR16:{ *:[i16] }:$src) => (ROL16ri:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src, 8:{ *:[i8] }) 15042 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ROL16ri, 15043 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst 15044 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src 15045 GIR_AddImm, /*InsnID*/0, /*Imm*/8, 15046 GIR_EraseFromParent, /*InsnID*/0, 15047 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 15048 // GIR_Coverage, 16193, 15049 GIR_Done, 15050 // Label 1288: @32708 15051 GIM_Reject, 15052 // Label 1285: @32709 15053 GIM_Try, /*On fail goto*//*Label 1289*/ 32730, // Rule ID 5 // 15054 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, 15055 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, 15056 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, 15057 // (bswap:{ *:[i32] } GR32:{ *:[i32] }:$src) => (BSWAP32r:{ *:[i32] } GR32:{ *:[i32] }:$src) 15058 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::BSWAP32r, 15059 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 15060 // GIR_Coverage, 5, 15061 GIR_Done, 15062 // Label 1289: @32730 15063 GIM_Reject, 15064 // Label 1286: @32731 15065 GIM_Try, /*On fail goto*//*Label 1290*/ 32752, // Rule ID 6 // 15066 GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, 15067 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, 15068 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, 15069 // (bswap:{ *:[i64] } GR64:{ *:[i64] }:$src) => (BSWAP64r:{ *:[i64] } GR64:{ *:[i64] }:$src) 15070 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::BSWAP64r, 15071 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 15072 // GIR_Coverage, 6, 15073 GIR_Done, 15074 // Label 1290: @32752 15075 GIM_Reject, 15076 // Label 1287: @32753 15077 GIM_Reject, 15078 // Label 31: @32754 15079 GIM_Reject, 15080 }; 15081 return MatchTable0; 15082} 15083#endif // ifdef GET_GLOBALISEL_IMPL 15084#ifdef GET_GLOBALISEL_PREDICATES_DECL 15085PredicateBitset AvailableModuleFeatures; 15086mutable PredicateBitset AvailableFunctionFeatures; 15087PredicateBitset getAvailableFeatures() const { 15088 return AvailableModuleFeatures | AvailableFunctionFeatures; 15089} 15090PredicateBitset 15091computeAvailableModuleFeatures(const X86Subtarget *Subtarget) const; 15092PredicateBitset 15093computeAvailableFunctionFeatures(const X86Subtarget *Subtarget, 15094 const MachineFunction *MF) const; 15095#endif // ifdef GET_GLOBALISEL_PREDICATES_DECL 15096#ifdef GET_GLOBALISEL_PREDICATES_INIT 15097AvailableModuleFeatures(computeAvailableModuleFeatures(&STI)), 15098AvailableFunctionFeatures() 15099#endif // ifdef GET_GLOBALISEL_PREDICATES_INIT 15100