1 /**************************************************************************** 2 **************************************************************************** 3 *** 4 *** This header was automatically generated from a Linux kernel header 5 *** of the same name, to make information necessary for userspace to 6 *** call into the kernel available to libc. It contains only constants, 7 *** structures, and macros generated from the original header, and thus, 8 *** contains no copyrightable information. 9 *** 10 *** To edit the content of this header, modify the corresponding 11 *** source file (e.g. under external/kernel-headers/original/) then 12 *** run bionic/libc/kernel/tools/update_all.py 13 *** 14 *** Any manual change here will be lost the next time this script will 15 *** be run. You've been warned! 16 *** 17 **************************************************************************** 18 ****************************************************************************/ 19 #ifndef __VMW_PVRDMA_ABI_H__ 20 #define __VMW_PVRDMA_ABI_H__ 21 #include <linux/types.h> 22 #define PVRDMA_UVERBS_ABI_VERSION 3 23 #define PVRDMA_UAR_HANDLE_MASK 0x00FFFFFF 24 #define PVRDMA_UAR_QP_OFFSET 0 25 #define PVRDMA_UAR_QP_SEND (1 << 30) 26 #define PVRDMA_UAR_QP_RECV (1 << 31) 27 #define PVRDMA_UAR_CQ_OFFSET 4 28 #define PVRDMA_UAR_CQ_ARM_SOL (1 << 29) 29 #define PVRDMA_UAR_CQ_ARM (1 << 30) 30 #define PVRDMA_UAR_CQ_POLL (1 << 31) 31 #define PVRDMA_UAR_SRQ_OFFSET 8 32 #define PVRDMA_UAR_SRQ_RECV (1 << 30) 33 enum pvrdma_wr_opcode { 34 PVRDMA_WR_RDMA_WRITE, 35 PVRDMA_WR_RDMA_WRITE_WITH_IMM, 36 PVRDMA_WR_SEND, 37 PVRDMA_WR_SEND_WITH_IMM, 38 PVRDMA_WR_RDMA_READ, 39 PVRDMA_WR_ATOMIC_CMP_AND_SWP, 40 PVRDMA_WR_ATOMIC_FETCH_AND_ADD, 41 PVRDMA_WR_LSO, 42 PVRDMA_WR_SEND_WITH_INV, 43 PVRDMA_WR_RDMA_READ_WITH_INV, 44 PVRDMA_WR_LOCAL_INV, 45 PVRDMA_WR_FAST_REG_MR, 46 PVRDMA_WR_MASKED_ATOMIC_CMP_AND_SWP, 47 PVRDMA_WR_MASKED_ATOMIC_FETCH_AND_ADD, 48 PVRDMA_WR_BIND_MW, 49 PVRDMA_WR_REG_SIG_MR, 50 PVRDMA_WR_ERROR, 51 }; 52 enum pvrdma_wc_status { 53 PVRDMA_WC_SUCCESS, 54 PVRDMA_WC_LOC_LEN_ERR, 55 PVRDMA_WC_LOC_QP_OP_ERR, 56 PVRDMA_WC_LOC_EEC_OP_ERR, 57 PVRDMA_WC_LOC_PROT_ERR, 58 PVRDMA_WC_WR_FLUSH_ERR, 59 PVRDMA_WC_MW_BIND_ERR, 60 PVRDMA_WC_BAD_RESP_ERR, 61 PVRDMA_WC_LOC_ACCESS_ERR, 62 PVRDMA_WC_REM_INV_REQ_ERR, 63 PVRDMA_WC_REM_ACCESS_ERR, 64 PVRDMA_WC_REM_OP_ERR, 65 PVRDMA_WC_RETRY_EXC_ERR, 66 PVRDMA_WC_RNR_RETRY_EXC_ERR, 67 PVRDMA_WC_LOC_RDD_VIOL_ERR, 68 PVRDMA_WC_REM_INV_RD_REQ_ERR, 69 PVRDMA_WC_REM_ABORT_ERR, 70 PVRDMA_WC_INV_EECN_ERR, 71 PVRDMA_WC_INV_EEC_STATE_ERR, 72 PVRDMA_WC_FATAL_ERR, 73 PVRDMA_WC_RESP_TIMEOUT_ERR, 74 PVRDMA_WC_GENERAL_ERR, 75 }; 76 enum pvrdma_wc_opcode { 77 PVRDMA_WC_SEND, 78 PVRDMA_WC_RDMA_WRITE, 79 PVRDMA_WC_RDMA_READ, 80 PVRDMA_WC_COMP_SWAP, 81 PVRDMA_WC_FETCH_ADD, 82 PVRDMA_WC_BIND_MW, 83 PVRDMA_WC_LSO, 84 PVRDMA_WC_LOCAL_INV, 85 PVRDMA_WC_FAST_REG_MR, 86 PVRDMA_WC_MASKED_COMP_SWAP, 87 PVRDMA_WC_MASKED_FETCH_ADD, 88 PVRDMA_WC_RECV = 1 << 7, 89 PVRDMA_WC_RECV_RDMA_WITH_IMM, 90 }; 91 enum pvrdma_wc_flags { 92 PVRDMA_WC_GRH = 1 << 0, 93 PVRDMA_WC_WITH_IMM = 1 << 1, 94 PVRDMA_WC_WITH_INVALIDATE = 1 << 2, 95 PVRDMA_WC_IP_CSUM_OK = 1 << 3, 96 PVRDMA_WC_WITH_SMAC = 1 << 4, 97 PVRDMA_WC_WITH_VLAN = 1 << 5, 98 PVRDMA_WC_WITH_NETWORK_HDR_TYPE = 1 << 6, 99 PVRDMA_WC_FLAGS_MAX = PVRDMA_WC_WITH_NETWORK_HDR_TYPE, 100 }; 101 struct pvrdma_alloc_ucontext_resp { 102 __u32 qp_tab_size; 103 __u32 reserved; 104 }; 105 struct pvrdma_alloc_pd_resp { 106 __u32 pdn; 107 __u32 reserved; 108 }; 109 struct pvrdma_create_cq { 110 __aligned_u64 buf_addr; 111 __u32 buf_size; 112 __u32 reserved; 113 }; 114 struct pvrdma_create_cq_resp { 115 __u32 cqn; 116 __u32 reserved; 117 }; 118 struct pvrdma_resize_cq { 119 __aligned_u64 buf_addr; 120 __u32 buf_size; 121 __u32 reserved; 122 }; 123 struct pvrdma_create_srq { 124 __aligned_u64 buf_addr; 125 __u32 buf_size; 126 __u32 reserved; 127 }; 128 struct pvrdma_create_srq_resp { 129 __u32 srqn; 130 __u32 reserved; 131 }; 132 struct pvrdma_create_qp { 133 __aligned_u64 rbuf_addr; 134 __aligned_u64 sbuf_addr; 135 __u32 rbuf_size; 136 __u32 sbuf_size; 137 __aligned_u64 qp_addr; 138 }; 139 struct pvrdma_ex_cmp_swap { 140 __aligned_u64 swap_val; 141 __aligned_u64 compare_val; 142 __aligned_u64 swap_mask; 143 __aligned_u64 compare_mask; 144 }; 145 struct pvrdma_ex_fetch_add { 146 __aligned_u64 add_val; 147 __aligned_u64 field_boundary; 148 }; 149 struct pvrdma_av { 150 __u32 port_pd; 151 __u32 sl_tclass_flowlabel; 152 __u8 dgid[16]; 153 __u8 src_path_bits; 154 __u8 gid_index; 155 __u8 stat_rate; 156 __u8 hop_limit; 157 __u8 dmac[6]; 158 __u8 reserved[6]; 159 }; 160 struct pvrdma_sge { 161 __aligned_u64 addr; 162 __u32 length; 163 __u32 lkey; 164 }; 165 struct pvrdma_rq_wqe_hdr { 166 __aligned_u64 wr_id; 167 __u32 num_sge; 168 __u32 total_len; 169 }; 170 struct pvrdma_sq_wqe_hdr { 171 __aligned_u64 wr_id; 172 __u32 num_sge; 173 __u32 total_len; 174 __u32 opcode; 175 __u32 send_flags; 176 union { 177 __be32 imm_data; 178 __u32 invalidate_rkey; 179 } ex; 180 __u32 reserved; 181 union { 182 struct { 183 __aligned_u64 remote_addr; 184 __u32 rkey; 185 __u8 reserved[4]; 186 } rdma; 187 struct { 188 __aligned_u64 remote_addr; 189 __aligned_u64 compare_add; 190 __aligned_u64 swap; 191 __u32 rkey; 192 __u32 reserved; 193 } atomic; 194 struct { 195 __aligned_u64 remote_addr; 196 __u32 log_arg_sz; 197 __u32 rkey; 198 union { 199 struct pvrdma_ex_cmp_swap cmp_swap; 200 struct pvrdma_ex_fetch_add fetch_add; 201 } wr_data; 202 } masked_atomics; 203 struct { 204 __aligned_u64 iova_start; 205 __aligned_u64 pl_pdir_dma; 206 __u32 page_shift; 207 __u32 page_list_len; 208 __u32 length; 209 __u32 access_flags; 210 __u32 rkey; 211 __u32 reserved; 212 } fast_reg; 213 struct { 214 __u32 remote_qpn; 215 __u32 remote_qkey; 216 struct pvrdma_av av; 217 } ud; 218 } wr; 219 }; 220 struct pvrdma_cqe { 221 __aligned_u64 wr_id; 222 __aligned_u64 qp; 223 __u32 opcode; 224 __u32 status; 225 __u32 byte_len; 226 __be32 imm_data; 227 __u32 src_qp; 228 __u32 wc_flags; 229 __u32 vendor_err; 230 __u16 pkey_index; 231 __u16 slid; 232 __u8 sl; 233 __u8 dlid_path_bits; 234 __u8 port_num; 235 __u8 smac[6]; 236 __u8 network_hdr_type; 237 __u8 reserved2[6]; 238 }; 239 #endif 240