1 /**************************************************************************** 2 **************************************************************************** 3 *** 4 *** This header was automatically generated from a Linux kernel header 5 *** of the same name, to make information necessary for userspace to 6 *** call into the kernel available to libc. It contains only constants, 7 *** structures, and macros generated from the original header, and thus, 8 *** contains no copyrightable information. 9 *** 10 *** To edit the content of this header, modify the corresponding 11 *** source file (e.g. under external/kernel-headers/original/) then 12 *** run bionic/libc/kernel/tools/update_all.py 13 *** 14 *** Any manual change here will be lost the next time this script will 15 *** be run. You've been warned! 16 *** 17 **************************************************************************** 18 ****************************************************************************/ 19 #ifndef _V3D_DRM_H_ 20 #define _V3D_DRM_H_ 21 #include "drm.h" 22 #ifdef __cplusplus 23 extern "C" { 24 #endif 25 #define DRM_V3D_SUBMIT_CL 0x00 26 #define DRM_V3D_WAIT_BO 0x01 27 #define DRM_V3D_CREATE_BO 0x02 28 #define DRM_V3D_MMAP_BO 0x03 29 #define DRM_V3D_GET_PARAM 0x04 30 #define DRM_V3D_GET_BO_OFFSET 0x05 31 #define DRM_V3D_SUBMIT_TFU 0x06 32 #define DRM_IOCTL_V3D_SUBMIT_CL DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_SUBMIT_CL, struct drm_v3d_submit_cl) 33 #define DRM_IOCTL_V3D_WAIT_BO DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_WAIT_BO, struct drm_v3d_wait_bo) 34 #define DRM_IOCTL_V3D_CREATE_BO DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_CREATE_BO, struct drm_v3d_create_bo) 35 #define DRM_IOCTL_V3D_MMAP_BO DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_MMAP_BO, struct drm_v3d_mmap_bo) 36 #define DRM_IOCTL_V3D_GET_PARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_GET_PARAM, struct drm_v3d_get_param) 37 #define DRM_IOCTL_V3D_GET_BO_OFFSET DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_GET_BO_OFFSET, struct drm_v3d_get_bo_offset) 38 #define DRM_IOCTL_V3D_SUBMIT_TFU DRM_IOW(DRM_COMMAND_BASE + DRM_V3D_SUBMIT_TFU, struct drm_v3d_submit_tfu) 39 struct drm_v3d_submit_cl { 40 __u32 bcl_start; 41 __u32 bcl_end; 42 __u32 rcl_start; 43 __u32 rcl_end; 44 __u32 in_sync_bcl; 45 __u32 in_sync_rcl; 46 __u32 out_sync; 47 __u32 qma; 48 __u32 qms; 49 __u32 qts; 50 __u64 bo_handles; 51 __u32 bo_handle_count; 52 __u32 pad; 53 }; 54 struct drm_v3d_wait_bo { 55 __u32 handle; 56 __u32 pad; 57 __u64 timeout_ns; 58 }; 59 struct drm_v3d_create_bo { 60 __u32 size; 61 __u32 flags; 62 __u32 handle; 63 __u32 offset; 64 }; 65 struct drm_v3d_mmap_bo { 66 __u32 handle; 67 __u32 flags; 68 __u64 offset; 69 }; 70 enum drm_v3d_param { 71 DRM_V3D_PARAM_V3D_UIFCFG, 72 DRM_V3D_PARAM_V3D_HUB_IDENT1, 73 DRM_V3D_PARAM_V3D_HUB_IDENT2, 74 DRM_V3D_PARAM_V3D_HUB_IDENT3, 75 DRM_V3D_PARAM_V3D_CORE0_IDENT0, 76 DRM_V3D_PARAM_V3D_CORE0_IDENT1, 77 DRM_V3D_PARAM_V3D_CORE0_IDENT2, 78 DRM_V3D_PARAM_SUPPORTS_TFU, 79 }; 80 struct drm_v3d_get_param { 81 __u32 param; 82 __u32 pad; 83 __u64 value; 84 }; 85 struct drm_v3d_get_bo_offset { 86 __u32 handle; 87 __u32 offset; 88 }; 89 struct drm_v3d_submit_tfu { 90 __u32 icfg; 91 __u32 iia; 92 __u32 iis; 93 __u32 ica; 94 __u32 iua; 95 __u32 ioa; 96 __u32 ios; 97 __u32 coef[4]; 98 __u32 bo_handles[4]; 99 __u32 in_sync; 100 __u32 out_sync; 101 }; 102 #ifdef __cplusplus 103 } 104 #endif 105 #endif 106