1 /**************************************************************************** 2 **************************************************************************** 3 *** 4 *** This header was automatically generated from a Linux kernel header 5 *** of the same name, to make information necessary for userspace to 6 *** call into the kernel available to libc. It contains only constants, 7 *** structures, and macros generated from the original header, and thus, 8 *** contains no copyrightable information. 9 *** 10 *** To edit the content of this header, modify the corresponding 11 *** source file (e.g. under external/kernel-headers/original/) then 12 *** run bionic/libc/kernel/tools/update_all.py 13 *** 14 *** Any manual change here will be lost the next time this script will 15 *** be run. You've been warned! 16 *** 17 **************************************************************************** 18 ****************************************************************************/ 19 #ifndef __UAPI_MSM_CAMERA_H 20 #define __UAPI_MSM_CAMERA_H 21 #define CAM_API_V1 22 #include <linux/videodev2.h> 23 #include <linux/types.h> 24 #include <linux/ioctl.h> 25 #include <linux/media.h> 26 #include <linux/msm_ion.h> 27 #define BIT(nr) (1UL << (nr)) 28 #define MSM_CAM_IOCTL_MAGIC 'm' 29 #define MAX_SERVER_PAYLOAD_LENGTH 8192 30 #define MSM_CAM_IOCTL_GET_SENSOR_INFO _IOR(MSM_CAM_IOCTL_MAGIC, 1, struct msm_camsensor_info *) 31 #define MSM_CAM_IOCTL_REGISTER_PMEM _IOW(MSM_CAM_IOCTL_MAGIC, 2, struct msm_pmem_info *) 32 #define MSM_CAM_IOCTL_UNREGISTER_PMEM _IOW(MSM_CAM_IOCTL_MAGIC, 3, unsigned int) 33 #define MSM_CAM_IOCTL_CTRL_COMMAND _IOW(MSM_CAM_IOCTL_MAGIC, 4, struct msm_ctrl_cmd *) 34 #define MSM_CAM_IOCTL_CONFIG_VFE _IOW(MSM_CAM_IOCTL_MAGIC, 5, struct msm_camera_vfe_cfg_cmd *) 35 #define MSM_CAM_IOCTL_GET_STATS _IOR(MSM_CAM_IOCTL_MAGIC, 6, struct msm_camera_stats_event_ctrl *) 36 #define MSM_CAM_IOCTL_GETFRAME _IOR(MSM_CAM_IOCTL_MAGIC, 7, struct msm_camera_get_frame *) 37 #define MSM_CAM_IOCTL_ENABLE_VFE _IOW(MSM_CAM_IOCTL_MAGIC, 8, struct camera_enable_cmd *) 38 #define MSM_CAM_IOCTL_CTRL_CMD_DONE _IOW(MSM_CAM_IOCTL_MAGIC, 9, struct camera_cmd *) 39 #define MSM_CAM_IOCTL_CONFIG_CMD _IOW(MSM_CAM_IOCTL_MAGIC, 10, struct camera_cmd *) 40 #define MSM_CAM_IOCTL_DISABLE_VFE _IOW(MSM_CAM_IOCTL_MAGIC, 11, struct camera_enable_cmd *) 41 #define MSM_CAM_IOCTL_PAD_REG_RESET2 _IOW(MSM_CAM_IOCTL_MAGIC, 12, struct camera_enable_cmd *) 42 #define MSM_CAM_IOCTL_VFE_APPS_RESET _IOW(MSM_CAM_IOCTL_MAGIC, 13, struct camera_enable_cmd *) 43 #define MSM_CAM_IOCTL_RELEASE_FRAME_BUFFER _IOW(MSM_CAM_IOCTL_MAGIC, 14, struct camera_enable_cmd *) 44 #define MSM_CAM_IOCTL_RELEASE_STATS_BUFFER _IOW(MSM_CAM_IOCTL_MAGIC, 15, struct msm_stats_buf *) 45 #define MSM_CAM_IOCTL_AXI_CONFIG _IOW(MSM_CAM_IOCTL_MAGIC, 16, struct msm_camera_vfe_cfg_cmd *) 46 #define MSM_CAM_IOCTL_GET_PICTURE _IOW(MSM_CAM_IOCTL_MAGIC, 17, struct msm_frame *) 47 #define MSM_CAM_IOCTL_SET_CROP _IOW(MSM_CAM_IOCTL_MAGIC, 18, struct crop_info *) 48 #define MSM_CAM_IOCTL_PICT_PP _IOW(MSM_CAM_IOCTL_MAGIC, 19, uint8_t *) 49 #define MSM_CAM_IOCTL_PICT_PP_DONE _IOW(MSM_CAM_IOCTL_MAGIC, 20, struct msm_snapshot_pp_status *) 50 #define MSM_CAM_IOCTL_SENSOR_IO_CFG _IOW(MSM_CAM_IOCTL_MAGIC, 21, struct sensor_cfg_data *) 51 #define MSM_CAM_IOCTL_FLASH_LED_CFG _IOW(MSM_CAM_IOCTL_MAGIC, 22, unsigned int *) 52 #define MSM_CAM_IOCTL_UNBLOCK_POLL_FRAME _IO(MSM_CAM_IOCTL_MAGIC, 23) 53 #define MSM_CAM_IOCTL_CTRL_COMMAND_2 _IOW(MSM_CAM_IOCTL_MAGIC, 24, struct msm_ctrl_cmd *) 54 #define MSM_CAM_IOCTL_AF_CTRL _IOR(MSM_CAM_IOCTL_MAGIC, 25, struct msm_ctrl_cmt_t *) 55 #define MSM_CAM_IOCTL_AF_CTRL_DONE _IOW(MSM_CAM_IOCTL_MAGIC, 26, struct msm_ctrl_cmt_t *) 56 #define MSM_CAM_IOCTL_CONFIG_VPE _IOW(MSM_CAM_IOCTL_MAGIC, 27, struct msm_camera_vpe_cfg_cmd *) 57 #define MSM_CAM_IOCTL_AXI_VPE_CONFIG _IOW(MSM_CAM_IOCTL_MAGIC, 28, struct msm_camera_vpe_cfg_cmd *) 58 #define MSM_CAM_IOCTL_STROBE_FLASH_CFG _IOW(MSM_CAM_IOCTL_MAGIC, 29, uint32_t *) 59 #define MSM_CAM_IOCTL_STROBE_FLASH_CHARGE _IOW(MSM_CAM_IOCTL_MAGIC, 30, uint32_t *) 60 #define MSM_CAM_IOCTL_STROBE_FLASH_RELEASE _IO(MSM_CAM_IOCTL_MAGIC, 31) 61 #define MSM_CAM_IOCTL_FLASH_CTRL _IOW(MSM_CAM_IOCTL_MAGIC, 32, struct flash_ctrl_data *) 62 #define MSM_CAM_IOCTL_ERROR_CONFIG _IOW(MSM_CAM_IOCTL_MAGIC, 33, uint32_t *) 63 #define MSM_CAM_IOCTL_ABORT_CAPTURE _IO(MSM_CAM_IOCTL_MAGIC, 34) 64 #define MSM_CAM_IOCTL_SET_FD_ROI _IOW(MSM_CAM_IOCTL_MAGIC, 35, struct fd_roi_info *) 65 #define MSM_CAM_IOCTL_GET_CAMERA_INFO _IOR(MSM_CAM_IOCTL_MAGIC, 36, struct msm_camera_info *) 66 #define MSM_CAM_IOCTL_UNBLOCK_POLL_PIC_FRAME _IO(MSM_CAM_IOCTL_MAGIC, 37) 67 #define MSM_CAM_IOCTL_RELEASE_PIC_BUFFER _IOW(MSM_CAM_IOCTL_MAGIC, 38, struct camera_enable_cmd *) 68 #define MSM_CAM_IOCTL_PUT_ST_FRAME _IOW(MSM_CAM_IOCTL_MAGIC, 39, struct msm_camera_st_frame *) 69 #define MSM_CAM_IOCTL_V4L2_EVT_NOTIFY _IOW(MSM_CAM_IOCTL_MAGIC, 40, struct v4l2_event_and_payload) 70 #define MSM_CAM_IOCTL_SET_MEM_MAP_INFO _IOR(MSM_CAM_IOCTL_MAGIC, 41, struct msm_mem_map_info *) 71 #define MSM_CAM_IOCTL_ACTUATOR_IO_CFG _IOW(MSM_CAM_IOCTL_MAGIC, 42, struct msm_actuator_cfg_data *) 72 #define MSM_CAM_IOCTL_MCTL_POST_PROC _IOW(MSM_CAM_IOCTL_MAGIC, 43, struct msm_mctl_post_proc_cmd *) 73 #define MSM_CAM_IOCTL_RESERVE_FREE_FRAME _IOW(MSM_CAM_IOCTL_MAGIC, 44, struct msm_cam_evt_divert_frame *) 74 #define MSM_CAM_IOCTL_RELEASE_FREE_FRAME _IOR(MSM_CAM_IOCTL_MAGIC, 45, struct msm_cam_evt_divert_frame *) 75 #define MSM_CAM_IOCTL_PICT_PP_DIVERT_DONE _IOR(MSM_CAM_IOCTL_MAGIC, 46, struct msm_pp_frame *) 76 #define MSM_CAM_IOCTL_SENSOR_V4l2_S_CTRL _IOR(MSM_CAM_IOCTL_MAGIC, 47, struct v4l2_control) 77 #define MSM_CAM_IOCTL_SENSOR_V4l2_QUERY_CTRL _IOR(MSM_CAM_IOCTL_MAGIC, 48, struct v4l2_queryctrl) 78 #define MSM_CAM_IOCTL_GET_KERNEL_SYSTEM_TIME _IOW(MSM_CAM_IOCTL_MAGIC, 49, struct timeval *) 79 #define MSM_CAM_IOCTL_SET_VFE_OUTPUT_TYPE _IOW(MSM_CAM_IOCTL_MAGIC, 50, uint32_t *) 80 #define MSM_CAM_IOCTL_MCTL_DIVERT_DONE _IOR(MSM_CAM_IOCTL_MAGIC, 51, struct msm_cam_evt_divert_frame *) 81 #define MSM_CAM_IOCTL_GET_ACTUATOR_INFO _IOW(MSM_CAM_IOCTL_MAGIC, 52, struct msm_actuator_cfg_data *) 82 #define MSM_CAM_IOCTL_EEPROM_IO_CFG _IOW(MSM_CAM_IOCTL_MAGIC, 53, struct msm_eeprom_cfg_data *) 83 #define MSM_CAM_IOCTL_ISPIF_IO_CFG _IOR(MSM_CAM_IOCTL_MAGIC, 54, struct ispif_cfg_data *) 84 #define MSM_CAM_IOCTL_STATS_REQBUF _IOR(MSM_CAM_IOCTL_MAGIC, 55, struct msm_stats_reqbuf *) 85 #define MSM_CAM_IOCTL_STATS_ENQUEUEBUF _IOR(MSM_CAM_IOCTL_MAGIC, 56, struct msm_stats_buf_info *) 86 #define MSM_CAM_IOCTL_STATS_FLUSH_BUFQ _IOR(MSM_CAM_IOCTL_MAGIC, 57, struct msm_stats_flush_bufq *) 87 #define MSM_CAM_IOCTL_SET_MCTL_SDEV _IOW(MSM_CAM_IOCTL_MAGIC, 58, struct msm_mctl_set_sdev_data *) 88 #define MSM_CAM_IOCTL_UNSET_MCTL_SDEV _IOW(MSM_CAM_IOCTL_MAGIC, 59, struct msm_mctl_set_sdev_data *) 89 #define MSM_CAM_IOCTL_GET_INST_HANDLE _IOR(MSM_CAM_IOCTL_MAGIC, 60, uint32_t *) 90 #define MSM_CAM_IOCTL_STATS_UNREG_BUF _IOR(MSM_CAM_IOCTL_MAGIC, 61, struct msm_stats_flush_bufq *) 91 #define MSM_CAM_IOCTL_CSIC_IO_CFG _IOWR(MSM_CAM_IOCTL_MAGIC, 62, struct csic_cfg_data *) 92 #define MSM_CAM_IOCTL_CSID_IO_CFG _IOWR(MSM_CAM_IOCTL_MAGIC, 63, struct csid_cfg_data *) 93 #define MSM_CAM_IOCTL_CSIPHY_IO_CFG _IOR(MSM_CAM_IOCTL_MAGIC, 64, struct csiphy_cfg_data *) 94 #define MSM_CAM_IOCTL_OEM _IOW(MSM_CAM_IOCTL_MAGIC, 65, struct sensor_cfg_data *) 95 #define MSM_CAM_IOCTL_AXI_INIT _IOWR(MSM_CAM_IOCTL_MAGIC, 66, uint8_t *) 96 #define MSM_CAM_IOCTL_AXI_RELEASE _IO(MSM_CAM_IOCTL_MAGIC, 67) 97 struct v4l2_event_and_payload { 98 struct v4l2_event evt; 99 uint32_t payload_length; 100 uint32_t transaction_id; 101 void * payload; 102 }; 103 struct msm_stats_reqbuf { 104 int num_buf; 105 int stats_type; 106 }; 107 struct msm_stats_flush_bufq { 108 int stats_type; 109 }; 110 struct msm_mctl_pp_cmd { 111 int32_t id; 112 uint16_t length; 113 void * value; 114 }; 115 struct msm_mctl_post_proc_cmd { 116 int32_t type; 117 struct msm_mctl_pp_cmd cmd; 118 }; 119 #define MSM_CAMERA_LED_OFF 0 120 #define MSM_CAMERA_LED_LOW 1 121 #define MSM_CAMERA_LED_HIGH 2 122 #define MSM_CAMERA_LED_INIT 3 123 #define MSM_CAMERA_LED_RELEASE 4 124 #define MSM_CAMERA_STROBE_FLASH_NONE 0 125 #define MSM_CAMERA_STROBE_FLASH_XENON 1 126 #define MSM_MAX_CAMERA_SENSORS 5 127 #define MAX_SENSOR_NAME 32 128 #define MAX_CAM_NAME_SIZE 32 129 #define MAX_ACT_MOD_NAME_SIZE 32 130 #define MAX_ACT_NAME_SIZE 32 131 #define NUM_ACTUATOR_DIR 2 132 #define MAX_ACTUATOR_SCENARIO 8 133 #define MAX_ACTUATOR_REGION 5 134 #define MAX_ACTUATOR_INIT_SET 12 135 #define MAX_ACTUATOR_TYPE_SIZE 32 136 #define MAX_ACTUATOR_REG_TBL_SIZE 8 137 #define MSM_MAX_CAMERA_CONFIGS 2 138 #define PP_SNAP 0x01 139 #define PP_RAW_SNAP ((0x01) << 1) 140 #define PP_PREV ((0x01) << 2) 141 #define PP_THUMB ((0x01) << 3) 142 #define PP_MASK (PP_SNAP | PP_RAW_SNAP | PP_PREV | PP_THUMB) 143 #define MSM_CAM_CTRL_CMD_DONE 0 144 #define MSM_CAM_SENSOR_VFE_CMD 1 145 #define MAX_PLANES 8 146 struct msm_ctrl_cmd { 147 uint16_t type; 148 uint16_t length; 149 void * value; 150 uint16_t status; 151 uint32_t timeout_ms; 152 int resp_fd; 153 int vnode_id; 154 int queue_idx; 155 uint32_t evt_id; 156 uint32_t stream_type; 157 int config_ident; 158 }; 159 struct msm_cam_evt_msg { 160 unsigned short type; 161 unsigned short msg_id; 162 unsigned int len; 163 uint32_t frame_id; 164 void * data; 165 struct timespec timestamp; 166 }; 167 struct msm_pp_frame_sp { 168 unsigned long phy_addr; 169 uint32_t y_off; 170 uint32_t cbcr_off; 171 uint32_t length; 172 int32_t fd; 173 uint32_t addr_offset; 174 unsigned long vaddr; 175 }; 176 struct msm_pp_frame_mp { 177 unsigned long phy_addr; 178 uint32_t data_offset; 179 uint32_t length; 180 int32_t fd; 181 uint32_t addr_offset; 182 unsigned long vaddr; 183 }; 184 struct msm_pp_frame { 185 uint32_t handle; 186 uint32_t frame_id; 187 unsigned short buf_idx; 188 int path; 189 unsigned short image_type; 190 unsigned short num_planes; 191 struct timeval timestamp; 192 union { 193 struct msm_pp_frame_sp sp; 194 struct msm_pp_frame_mp mp[MAX_PLANES]; 195 }; 196 int node_type; 197 uint32_t inst_handle; 198 }; 199 struct msm_pp_crop { 200 uint32_t src_x; 201 uint32_t src_y; 202 uint32_t src_w; 203 uint32_t src_h; 204 uint32_t dst_x; 205 uint32_t dst_y; 206 uint32_t dst_w; 207 uint32_t dst_h; 208 uint8_t update_flag; 209 }; 210 struct msm_mctl_pp_frame_cmd { 211 uint32_t cookie; 212 uint8_t vpe_output_action; 213 struct msm_pp_frame src_frame; 214 struct msm_pp_frame dest_frame; 215 struct msm_pp_crop crop; 216 int path; 217 }; 218 struct msm_cam_evt_divert_frame { 219 unsigned short image_mode; 220 unsigned short op_mode; 221 unsigned short inst_idx; 222 unsigned short node_idx; 223 struct msm_pp_frame frame; 224 int do_pp; 225 }; 226 struct msm_mctl_pp_cmd_ack_event { 227 uint32_t cmd; 228 int status; 229 uint32_t cookie; 230 }; 231 struct msm_mctl_pp_event_info { 232 int32_t event; 233 union { 234 struct msm_mctl_pp_cmd_ack_event ack; 235 }; 236 }; 237 struct msm_isp_event_ctrl { 238 unsigned short resptype; 239 union { 240 struct msm_cam_evt_msg isp_msg; 241 struct msm_ctrl_cmd ctrl; 242 struct msm_cam_evt_divert_frame div_frame; 243 struct msm_mctl_pp_event_info pp_event_info; 244 } isp_data; 245 }; 246 #define MSM_CAM_RESP_CTRL 0 247 #define MSM_CAM_RESP_STAT_EVT_MSG 1 248 #define MSM_CAM_RESP_STEREO_OP_1 2 249 #define MSM_CAM_RESP_STEREO_OP_2 3 250 #define MSM_CAM_RESP_V4L2 4 251 #define MSM_CAM_RESP_DIV_FRAME_EVT_MSG 5 252 #define MSM_CAM_RESP_DONE_EVENT 6 253 #define MSM_CAM_RESP_MCTL_PP_EVENT 7 254 #define MSM_CAM_RESP_MAX 8 255 #define MSM_CAM_APP_NOTIFY_EVENT 0 256 #define MSM_CAM_APP_NOTIFY_ERROR_EVENT 1 257 struct msm_stats_event_ctrl { 258 int resptype; 259 int timeout_ms; 260 struct msm_ctrl_cmd ctrl_cmd; 261 struct msm_cam_evt_msg stats_event; 262 }; 263 struct msm_camera_cfg_cmd { 264 uint16_t cfg_type; 265 uint16_t cmd_type; 266 uint16_t queue; 267 uint16_t length; 268 void * value; 269 }; 270 #define CMD_GENERAL 0 271 #define CMD_AXI_CFG_OUT1 1 272 #define CMD_AXI_CFG_SNAP_O1_AND_O2 2 273 #define CMD_AXI_CFG_OUT2 3 274 #define CMD_PICT_T_AXI_CFG 4 275 #define CMD_PICT_M_AXI_CFG 5 276 #define CMD_RAW_PICT_AXI_CFG 6 277 #define CMD_FRAME_BUF_RELEASE 7 278 #define CMD_PREV_BUF_CFG 8 279 #define CMD_SNAP_BUF_RELEASE 9 280 #define CMD_SNAP_BUF_CFG 10 281 #define CMD_STATS_DISABLE 11 282 #define CMD_STATS_AEC_AWB_ENABLE 12 283 #define CMD_STATS_AF_ENABLE 13 284 #define CMD_STATS_AEC_ENABLE 14 285 #define CMD_STATS_AWB_ENABLE 15 286 #define CMD_STATS_ENABLE 16 287 #define CMD_STATS_AXI_CFG 17 288 #define CMD_STATS_AEC_AXI_CFG 18 289 #define CMD_STATS_AF_AXI_CFG 19 290 #define CMD_STATS_AWB_AXI_CFG 20 291 #define CMD_STATS_RS_AXI_CFG 21 292 #define CMD_STATS_CS_AXI_CFG 22 293 #define CMD_STATS_IHIST_AXI_CFG 23 294 #define CMD_STATS_SKIN_AXI_CFG 24 295 #define CMD_STATS_BUF_RELEASE 25 296 #define CMD_STATS_AEC_BUF_RELEASE 26 297 #define CMD_STATS_AF_BUF_RELEASE 27 298 #define CMD_STATS_AWB_BUF_RELEASE 28 299 #define CMD_STATS_RS_BUF_RELEASE 29 300 #define CMD_STATS_CS_BUF_RELEASE 30 301 #define CMD_STATS_IHIST_BUF_RELEASE 31 302 #define CMD_STATS_SKIN_BUF_RELEASE 32 303 #define UPDATE_STATS_INVALID 33 304 #define CMD_AXI_CFG_SNAP_GEMINI 34 305 #define CMD_AXI_CFG_SNAP 35 306 #define CMD_AXI_CFG_PREVIEW 36 307 #define CMD_AXI_CFG_VIDEO 37 308 #define CMD_STATS_IHIST_ENABLE 38 309 #define CMD_STATS_RS_ENABLE 39 310 #define CMD_STATS_CS_ENABLE 40 311 #define CMD_VPE 41 312 #define CMD_AXI_CFG_VPE 42 313 #define CMD_AXI_CFG_ZSL 43 314 #define CMD_AXI_CFG_SNAP_VPE 44 315 #define CMD_AXI_CFG_SNAP_THUMB_VPE 45 316 #define CMD_CONFIG_PING_ADDR 46 317 #define CMD_CONFIG_PONG_ADDR 47 318 #define CMD_CONFIG_FREE_BUF_ADDR 48 319 #define CMD_AXI_CFG_ZSL_ALL_CHNLS 49 320 #define CMD_AXI_CFG_VIDEO_ALL_CHNLS 50 321 #define CMD_VFE_BUFFER_RELEASE 51 322 #define CMD_VFE_PROCESS_IRQ 52 323 #define CMD_STATS_BG_ENABLE 53 324 #define CMD_STATS_BF_ENABLE 54 325 #define CMD_STATS_BHIST_ENABLE 55 326 #define CMD_STATS_BG_BUF_RELEASE 56 327 #define CMD_STATS_BF_BUF_RELEASE 57 328 #define CMD_STATS_BHIST_BUF_RELEASE 58 329 #define CMD_VFE_PIX_SOF_COUNT_UPDATE 59 330 #define CMD_VFE_COUNT_PIX_SOF_ENABLE 60 331 #define CMD_STATS_BE_ENABLE 61 332 #define CMD_STATS_BE_BUF_RELEASE 62 333 #define CMD_AXI_CFG_PRIM BIT(8) 334 #define CMD_AXI_CFG_PRIM_ALL_CHNLS BIT(9) 335 #define CMD_AXI_CFG_SEC BIT(10) 336 #define CMD_AXI_CFG_SEC_ALL_CHNLS BIT(11) 337 #define CMD_AXI_CFG_TERT1 BIT(12) 338 #define CMD_AXI_CFG_TERT2 BIT(13) 339 #define CMD_AXI_START 0xE1 340 #define CMD_AXI_STOP 0xE2 341 #define CMD_AXI_RESET 0xE3 342 #define CMD_AXI_ABORT 0xE4 343 #define AXI_CMD_PREVIEW BIT(0) 344 #define AXI_CMD_CAPTURE BIT(1) 345 #define AXI_CMD_RECORD BIT(2) 346 #define AXI_CMD_ZSL BIT(3) 347 #define AXI_CMD_RAW_CAPTURE BIT(4) 348 #define AXI_CMD_LIVESHOT BIT(5) 349 struct msm_vfe_cfg_cmd { 350 int cmd_type; 351 uint16_t length; 352 void * value; 353 }; 354 struct msm_vpe_cfg_cmd { 355 int cmd_type; 356 uint16_t length; 357 void * value; 358 }; 359 #define MAX_CAMERA_ENABLE_NAME_LEN 32 360 struct camera_enable_cmd { 361 char name[MAX_CAMERA_ENABLE_NAME_LEN]; 362 }; 363 #define MSM_PMEM_OUTPUT1 0 364 #define MSM_PMEM_OUTPUT2 1 365 #define MSM_PMEM_OUTPUT1_OUTPUT2 2 366 #define MSM_PMEM_THUMBNAIL 3 367 #define MSM_PMEM_MAINIMG 4 368 #define MSM_PMEM_RAW_MAINIMG 5 369 #define MSM_PMEM_AEC_AWB 6 370 #define MSM_PMEM_AF 7 371 #define MSM_PMEM_AEC 8 372 #define MSM_PMEM_AWB 9 373 #define MSM_PMEM_RS 10 374 #define MSM_PMEM_CS 11 375 #define MSM_PMEM_IHIST 12 376 #define MSM_PMEM_SKIN 13 377 #define MSM_PMEM_VIDEO 14 378 #define MSM_PMEM_PREVIEW 15 379 #define MSM_PMEM_VIDEO_VPE 16 380 #define MSM_PMEM_C2D 17 381 #define MSM_PMEM_MAINIMG_VPE 18 382 #define MSM_PMEM_THUMBNAIL_VPE 19 383 #define MSM_PMEM_BAYER_GRID 20 384 #define MSM_PMEM_BAYER_FOCUS 21 385 #define MSM_PMEM_BAYER_HIST 22 386 #define MSM_PMEM_BAYER_EXPOSURE 23 387 #define MSM_PMEM_MAX 24 388 #define STAT_AEAW 0 389 #define STAT_AEC 1 390 #define STAT_AF 2 391 #define STAT_AWB 3 392 #define STAT_RS 4 393 #define STAT_CS 5 394 #define STAT_IHIST 6 395 #define STAT_SKIN 7 396 #define STAT_BG 8 397 #define STAT_BF 9 398 #define STAT_BE 10 399 #define STAT_BHIST 11 400 #define STAT_MAX 12 401 #define FRAME_PREVIEW_OUTPUT1 0 402 #define FRAME_PREVIEW_OUTPUT2 1 403 #define FRAME_SNAPSHOT 2 404 #define FRAME_THUMBNAIL 3 405 #define FRAME_RAW_SNAPSHOT 4 406 #define FRAME_MAX 5 407 enum msm_stats_enum_type { 408 MSM_STATS_TYPE_AEC, 409 MSM_STATS_TYPE_AF, 410 MSM_STATS_TYPE_AWB, 411 MSM_STATS_TYPE_RS, 412 MSM_STATS_TYPE_CS, 413 MSM_STATS_TYPE_IHIST, 414 MSM_STATS_TYPE_SKIN, 415 MSM_STATS_TYPE_BG, 416 MSM_STATS_TYPE_BF, 417 MSM_STATS_TYPE_BE, 418 MSM_STATS_TYPE_BHIST, 419 MSM_STATS_TYPE_AE_AW, 420 MSM_STATS_TYPE_COMP, 421 MSM_STATS_TYPE_MAX 422 }; 423 struct msm_stats_buf_info { 424 int type; 425 int fd; 426 void * vaddr; 427 uint32_t offset; 428 uint32_t len; 429 uint32_t y_off; 430 uint32_t cbcr_off; 431 uint32_t planar0_off; 432 uint32_t planar1_off; 433 uint32_t planar2_off; 434 uint8_t active; 435 int buf_idx; 436 }; 437 struct msm_pmem_info { 438 int type; 439 int fd; 440 void * vaddr; 441 uint32_t offset; 442 uint32_t len; 443 uint32_t y_off; 444 uint32_t cbcr_off; 445 uint32_t planar0_off; 446 uint32_t planar1_off; 447 uint32_t planar2_off; 448 uint8_t active; 449 }; 450 struct outputCfg { 451 uint32_t height; 452 uint32_t width; 453 uint32_t window_height_firstline; 454 uint32_t window_height_lastline; 455 }; 456 #define VIDEO_NODE 0 457 #define MCTL_NODE 1 458 #define OUTPUT_1 0 459 #define OUTPUT_2 1 460 #define OUTPUT_1_AND_2 2 461 #define OUTPUT_1_AND_3 3 462 #define CAMIF_TO_AXI_VIA_OUTPUT_2 4 463 #define OUTPUT_1_AND_CAMIF_TO_AXI_VIA_OUTPUT_2 5 464 #define OUTPUT_2_AND_CAMIF_TO_AXI_VIA_OUTPUT_1 6 465 #define OUTPUT_1_2_AND_3 7 466 #define OUTPUT_ALL_CHNLS 8 467 #define OUTPUT_VIDEO_ALL_CHNLS 9 468 #define OUTPUT_ZSL_ALL_CHNLS 10 469 #define LAST_AXI_OUTPUT_MODE_ENUM OUTPUT_ZSL_ALL_CHNLS 470 #define OUTPUT_PRIM BIT(8) 471 #define OUTPUT_PRIM_ALL_CHNLS BIT(9) 472 #define OUTPUT_SEC BIT(10) 473 #define OUTPUT_SEC_ALL_CHNLS BIT(11) 474 #define OUTPUT_TERT1 BIT(12) 475 #define OUTPUT_TERT2 BIT(13) 476 #define MSM_FRAME_PREV_1 0 477 #define MSM_FRAME_PREV_2 1 478 #define MSM_FRAME_ENC 2 479 #define OUTPUT_TYPE_P BIT(0) 480 #define OUTPUT_TYPE_T BIT(1) 481 #define OUTPUT_TYPE_S BIT(2) 482 #define OUTPUT_TYPE_V BIT(3) 483 #define OUTPUT_TYPE_L BIT(4) 484 #define OUTPUT_TYPE_ST_L BIT(5) 485 #define OUTPUT_TYPE_ST_R BIT(6) 486 #define OUTPUT_TYPE_ST_D BIT(7) 487 #define OUTPUT_TYPE_R BIT(8) 488 #define OUTPUT_TYPE_R1 BIT(9) 489 #define OUTPUT_TYPE_SAEC BIT(10) 490 #define OUTPUT_TYPE_SAFC BIT(11) 491 #define OUTPUT_TYPE_SAWB BIT(12) 492 #define OUTPUT_TYPE_IHST BIT(13) 493 #define OUTPUT_TYPE_CSTA BIT(14) 494 struct fd_roi_info { 495 void * info; 496 int info_len; 497 }; 498 struct msm_mem_map_info { 499 uint32_t cookie; 500 uint32_t length; 501 uint32_t mem_type; 502 }; 503 #define MSM_MEM_MMAP 0 504 #define MSM_MEM_USERPTR 1 505 #define MSM_PLANE_MAX 8 506 #define MSM_PLANE_Y 0 507 #define MSM_PLANE_UV 1 508 struct msm_frame { 509 struct timespec ts; 510 int path; 511 int type; 512 unsigned long buffer; 513 uint32_t phy_offset; 514 uint32_t y_off; 515 uint32_t cbcr_off; 516 uint32_t planar0_off; 517 uint32_t planar1_off; 518 uint32_t planar2_off; 519 int fd; 520 void * cropinfo; 521 int croplen; 522 uint32_t error_code; 523 struct fd_roi_info roi_info; 524 uint32_t frame_id; 525 int stcam_quality_ind; 526 uint32_t stcam_conv_value; 527 struct ion_allocation_data ion_alloc; 528 struct ion_fd_data fd_data; 529 int ion_dev_fd; 530 }; 531 enum msm_st_frame_packing { 532 SIDE_BY_SIDE_HALF, 533 SIDE_BY_SIDE_FULL, 534 TOP_DOWN_HALF, 535 TOP_DOWN_FULL, 536 }; 537 struct msm_st_crop { 538 uint32_t in_w; 539 uint32_t in_h; 540 uint32_t out_w; 541 uint32_t out_h; 542 }; 543 struct msm_st_half { 544 uint32_t buf_p0_off; 545 uint32_t buf_p1_off; 546 uint32_t buf_p0_stride; 547 uint32_t buf_p1_stride; 548 uint32_t pix_x_off; 549 uint32_t pix_y_off; 550 struct msm_st_crop stCropInfo; 551 }; 552 struct msm_st_frame { 553 struct msm_frame buf_info; 554 int type; 555 enum msm_st_frame_packing packing; 556 struct msm_st_half L; 557 struct msm_st_half R; 558 int frame_id; 559 }; 560 #define MSM_CAMERA_ERR_MASK (0xFFFFFFFF & 1) 561 struct stats_buff { 562 unsigned long buff; 563 int fd; 564 }; 565 struct msm_stats_buf { 566 uint8_t awb_ymin; 567 struct stats_buff aec; 568 struct stats_buff awb; 569 struct stats_buff af; 570 struct stats_buff be; 571 struct stats_buff ihist; 572 struct stats_buff rs; 573 struct stats_buff cs; 574 struct stats_buff skin; 575 int type; 576 uint32_t status_bits; 577 unsigned long buffer; 578 int fd; 579 int length; 580 struct ion_handle * handle; 581 uint32_t frame_id; 582 int buf_idx; 583 }; 584 #define MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT 0 585 #define MSM_V4L2_EXT_CAPTURE_MODE_PREVIEW (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT + 1) 586 #define MSM_V4L2_EXT_CAPTURE_MODE_VIDEO (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT + 2) 587 #define MSM_V4L2_EXT_CAPTURE_MODE_MAIN (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT + 3) 588 #define MSM_V4L2_EXT_CAPTURE_MODE_THUMBNAIL (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT + 4) 589 #define MSM_V4L2_EXT_CAPTURE_MODE_ISP_PIX_OUTPUT1 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT + 5) 590 #define MSM_V4L2_EXT_CAPTURE_MODE_ISP_PIX_OUTPUT2 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT + 6) 591 #define MSM_V4L2_EXT_CAPTURE_MODE_RAW (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT + 7) 592 #define MSM_V4L2_EXT_CAPTURE_MODE_RDI (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT + 8) 593 #define MSM_V4L2_EXT_CAPTURE_MODE_RDI1 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT + 9) 594 #define MSM_V4L2_EXT_CAPTURE_MODE_RDI2 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT + 10) 595 #define MSM_V4L2_EXT_CAPTURE_MODE_AEC (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT + 11) 596 #define MSM_V4L2_EXT_CAPTURE_MODE_AWB (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT + 12) 597 #define MSM_V4L2_EXT_CAPTURE_MODE_AF (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT + 13) 598 #define MSM_V4L2_EXT_CAPTURE_MODE_IHIST (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT + 14) 599 #define MSM_V4L2_EXT_CAPTURE_MODE_CS (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT + 15) 600 #define MSM_V4L2_EXT_CAPTURE_MODE_RS (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT + 16) 601 #define MSM_V4L2_EXT_CAPTURE_MODE_CSTA (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT + 17) 602 #define MSM_V4L2_EXT_CAPTURE_MODE_V2X_LIVESHOT (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT + 18) 603 #define MSM_V4L2_EXT_CAPTURE_MODE_MAX (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT + 19) 604 #define MSM_V4L2_PID_MOTION_ISO V4L2_CID_PRIVATE_BASE 605 #define MSM_V4L2_PID_EFFECT (V4L2_CID_PRIVATE_BASE + 1) 606 #define MSM_V4L2_PID_HJR (V4L2_CID_PRIVATE_BASE + 2) 607 #define MSM_V4L2_PID_LED_MODE (V4L2_CID_PRIVATE_BASE + 3) 608 #define MSM_V4L2_PID_PREP_SNAPSHOT (V4L2_CID_PRIVATE_BASE + 4) 609 #define MSM_V4L2_PID_EXP_METERING (V4L2_CID_PRIVATE_BASE + 5) 610 #define MSM_V4L2_PID_ISO (V4L2_CID_PRIVATE_BASE + 6) 611 #define MSM_V4L2_PID_CAM_MODE (V4L2_CID_PRIVATE_BASE + 7) 612 #define MSM_V4L2_PID_LUMA_ADAPTATION (V4L2_CID_PRIVATE_BASE + 8) 613 #define MSM_V4L2_PID_BEST_SHOT (V4L2_CID_PRIVATE_BASE + 9) 614 #define MSM_V4L2_PID_FOCUS_MODE (V4L2_CID_PRIVATE_BASE + 10) 615 #define MSM_V4L2_PID_BL_DETECTION (V4L2_CID_PRIVATE_BASE + 11) 616 #define MSM_V4L2_PID_SNOW_DETECTION (V4L2_CID_PRIVATE_BASE + 12) 617 #define MSM_V4L2_PID_CTRL_CMD (V4L2_CID_PRIVATE_BASE + 13) 618 #define MSM_V4L2_PID_EVT_SUB_INFO (V4L2_CID_PRIVATE_BASE + 14) 619 #define MSM_V4L2_PID_STROBE_FLASH (V4L2_CID_PRIVATE_BASE + 15) 620 #define MSM_V4L2_PID_INST_HANDLE (V4L2_CID_PRIVATE_BASE + 16) 621 #define MSM_V4L2_PID_MMAP_INST (V4L2_CID_PRIVATE_BASE + 17) 622 #define MSM_V4L2_PID_PP_PLANE_INFO (V4L2_CID_PRIVATE_BASE + 18) 623 #define MSM_V4L2_PID_MAX MSM_V4L2_PID_PP_PLANE_INFO 624 #define MSM_V4L2_CAM_OP_DEFAULT 0 625 #define MSM_V4L2_CAM_OP_PREVIEW (MSM_V4L2_CAM_OP_DEFAULT + 1) 626 #define MSM_V4L2_CAM_OP_VIDEO (MSM_V4L2_CAM_OP_DEFAULT + 2) 627 #define MSM_V4L2_CAM_OP_CAPTURE (MSM_V4L2_CAM_OP_DEFAULT + 3) 628 #define MSM_V4L2_CAM_OP_ZSL (MSM_V4L2_CAM_OP_DEFAULT + 4) 629 #define MSM_V4L2_CAM_OP_RAW (MSM_V4L2_CAM_OP_DEFAULT + 5) 630 #define MSM_V4L2_CAM_OP_JPEG_CAPTURE (MSM_V4L2_CAM_OP_DEFAULT + 6) 631 #define MSM_V4L2_VID_CAP_TYPE 0 632 #define MSM_V4L2_STREAM_ON 1 633 #define MSM_V4L2_STREAM_OFF 2 634 #define MSM_V4L2_SNAPSHOT 3 635 #define MSM_V4L2_QUERY_CTRL 4 636 #define MSM_V4L2_GET_CTRL 5 637 #define MSM_V4L2_SET_CTRL 6 638 #define MSM_V4L2_QUERY 7 639 #define MSM_V4L2_GET_CROP 8 640 #define MSM_V4L2_SET_CROP 9 641 #define MSM_V4L2_OPEN 10 642 #define MSM_V4L2_CLOSE 11 643 #define MSM_V4L2_SET_CTRL_CMD 12 644 #define MSM_V4L2_EVT_SUB_MASK 13 645 #define MSM_V4L2_PRIVATE_CMD 14 646 #define MSM_V4L2_MAX 15 647 #define V4L2_CAMERA_EXIT 43 648 struct crop_info { 649 void * info; 650 int len; 651 }; 652 struct msm_postproc { 653 int ftnum; 654 struct msm_frame fthumnail; 655 int fmnum; 656 struct msm_frame fmain; 657 }; 658 struct msm_snapshot_pp_status { 659 void * status; 660 }; 661 #define CFG_SET_MODE 0 662 #define CFG_SET_EFFECT 1 663 #define CFG_START 2 664 #define CFG_PWR_UP 3 665 #define CFG_PWR_DOWN 4 666 #define CFG_WRITE_EXPOSURE_GAIN 5 667 #define CFG_SET_DEFAULT_FOCUS 6 668 #define CFG_MOVE_FOCUS 7 669 #define CFG_REGISTER_TO_REAL_GAIN 8 670 #define CFG_REAL_TO_REGISTER_GAIN 9 671 #define CFG_SET_FPS 10 672 #define CFG_SET_PICT_FPS 11 673 #define CFG_SET_BRIGHTNESS 12 674 #define CFG_SET_CONTRAST 13 675 #define CFG_SET_ZOOM 14 676 #define CFG_SET_EXPOSURE_MODE 15 677 #define CFG_SET_WB 16 678 #define CFG_SET_ANTIBANDING 17 679 #define CFG_SET_EXP_GAIN 18 680 #define CFG_SET_PICT_EXP_GAIN 19 681 #define CFG_SET_LENS_SHADING 20 682 #define CFG_GET_PICT_FPS 21 683 #define CFG_GET_PREV_L_PF 22 684 #define CFG_GET_PREV_P_PL 23 685 #define CFG_GET_PICT_L_PF 24 686 #define CFG_GET_PICT_P_PL 25 687 #define CFG_GET_AF_MAX_STEPS 26 688 #define CFG_GET_PICT_MAX_EXP_LC 27 689 #define CFG_SEND_WB_INFO 28 690 #define CFG_SENSOR_INIT 29 691 #define CFG_GET_3D_CALI_DATA 30 692 #define CFG_GET_CALIB_DATA 31 693 #define CFG_GET_OUTPUT_INFO 32 694 #define CFG_GET_EEPROM_INFO 33 695 #define CFG_GET_EEPROM_DATA 34 696 #define CFG_SET_ACTUATOR_INFO 35 697 #define CFG_GET_ACTUATOR_INFO 36 698 #define CFG_SET_SATURATION 37 699 #define CFG_SET_SHARPNESS 38 700 #define CFG_SET_TOUCHAEC 39 701 #define CFG_SET_AUTO_FOCUS 40 702 #define CFG_SET_AUTOFLASH 41 703 #define CFG_SET_EXPOSURE_COMPENSATION 42 704 #define CFG_SET_ISO 43 705 #define CFG_START_STREAM 44 706 #define CFG_STOP_STREAM 45 707 #define CFG_GET_CSI_PARAMS 46 708 #define CFG_POWER_UP 47 709 #define CFG_POWER_DOWN 48 710 #define CFG_WRITE_I2C_ARRAY 49 711 #define CFG_READ_I2C_ARRAY 50 712 #define CFG_PCLK_CHANGE 51 713 #define CFG_CONFIG_VREG_ARRAY 52 714 #define CFG_CONFIG_CLK_ARRAY 53 715 #define CFG_GPIO_OP 54 716 #define CFG_MAX 55 717 #define MOVE_NEAR 0 718 #define MOVE_FAR 1 719 #define SENSOR_PREVIEW_MODE 0 720 #define SENSOR_SNAPSHOT_MODE 1 721 #define SENSOR_RAW_SNAPSHOT_MODE 2 722 #define SENSOR_HFR_60FPS_MODE 3 723 #define SENSOR_HFR_90FPS_MODE 4 724 #define SENSOR_HFR_120FPS_MODE 5 725 #define SENSOR_QTR_SIZE 0 726 #define SENSOR_FULL_SIZE 1 727 #define SENSOR_QVGA_SIZE 2 728 #define SENSOR_INVALID_SIZE 3 729 #define CAMERA_EFFECT_OFF 0 730 #define CAMERA_EFFECT_MONO 1 731 #define CAMERA_EFFECT_NEGATIVE 2 732 #define CAMERA_EFFECT_SOLARIZE 3 733 #define CAMERA_EFFECT_SEPIA 4 734 #define CAMERA_EFFECT_POSTERIZE 5 735 #define CAMERA_EFFECT_WHITEBOARD 6 736 #define CAMERA_EFFECT_BLACKBOARD 7 737 #define CAMERA_EFFECT_AQUA 8 738 #define CAMERA_EFFECT_EMBOSS 9 739 #define CAMERA_EFFECT_SKETCH 10 740 #define CAMERA_EFFECT_NEON 11 741 #define CAMERA_EFFECT_FADED 12 742 #define CAMERA_EFFECT_VINTAGECOOL 13 743 #define CAMERA_EFFECT_VINTAGEWARM 14 744 #define CAMERA_EFFECT_ACCENT_BLUE 15 745 #define CAMERA_EFFECT_ACCENT_GREEN 16 746 #define CAMERA_EFFECT_ACCENT_ORANGE 17 747 #define CAMERA_EFFECT_MAX 18 748 #define CAMERA_EFFECT_BW 10 749 #define CAMERA_EFFECT_BLUISH 12 750 #define CAMERA_EFFECT_REDDISH 13 751 #define CAMERA_EFFECT_GREENISH 14 752 #define CAMERA_ANTIBANDING_OFF 0 753 #define CAMERA_ANTIBANDING_50HZ 2 754 #define CAMERA_ANTIBANDING_60HZ 1 755 #define CAMERA_ANTIBANDING_AUTO 3 756 #define CAMERA_CONTRAST_LV0 0 757 #define CAMERA_CONTRAST_LV1 1 758 #define CAMERA_CONTRAST_LV2 2 759 #define CAMERA_CONTRAST_LV3 3 760 #define CAMERA_CONTRAST_LV4 4 761 #define CAMERA_CONTRAST_LV5 5 762 #define CAMERA_CONTRAST_LV6 6 763 #define CAMERA_CONTRAST_LV7 7 764 #define CAMERA_CONTRAST_LV8 8 765 #define CAMERA_CONTRAST_LV9 9 766 #define CAMERA_BRIGHTNESS_LV0 0 767 #define CAMERA_BRIGHTNESS_LV1 1 768 #define CAMERA_BRIGHTNESS_LV2 2 769 #define CAMERA_BRIGHTNESS_LV3 3 770 #define CAMERA_BRIGHTNESS_LV4 4 771 #define CAMERA_BRIGHTNESS_LV5 5 772 #define CAMERA_BRIGHTNESS_LV6 6 773 #define CAMERA_BRIGHTNESS_LV7 7 774 #define CAMERA_BRIGHTNESS_LV8 8 775 #define CAMERA_SATURATION_LV0 0 776 #define CAMERA_SATURATION_LV1 1 777 #define CAMERA_SATURATION_LV2 2 778 #define CAMERA_SATURATION_LV3 3 779 #define CAMERA_SATURATION_LV4 4 780 #define CAMERA_SATURATION_LV5 5 781 #define CAMERA_SATURATION_LV6 6 782 #define CAMERA_SATURATION_LV7 7 783 #define CAMERA_SATURATION_LV8 8 784 #define CAMERA_SHARPNESS_LV0 0 785 #define CAMERA_SHARPNESS_LV1 3 786 #define CAMERA_SHARPNESS_LV2 6 787 #define CAMERA_SHARPNESS_LV3 9 788 #define CAMERA_SHARPNESS_LV4 12 789 #define CAMERA_SHARPNESS_LV5 15 790 #define CAMERA_SHARPNESS_LV6 18 791 #define CAMERA_SHARPNESS_LV7 21 792 #define CAMERA_SHARPNESS_LV8 24 793 #define CAMERA_SHARPNESS_LV9 27 794 #define CAMERA_SHARPNESS_LV10 30 795 #define CAMERA_SETAE_AVERAGE 0 796 #define CAMERA_SETAE_CENWEIGHT 1 797 #define CAMERA_WB_AUTO 1 798 #define CAMERA_WB_CUSTOM 2 799 #define CAMERA_WB_INCANDESCENT 3 800 #define CAMERA_WB_FLUORESCENT 4 801 #define CAMERA_WB_DAYLIGHT 5 802 #define CAMERA_WB_CLOUDY_DAYLIGHT 6 803 #define CAMERA_WB_TWILIGHT 7 804 #define CAMERA_WB_SHADE 8 805 #define CAMERA_EXPOSURE_COMPENSATION_LV0 12 806 #define CAMERA_EXPOSURE_COMPENSATION_LV1 6 807 #define CAMERA_EXPOSURE_COMPENSATION_LV2 0 808 #define CAMERA_EXPOSURE_COMPENSATION_LV3 - 6 809 #define CAMERA_EXPOSURE_COMPENSATION_LV4 - 12 810 enum msm_v4l2_saturation_level { 811 MSM_V4L2_SATURATION_L0, 812 MSM_V4L2_SATURATION_L1, 813 MSM_V4L2_SATURATION_L2, 814 MSM_V4L2_SATURATION_L3, 815 MSM_V4L2_SATURATION_L4, 816 MSM_V4L2_SATURATION_L5, 817 MSM_V4L2_SATURATION_L6, 818 MSM_V4L2_SATURATION_L7, 819 MSM_V4L2_SATURATION_L8, 820 MSM_V4L2_SATURATION_L9, 821 MSM_V4L2_SATURATION_L10, 822 }; 823 enum msm_v4l2_contrast_level { 824 MSM_V4L2_CONTRAST_L0, 825 MSM_V4L2_CONTRAST_L1, 826 MSM_V4L2_CONTRAST_L2, 827 MSM_V4L2_CONTRAST_L3, 828 MSM_V4L2_CONTRAST_L4, 829 MSM_V4L2_CONTRAST_L5, 830 MSM_V4L2_CONTRAST_L6, 831 MSM_V4L2_CONTRAST_L7, 832 MSM_V4L2_CONTRAST_L8, 833 MSM_V4L2_CONTRAST_L9, 834 MSM_V4L2_CONTRAST_L10, 835 }; 836 enum msm_v4l2_exposure_level { 837 MSM_V4L2_EXPOSURE_N2, 838 MSM_V4L2_EXPOSURE_N1, 839 MSM_V4L2_EXPOSURE_D, 840 MSM_V4L2_EXPOSURE_P1, 841 MSM_V4L2_EXPOSURE_P2, 842 }; 843 enum msm_v4l2_sharpness_level { 844 MSM_V4L2_SHARPNESS_L0, 845 MSM_V4L2_SHARPNESS_L1, 846 MSM_V4L2_SHARPNESS_L2, 847 MSM_V4L2_SHARPNESS_L3, 848 MSM_V4L2_SHARPNESS_L4, 849 MSM_V4L2_SHARPNESS_L5, 850 MSM_V4L2_SHARPNESS_L6, 851 }; 852 enum msm_v4l2_expo_metering_mode { 853 MSM_V4L2_EXP_FRAME_AVERAGE, 854 MSM_V4L2_EXP_CENTER_WEIGHTED, 855 MSM_V4L2_EXP_SPOT_METERING, 856 }; 857 enum msm_v4l2_iso_mode { 858 MSM_V4L2_ISO_AUTO = 0, 859 MSM_V4L2_ISO_DEBLUR, 860 MSM_V4L2_ISO_100, 861 MSM_V4L2_ISO_200, 862 MSM_V4L2_ISO_400, 863 MSM_V4L2_ISO_800, 864 MSM_V4L2_ISO_1600, 865 }; 866 enum msm_v4l2_wb_mode { 867 MSM_V4L2_WB_OFF, 868 MSM_V4L2_WB_AUTO, 869 MSM_V4L2_WB_CUSTOM, 870 MSM_V4L2_WB_INCANDESCENT, 871 MSM_V4L2_WB_FLUORESCENT, 872 MSM_V4L2_WB_DAYLIGHT, 873 MSM_V4L2_WB_CLOUDY_DAYLIGHT, 874 }; 875 enum msm_v4l2_special_effect { 876 MSM_V4L2_EFFECT_OFF, 877 MSM_V4L2_EFFECT_MONO, 878 MSM_V4L2_EFFECT_NEGATIVE, 879 MSM_V4L2_EFFECT_SOLARIZE, 880 MSM_V4L2_EFFECT_SEPIA, 881 MSM_V4L2_EFFECT_POSTERAIZE, 882 MSM_V4L2_EFFECT_WHITEBOARD, 883 MSM_V4L2_EFFECT_BLACKBOARD, 884 MSM_V4L2_EFFECT_AQUA, 885 MSM_V4L2_EFFECT_EMBOSS, 886 MSM_V4L2_EFFECT_SKETCH, 887 MSM_V4L2_EFFECT_NEON, 888 MSM_V4L2_EFFECT_MAX, 889 }; 890 enum msm_v4l2_power_line_frequency { 891 MSM_V4L2_POWER_LINE_OFF, 892 MSM_V4L2_POWER_LINE_60HZ, 893 MSM_V4L2_POWER_LINE_50HZ, 894 MSM_V4L2_POWER_LINE_AUTO, 895 }; 896 #define CAMERA_ISO_TYPE_AUTO 0 897 #define CAMEAR_ISO_TYPE_HJR 1 898 #define CAMEAR_ISO_TYPE_100 2 899 #define CAMERA_ISO_TYPE_200 3 900 #define CAMERA_ISO_TYPE_400 4 901 #define CAMEAR_ISO_TYPE_800 5 902 #define CAMERA_ISO_TYPE_1600 6 903 struct sensor_pict_fps { 904 uint16_t prevfps; 905 uint16_t pictfps; 906 }; 907 struct exp_gain_cfg { 908 uint16_t gain; 909 uint32_t line; 910 }; 911 struct focus_cfg { 912 int32_t steps; 913 int dir; 914 }; 915 struct fps_cfg { 916 uint16_t f_mult; 917 uint16_t fps_div; 918 uint32_t pict_fps_div; 919 }; 920 struct wb_info_cfg { 921 uint16_t red_gain; 922 uint16_t green_gain; 923 uint16_t blue_gain; 924 }; 925 struct sensor_3d_exp_cfg { 926 uint16_t gain; 927 uint32_t line; 928 uint16_t r_gain; 929 uint16_t b_gain; 930 uint16_t gr_gain; 931 uint16_t gb_gain; 932 uint16_t gain_adjust; 933 }; 934 struct sensor_3d_cali_data_t { 935 unsigned char left_p_matrix[3][4][8]; 936 unsigned char right_p_matrix[3][4][8]; 937 unsigned char square_len[8]; 938 unsigned char focal_len[8]; 939 unsigned char pixel_pitch[8]; 940 uint16_t left_r; 941 uint16_t left_b; 942 uint16_t left_gb; 943 uint16_t left_af_far; 944 uint16_t left_af_mid; 945 uint16_t left_af_short; 946 uint16_t left_af_5um; 947 uint16_t left_af_50up; 948 uint16_t left_af_50down; 949 uint16_t right_r; 950 uint16_t right_b; 951 uint16_t right_gb; 952 uint16_t right_af_far; 953 uint16_t right_af_mid; 954 uint16_t right_af_short; 955 uint16_t right_af_5um; 956 uint16_t right_af_50up; 957 uint16_t right_af_50down; 958 }; 959 struct sensor_init_cfg { 960 uint8_t prev_res; 961 uint8_t pict_res; 962 }; 963 struct sensor_calib_data { 964 uint16_t r_over_g; 965 uint16_t b_over_g; 966 uint16_t gr_over_gb; 967 uint16_t macro_2_inf; 968 uint16_t inf_2_macro; 969 uint16_t stroke_amt; 970 uint16_t af_pos_1m; 971 uint16_t af_pos_inf; 972 }; 973 enum msm_sensor_resolution_t { 974 MSM_SENSOR_RES_FULL, 975 MSM_SENSOR_RES_QTR, 976 MSM_SENSOR_RES_2, 977 MSM_SENSOR_RES_3, 978 MSM_SENSOR_RES_4, 979 MSM_SENSOR_RES_5, 980 MSM_SENSOR_RES_6, 981 MSM_SENSOR_RES_7, 982 MSM_SENSOR_INVALID_RES, 983 }; 984 struct msm_sensor_output_info_t { 985 uint16_t x_output; 986 uint16_t y_output; 987 uint16_t line_length_pclk; 988 uint16_t frame_length_lines; 989 uint32_t vt_pixel_clk; 990 uint32_t op_pixel_clk; 991 uint16_t binning_factor; 992 }; 993 struct sensor_output_info_t { 994 struct msm_sensor_output_info_t * output_info; 995 uint16_t num_info; 996 }; 997 struct msm_sensor_exp_gain_info_t { 998 uint16_t coarse_int_time_addr; 999 uint16_t global_gain_addr; 1000 uint16_t vert_offset; 1001 }; 1002 struct msm_sensor_output_reg_addr_t { 1003 uint16_t x_output; 1004 uint16_t y_output; 1005 uint16_t line_length_pclk; 1006 uint16_t frame_length_lines; 1007 }; 1008 struct sensor_driver_params_type { 1009 struct msm_camera_i2c_reg_setting * init_settings; 1010 uint16_t init_settings_size; 1011 struct msm_camera_i2c_reg_setting * mode_settings; 1012 uint16_t mode_settings_size; 1013 struct msm_sensor_output_reg_addr_t * sensor_output_reg_addr; 1014 struct msm_camera_i2c_reg_setting * start_settings; 1015 struct msm_camera_i2c_reg_setting * stop_settings; 1016 struct msm_camera_i2c_reg_setting * groupon_settings; 1017 struct msm_camera_i2c_reg_setting * groupoff_settings; 1018 struct msm_sensor_exp_gain_info_t * sensor_exp_gain_info; 1019 struct msm_sensor_output_info_t * output_info; 1020 }; 1021 struct mirror_flip { 1022 int32_t x_mirror; 1023 int32_t y_flip; 1024 }; 1025 struct cord { 1026 uint32_t x; 1027 uint32_t y; 1028 }; 1029 struct msm_eeprom_data_t { 1030 void * eeprom_data; 1031 uint16_t index; 1032 }; 1033 struct msm_camera_csid_vc_cfg { 1034 uint8_t cid; 1035 uint8_t dt; 1036 uint8_t decode_format; 1037 }; 1038 struct csi_lane_params_t { 1039 uint16_t csi_lane_assign; 1040 uint8_t csi_lane_mask; 1041 uint8_t csi_if; 1042 uint8_t csid_core[2]; 1043 uint8_t csi_phy_sel; 1044 }; 1045 struct msm_camera_csid_lut_params { 1046 uint8_t num_cid; 1047 struct msm_camera_csid_vc_cfg * vc_cfg; 1048 }; 1049 struct msm_camera_csid_params { 1050 uint8_t lane_cnt; 1051 uint16_t lane_assign; 1052 uint8_t phy_sel; 1053 struct msm_camera_csid_lut_params lut_params; 1054 }; 1055 struct msm_camera_csiphy_params { 1056 uint8_t lane_cnt; 1057 uint8_t settle_cnt; 1058 uint16_t lane_mask; 1059 uint8_t combo_mode; 1060 uint8_t csid_core; 1061 uint64_t data_rate; 1062 }; 1063 struct msm_camera_csi2_params { 1064 struct msm_camera_csid_params csid_params; 1065 struct msm_camera_csiphy_params csiphy_params; 1066 }; 1067 enum msm_camera_csi_data_format { 1068 CSI_8BIT, 1069 CSI_10BIT, 1070 CSI_12BIT, 1071 }; 1072 struct msm_camera_csi_params { 1073 enum msm_camera_csi_data_format data_format; 1074 uint8_t lane_cnt; 1075 uint8_t lane_assign; 1076 uint8_t settle_cnt; 1077 uint8_t dpcm_scheme; 1078 }; 1079 enum csic_cfg_type_t { 1080 CSIC_INIT, 1081 CSIC_CFG, 1082 }; 1083 struct csic_cfg_data { 1084 enum csic_cfg_type_t cfgtype; 1085 struct msm_camera_csi_params * csic_params; 1086 }; 1087 enum csid_cfg_type_t { 1088 CSID_INIT, 1089 CSID_CFG, 1090 }; 1091 struct csid_cfg_data { 1092 enum csid_cfg_type_t cfgtype; 1093 union { 1094 uint32_t csid_version; 1095 struct msm_camera_csid_params * csid_params; 1096 } cfg; 1097 }; 1098 enum csiphy_cfg_type_t { 1099 CSIPHY_INIT, 1100 CSIPHY_CFG, 1101 }; 1102 struct csiphy_cfg_data { 1103 enum csiphy_cfg_type_t cfgtype; 1104 struct msm_camera_csiphy_params * csiphy_params; 1105 }; 1106 #define CSI_EMBED_DATA 0x12 1107 #define CSI_RESERVED_DATA_0 0x13 1108 #define CSI_YUV422_8 0x1E 1109 #define CSI_RAW8 0x2A 1110 #define CSI_RAW10 0x2B 1111 #define CSI_RAW12 0x2C 1112 #define CSI_DECODE_6BIT 0 1113 #define CSI_DECODE_8BIT 1 1114 #define CSI_DECODE_10BIT 2 1115 #define CSI_DECODE_DPCM_10_8_10 5 1116 #define ISPIF_STREAM(intf,action,vfe) (((intf) << ISPIF_S_STREAM_SHIFT) + (action) + ((vfe) << ISPIF_VFE_INTF_SHIFT)) 1117 #define ISPIF_ON_FRAME_BOUNDARY (0x01 << 0) 1118 #define ISPIF_OFF_FRAME_BOUNDARY (0x01 << 1) 1119 #define ISPIF_OFF_IMMEDIATELY (0x01 << 2) 1120 #define ISPIF_S_STREAM_SHIFT 4 1121 #define ISPIF_VFE_INTF_SHIFT 12 1122 #define PIX_0 (0x01 << 0) 1123 #define RDI_0 (0x01 << 1) 1124 #define PIX_1 (0x01 << 2) 1125 #define RDI_1 (0x01 << 3) 1126 #define RDI_2 (0x01 << 4) 1127 enum msm_ispif_vfe_intf { 1128 VFE0, 1129 VFE1, 1130 VFE_MAX, 1131 }; 1132 enum msm_ispif_intftype { 1133 PIX0, 1134 RDI0, 1135 PIX1, 1136 RDI1, 1137 RDI2, 1138 INTF_MAX, 1139 }; 1140 enum msm_ispif_vc { 1141 VC0, 1142 VC1, 1143 VC2, 1144 VC3, 1145 }; 1146 enum msm_ispif_cid { 1147 CID0, 1148 CID1, 1149 CID2, 1150 CID3, 1151 CID4, 1152 CID5, 1153 CID6, 1154 CID7, 1155 CID8, 1156 CID9, 1157 CID10, 1158 CID11, 1159 CID12, 1160 CID13, 1161 CID14, 1162 CID15, 1163 }; 1164 struct msm_ispif_params { 1165 uint8_t intftype; 1166 uint16_t cid_mask; 1167 uint8_t csid; 1168 uint8_t vfe_intf; 1169 }; 1170 struct msm_ispif_params_list { 1171 uint32_t len; 1172 struct msm_ispif_params params[4]; 1173 }; 1174 enum ispif_cfg_type_t { 1175 ISPIF_INIT, 1176 ISPIF_SET_CFG, 1177 ISPIF_SET_ON_FRAME_BOUNDARY, 1178 ISPIF_SET_OFF_FRAME_BOUNDARY, 1179 ISPIF_SET_OFF_IMMEDIATELY, 1180 ISPIF_RELEASE, 1181 }; 1182 struct ispif_cfg_data { 1183 enum ispif_cfg_type_t cfgtype; 1184 union { 1185 uint32_t csid_version; 1186 int cmd; 1187 struct msm_ispif_params_list ispif_params; 1188 } cfg; 1189 }; 1190 enum msm_camera_i2c_reg_addr_type { 1191 MSM_CAMERA_I2C_BYTE_ADDR = 1, 1192 MSM_CAMERA_I2C_WORD_ADDR, 1193 MSM_CAMERA_I2C_3B_ADDR, 1194 MSM_CAMERA_I2C_DWORD_ADDR, 1195 }; 1196 #define MSM_CAMERA_I2C_DWORD_ADDR MSM_CAMERA_I2C_DWORD_ADDR 1197 struct msm_camera_i2c_reg_array { 1198 uint16_t reg_addr; 1199 uint16_t reg_data; 1200 }; 1201 enum msm_camera_i2c_data_type { 1202 MSM_CAMERA_I2C_BYTE_DATA = 1, 1203 MSM_CAMERA_I2C_WORD_DATA, 1204 MSM_CAMERA_I2C_SET_BYTE_MASK, 1205 MSM_CAMERA_I2C_UNSET_BYTE_MASK, 1206 MSM_CAMERA_I2C_SET_WORD_MASK, 1207 MSM_CAMERA_I2C_UNSET_WORD_MASK, 1208 MSM_CAMERA_I2C_SET_BYTE_WRITE_MASK_DATA, 1209 }; 1210 struct msm_camera_i2c_reg_setting { 1211 struct msm_camera_i2c_reg_array * reg_setting; 1212 uint16_t size; 1213 enum msm_camera_i2c_reg_addr_type addr_type; 1214 enum msm_camera_i2c_data_type data_type; 1215 uint16_t delay; 1216 }; 1217 enum oem_setting_type { 1218 I2C_READ = 1, 1219 I2C_WRITE, 1220 GPIO_OP, 1221 EEPROM_READ, 1222 VREG_SET, 1223 CLK_SET, 1224 }; 1225 struct sensor_oem_setting { 1226 enum oem_setting_type type; 1227 void * data; 1228 }; 1229 enum camera_vreg_type { 1230 REG_LDO, 1231 REG_VS, 1232 REG_GPIO, 1233 }; 1234 enum msm_camera_vreg_name_t { 1235 CAM_VDIG, 1236 CAM_VIO, 1237 CAM_VANA, 1238 CAM_VAF, 1239 CAM_VREG_MAX, 1240 }; 1241 struct msm_camera_csi_lane_params { 1242 uint16_t csi_lane_assign; 1243 uint16_t csi_lane_mask; 1244 }; 1245 struct camera_vreg_t { 1246 const char * reg_name; 1247 int min_voltage; 1248 int max_voltage; 1249 int op_mode; 1250 uint32_t delay; 1251 }; 1252 struct msm_camera_vreg_setting { 1253 struct camera_vreg_t * cam_vreg; 1254 uint16_t num_vreg; 1255 uint8_t enable; 1256 }; 1257 struct msm_cam_clk_info { 1258 const char * clk_name; 1259 long clk_rate; 1260 uint32_t delay; 1261 }; 1262 struct msm_cam_clk_setting { 1263 struct msm_cam_clk_info * clk_info; 1264 uint16_t num_clk_info; 1265 uint8_t enable; 1266 }; 1267 struct sensor_cfg_data { 1268 int cfgtype; 1269 int mode; 1270 int rs; 1271 uint8_t max_steps; 1272 union { 1273 int8_t effect; 1274 uint8_t lens_shading; 1275 uint16_t prevl_pf; 1276 uint16_t prevp_pl; 1277 uint16_t pictl_pf; 1278 uint16_t pictp_pl; 1279 uint32_t pict_max_exp_lc; 1280 uint16_t p_fps; 1281 uint8_t iso_type; 1282 struct sensor_init_cfg init_info; 1283 struct sensor_pict_fps gfps; 1284 struct exp_gain_cfg exp_gain; 1285 struct focus_cfg focus; 1286 struct fps_cfg fps; 1287 struct wb_info_cfg wb_info; 1288 struct sensor_3d_exp_cfg sensor_3d_exp; 1289 struct sensor_calib_data calib_info; 1290 struct sensor_output_info_t output_info; 1291 struct msm_eeprom_data_t eeprom_data; 1292 struct csi_lane_params_t csi_lane_params; 1293 uint16_t antibanding; 1294 uint8_t contrast; 1295 uint8_t saturation; 1296 uint8_t sharpness; 1297 int8_t brightness; 1298 int ae_mode; 1299 uint8_t wb_val; 1300 int8_t exp_compensation; 1301 uint32_t pclk; 1302 struct cord aec_cord; 1303 int is_autoflash; 1304 struct mirror_flip mirror_flip; 1305 void * setting; 1306 } cfg; 1307 }; 1308 enum gpio_operation_type { 1309 GPIO_REQUEST, 1310 GPIO_FREE, 1311 GPIO_SET_DIRECTION_OUTPUT, 1312 GPIO_SET_DIRECTION_INPUT, 1313 GPIO_GET_VALUE, 1314 GPIO_SET_VALUE, 1315 }; 1316 struct msm_cam_gpio_operation { 1317 enum gpio_operation_type op_type; 1318 unsigned int address; 1319 int value; 1320 const char * tag; 1321 }; 1322 struct damping_params_t { 1323 uint32_t damping_step; 1324 uint32_t damping_delay; 1325 uint32_t hw_params; 1326 }; 1327 enum actuator_type { 1328 ACTUATOR_VCM, 1329 ACTUATOR_PIEZO, 1330 ACTUATOR_HVCM, 1331 ACTUATOR_BIVCM, 1332 }; 1333 enum msm_actuator_data_type { 1334 MSM_ACTUATOR_BYTE_DATA = 1, 1335 MSM_ACTUATOR_WORD_DATA, 1336 }; 1337 enum msm_actuator_addr_type { 1338 MSM_ACTUATOR_BYTE_ADDR = 1, 1339 MSM_ACTUATOR_WORD_ADDR, 1340 }; 1341 enum msm_actuator_write_type { 1342 MSM_ACTUATOR_WRITE_HW_DAMP, 1343 MSM_ACTUATOR_WRITE_DAC, 1344 MSM_ACTUATOR_WRITE, 1345 MSM_ACTUATOR_WRITE_DIR_REG, 1346 MSM_ACTUATOR_POLL, 1347 MSM_ACTUATOR_READ_WRITE, 1348 }; 1349 struct msm_actuator_reg_params_t { 1350 enum msm_actuator_write_type reg_write_type; 1351 uint32_t hw_mask; 1352 uint16_t reg_addr; 1353 uint16_t hw_shift; 1354 uint16_t data_type; 1355 uint16_t addr_type; 1356 uint16_t reg_data; 1357 uint16_t delay; 1358 }; 1359 struct reg_settings_t { 1360 uint16_t reg_addr; 1361 uint16_t reg_data; 1362 }; 1363 struct region_params_t { 1364 uint16_t step_bound[2]; 1365 uint16_t code_per_step; 1366 }; 1367 struct msm_actuator_move_params_t { 1368 int8_t dir; 1369 int8_t sign_dir; 1370 int16_t dest_step_pos; 1371 int32_t num_steps; 1372 struct damping_params_t * ringing_params; 1373 }; 1374 struct msm_actuator_tuning_params_t { 1375 int16_t initial_code; 1376 uint16_t pwd_step; 1377 uint16_t region_size; 1378 uint32_t total_steps; 1379 struct region_params_t * region_params; 1380 }; 1381 struct msm_actuator_params_t { 1382 enum actuator_type act_type; 1383 uint8_t reg_tbl_size; 1384 uint16_t data_size; 1385 uint16_t init_setting_size; 1386 uint32_t i2c_addr; 1387 enum msm_actuator_addr_type i2c_addr_type; 1388 enum msm_actuator_data_type i2c_data_type; 1389 struct msm_actuator_reg_params_t * reg_tbl_params; 1390 struct reg_settings_t * init_settings; 1391 }; 1392 struct msm_actuator_set_info_t { 1393 struct msm_actuator_params_t actuator_params; 1394 struct msm_actuator_tuning_params_t af_tuning_params; 1395 }; 1396 struct msm_actuator_get_info_t { 1397 uint32_t focal_length_num; 1398 uint32_t focal_length_den; 1399 uint32_t f_number_num; 1400 uint32_t f_number_den; 1401 uint32_t f_pix_num; 1402 uint32_t f_pix_den; 1403 uint32_t total_f_dist_num; 1404 uint32_t total_f_dist_den; 1405 uint32_t hor_view_angle_num; 1406 uint32_t hor_view_angle_den; 1407 uint32_t ver_view_angle_num; 1408 uint32_t ver_view_angle_den; 1409 }; 1410 enum af_camera_name { 1411 ACTUATOR_MAIN_CAM_0, 1412 ACTUATOR_MAIN_CAM_1, 1413 ACTUATOR_MAIN_CAM_2, 1414 ACTUATOR_MAIN_CAM_3, 1415 ACTUATOR_MAIN_CAM_4, 1416 ACTUATOR_MAIN_CAM_5, 1417 ACTUATOR_WEB_CAM_0, 1418 ACTUATOR_WEB_CAM_1, 1419 ACTUATOR_WEB_CAM_2, 1420 }; 1421 struct msm_actuator_cfg_data { 1422 int cfgtype; 1423 uint8_t is_af_supported; 1424 union { 1425 struct msm_actuator_move_params_t move; 1426 struct msm_actuator_set_info_t set_info; 1427 struct msm_actuator_get_info_t get_info; 1428 enum af_camera_name cam_name; 1429 } cfg; 1430 }; 1431 struct msm_eeprom_support { 1432 uint16_t is_supported; 1433 uint16_t size; 1434 uint16_t index; 1435 uint16_t qvalue; 1436 }; 1437 struct msm_calib_wb { 1438 uint16_t r_over_g; 1439 uint16_t b_over_g; 1440 uint16_t gr_over_gb; 1441 }; 1442 struct msm_calib_af { 1443 uint16_t macro_dac; 1444 uint16_t inf_dac; 1445 uint16_t start_dac; 1446 }; 1447 struct msm_calib_lsc { 1448 uint16_t r_gain[221]; 1449 uint16_t b_gain[221]; 1450 uint16_t gr_gain[221]; 1451 uint16_t gb_gain[221]; 1452 }; 1453 struct pixel_t { 1454 int x; 1455 int y; 1456 }; 1457 struct msm_calib_dpc { 1458 uint16_t validcount; 1459 struct pixel_t snapshot_coord[128]; 1460 struct pixel_t preview_coord[128]; 1461 struct pixel_t video_coord[128]; 1462 }; 1463 struct msm_calib_raw { 1464 uint8_t * data; 1465 uint32_t size; 1466 }; 1467 struct msm_camera_eeprom_info_t { 1468 struct msm_eeprom_support af; 1469 struct msm_eeprom_support wb; 1470 struct msm_eeprom_support lsc; 1471 struct msm_eeprom_support dpc; 1472 struct msm_eeprom_support raw; 1473 }; 1474 struct msm_eeprom_cfg_data { 1475 int cfgtype; 1476 uint8_t is_eeprom_supported; 1477 union { 1478 struct msm_eeprom_data_t get_data; 1479 struct msm_camera_eeprom_info_t get_info; 1480 } cfg; 1481 }; 1482 struct sensor_large_data { 1483 int cfgtype; 1484 union { 1485 struct sensor_3d_cali_data_t sensor_3d_cali_data; 1486 } data; 1487 }; 1488 enum sensor_type_t { 1489 BAYER, 1490 YUV, 1491 JPEG_SOC, 1492 }; 1493 enum flash_type { 1494 LED_FLASH, 1495 STROBE_FLASH, 1496 }; 1497 enum strobe_flash_ctrl_type { 1498 STROBE_FLASH_CTRL_INIT, 1499 STROBE_FLASH_CTRL_CHARGE, 1500 STROBE_FLASH_CTRL_RELEASE 1501 }; 1502 struct strobe_flash_ctrl_data { 1503 enum strobe_flash_ctrl_type type; 1504 int charge_en; 1505 }; 1506 struct msm_camera_info { 1507 int num_cameras; 1508 uint8_t has_3d_support[MSM_MAX_CAMERA_SENSORS]; 1509 uint8_t is_internal_cam[MSM_MAX_CAMERA_SENSORS]; 1510 uint32_t s_mount_angle[MSM_MAX_CAMERA_SENSORS]; 1511 const char * video_dev_name[MSM_MAX_CAMERA_SENSORS]; 1512 enum sensor_type_t sensor_type[MSM_MAX_CAMERA_SENSORS]; 1513 }; 1514 struct msm_cam_config_dev_info { 1515 int num_config_nodes; 1516 const char * config_dev_name[MSM_MAX_CAMERA_CONFIGS]; 1517 int config_dev_id[MSM_MAX_CAMERA_CONFIGS]; 1518 }; 1519 struct msm_mctl_node_info { 1520 int num_mctl_nodes; 1521 const char * mctl_node_name[MSM_MAX_CAMERA_SENSORS]; 1522 }; 1523 struct flash_ctrl_data { 1524 int flashtype; 1525 union { 1526 int led_state; 1527 struct strobe_flash_ctrl_data strobe_ctrl; 1528 } ctrl_data; 1529 }; 1530 #define GET_NAME 0 1531 #define GET_PREVIEW_LINE_PER_FRAME 1 1532 #define GET_PREVIEW_PIXELS_PER_LINE 2 1533 #define GET_SNAPSHOT_LINE_PER_FRAME 3 1534 #define GET_SNAPSHOT_PIXELS_PER_LINE 4 1535 #define GET_SNAPSHOT_FPS 5 1536 #define GET_SNAPSHOT_MAX_EP_LINE_CNT 6 1537 struct msm_camsensor_info { 1538 char name[MAX_SENSOR_NAME]; 1539 uint8_t flash_enabled; 1540 uint8_t strobe_flash_enabled; 1541 uint8_t actuator_enabled; 1542 uint8_t ispif_supported; 1543 int8_t total_steps; 1544 uint8_t support_3d; 1545 enum flash_type flashtype; 1546 enum sensor_type_t sensor_type; 1547 uint32_t pxlcode; 1548 uint32_t camera_type; 1549 int mount_angle; 1550 uint32_t max_width; 1551 uint32_t max_height; 1552 }; 1553 #define V4L2_SINGLE_PLANE 0 1554 #define V4L2_MULTI_PLANE_Y 0 1555 #define V4L2_MULTI_PLANE_CBCR 1 1556 #define V4L2_MULTI_PLANE_CB 1 1557 #define V4L2_MULTI_PLANE_CR 2 1558 struct plane_data { 1559 int plane_id; 1560 uint32_t offset; 1561 unsigned long size; 1562 }; 1563 struct img_plane_info { 1564 uint32_t width; 1565 uint32_t height; 1566 uint32_t pixelformat; 1567 uint8_t buffer_type; 1568 uint8_t output_port; 1569 uint32_t ext_mode; 1570 uint8_t num_planes; 1571 struct plane_data plane[MAX_PLANES]; 1572 uint32_t sp_y_offset; 1573 uint32_t inst_handle; 1574 }; 1575 #define QCAMERA_NAME "qcamera" 1576 #define QCAMERA_SERVER_NAME "qcamera_server" 1577 #define QCAMERA_VNODE_GROUP_ID MEDIA_ENT_F_IO_V4L 1578 enum msm_cam_subdev_type { 1579 CSIPHY_DEV, 1580 CSID_DEV, 1581 CSIC_DEV, 1582 ISPIF_DEV, 1583 VFE_DEV, 1584 AXI_DEV, 1585 VPE_DEV, 1586 SENSOR_DEV, 1587 ACTUATOR_DEV, 1588 EEPROM_DEV, 1589 GESTURE_DEV, 1590 IRQ_ROUTER_DEV, 1591 CPP_DEV, 1592 CCI_DEV, 1593 FLASH_DEV, 1594 }; 1595 struct msm_mctl_set_sdev_data { 1596 uint32_t revision; 1597 enum msm_cam_subdev_type sdev_type; 1598 }; 1599 #define MSM_CAM_V4L2_IOCTL_GET_CAMERA_INFO _IOWR('V', BASE_VIDIOC_PRIVATE + 1, struct msm_camera_v4l2_ioctl_t) 1600 #define MSM_CAM_V4L2_IOCTL_GET_CONFIG_INFO _IOWR('V', BASE_VIDIOC_PRIVATE + 2, struct msm_camera_v4l2_ioctl_t) 1601 #define MSM_CAM_V4L2_IOCTL_GET_MCTL_INFO _IOWR('V', BASE_VIDIOC_PRIVATE + 3, struct msm_camera_v4l2_ioctl_t) 1602 #define MSM_CAM_V4L2_IOCTL_CTRL_CMD_DONE _IOWR('V', BASE_VIDIOC_PRIVATE + 4, struct msm_camera_v4l2_ioctl_t) 1603 #define MSM_CAM_V4L2_IOCTL_GET_EVENT_PAYLOAD _IOWR('V', BASE_VIDIOC_PRIVATE + 5, struct msm_camera_v4l2_ioctl_t) 1604 #define MSM_CAM_IOCTL_SEND_EVENT _IOWR('V', BASE_VIDIOC_PRIVATE + 6, struct v4l2_event) 1605 #define MSM_CAM_V4L2_IOCTL_CFG_VPE _IOWR('V', BASE_VIDIOC_PRIVATE + 7, struct msm_vpe_cfg_cmd) 1606 #define MSM_CAM_V4L2_IOCTL_PRIVATE_S_CTRL _IOWR('V', BASE_VIDIOC_PRIVATE + 8, struct msm_camera_v4l2_ioctl_t) 1607 #define MSM_CAM_V4L2_IOCTL_PRIVATE_G_CTRL _IOWR('V', BASE_VIDIOC_PRIVATE + 9, struct msm_camera_v4l2_ioctl_t) 1608 #define MSM_CAM_V4L2_IOCTL_PRIVATE_GENERAL _IOW('V', BASE_VIDIOC_PRIVATE + 10, struct msm_camera_v4l2_ioctl_t) 1609 #define VIDIOC_MSM_VPE_INIT _IO('V', BASE_VIDIOC_PRIVATE + 15) 1610 #define VIDIOC_MSM_VPE_RELEASE _IO('V', BASE_VIDIOC_PRIVATE + 16) 1611 #define VIDIOC_MSM_VPE_CFG _IOWR('V', BASE_VIDIOC_PRIVATE + 17, struct msm_mctl_pp_params *) 1612 #define VIDIOC_MSM_AXI_INIT _IOWR('V', BASE_VIDIOC_PRIVATE + 18, uint8_t *) 1613 #define VIDIOC_MSM_AXI_RELEASE _IO('V', BASE_VIDIOC_PRIVATE + 19) 1614 #define VIDIOC_MSM_AXI_CFG _IOWR('V', BASE_VIDIOC_PRIVATE + 20, void *) 1615 #define VIDIOC_MSM_AXI_IRQ _IOWR('V', BASE_VIDIOC_PRIVATE + 21, void *) 1616 #define VIDIOC_MSM_AXI_BUF_CFG _IOWR('V', BASE_VIDIOC_PRIVATE + 22, void *) 1617 #define VIDIOC_MSM_AXI_RDI_COUNT_UPDATE _IOWR('V', BASE_VIDIOC_PRIVATE + 23, void *) 1618 #define VIDIOC_MSM_VFE_INIT _IO('V', BASE_VIDIOC_PRIVATE + 24) 1619 #define VIDIOC_MSM_VFE_RELEASE _IO('V', BASE_VIDIOC_PRIVATE + 25) 1620 struct msm_camera_v4l2_ioctl_t { 1621 uint32_t id; 1622 uint32_t len; 1623 uint32_t trans_code; 1624 void * ioctl_ptr; 1625 }; 1626 struct msm_camera_vfe_params_t { 1627 uint32_t operation_mode; 1628 uint32_t capture_count; 1629 uint8_t skip_reset; 1630 uint8_t stop_immediately; 1631 uint16_t port_info; 1632 uint32_t inst_handle; 1633 uint16_t cmd_type; 1634 }; 1635 enum msm_camss_irq_idx { 1636 CAMERA_SS_IRQ_0, 1637 CAMERA_SS_IRQ_1, 1638 CAMERA_SS_IRQ_2, 1639 CAMERA_SS_IRQ_3, 1640 CAMERA_SS_IRQ_4, 1641 CAMERA_SS_IRQ_5, 1642 CAMERA_SS_IRQ_6, 1643 CAMERA_SS_IRQ_7, 1644 CAMERA_SS_IRQ_8, 1645 CAMERA_SS_IRQ_9, 1646 CAMERA_SS_IRQ_10, 1647 CAMERA_SS_IRQ_11, 1648 CAMERA_SS_IRQ_12, 1649 CAMERA_SS_IRQ_MAX 1650 }; 1651 enum msm_cam_hw_idx { 1652 MSM_CAM_HW_MICRO, 1653 MSM_CAM_HW_CCI, 1654 MSM_CAM_HW_CSI0, 1655 MSM_CAM_HW_CSI1, 1656 MSM_CAM_HW_CSI2, 1657 MSM_CAM_HW_CSI3, 1658 MSM_CAM_HW_ISPIF, 1659 MSM_CAM_HW_CPP, 1660 MSM_CAM_HW_VFE0, 1661 MSM_CAM_HW_VFE1, 1662 MSM_CAM_HW_JPEG0, 1663 MSM_CAM_HW_JPEG1, 1664 MSM_CAM_HW_JPEG2, 1665 MSM_CAM_HW_MAX 1666 }; 1667 struct msm_camera_irq_cfg { 1668 uint32_t cam_hw_mask; 1669 uint8_t irq_idx; 1670 uint8_t num_hwcore; 1671 }; 1672 #define MSM_IRQROUTER_CFG_COMPIRQ _IOWR('V', BASE_VIDIOC_PRIVATE, void *) 1673 #define MAX_NUM_CPP_STRIPS 8 1674 enum msm_cpp_frame_type { 1675 MSM_CPP_OFFLINE_FRAME, 1676 MSM_CPP_REALTIME_FRAME, 1677 }; 1678 struct msm_cpp_frame_info_t { 1679 int32_t frame_id; 1680 uint32_t inst_id; 1681 uint32_t client_id; 1682 enum msm_cpp_frame_type frame_type; 1683 uint32_t num_strips; 1684 }; 1685 struct msm_ver_num_info { 1686 uint32_t main; 1687 uint32_t minor; 1688 uint32_t rev; 1689 }; 1690 #define VIDIOC_MSM_CPP_CFG _IOWR('V', BASE_VIDIOC_PRIVATE, struct msm_camera_v4l2_ioctl_t) 1691 #define VIDIOC_MSM_CPP_GET_EVENTPAYLOAD _IOWR('V', BASE_VIDIOC_PRIVATE + 1, struct msm_camera_v4l2_ioctl_t) 1692 #define VIDIOC_MSM_CPP_GET_INST_INFO _IOWR('V', BASE_VIDIOC_PRIVATE + 2, struct msm_camera_v4l2_ioctl_t) 1693 #define V4L2_EVENT_CPP_FRAME_DONE (V4L2_EVENT_PRIVATE_START + 0) 1694 #define CLR_DEVID_MODE(handle) (handle &= 0x00FFFFFF) 1695 #define SET_DEVID_MODE(handle,data) (handle |= ((0x1 << 31) | ((data & 0x7F) << 24))) 1696 #define GET_DEVID_MODE(handle) ((handle & 0x80000000) ? ((handle & 0x7F000000) >> 24) : 0xFF) 1697 #define CLR_IMG_MODE(handle) (handle &= 0xFF00FFFF) 1698 #define SET_IMG_MODE(handle,data) (handle |= ((0x1 << 23) | ((data & 0x7F) << 16))) 1699 #define GET_IMG_MODE(handle) ((handle & 0x800000) ? ((handle & 0x7F0000) >> 16) : 0xFF) 1700 #define CLR_MCTLPP_INST_IDX(handle) (handle &= 0xFFFF00FF) 1701 #define SET_MCTLPP_INST_IDX(handle,data) (handle |= ((0x1 << 15) | ((data & 0x7F) << 8))) 1702 #define GET_MCTLPP_INST_IDX(handle) ((handle & 0x8000) ? ((handle & 0x7F00) >> 8) : 0xFF) 1703 #define CLR_VIDEO_INST_IDX(handle) (handle &= 0xFFFFFF00) 1704 #define GET_VIDEO_INST_IDX(handle) ((handle & 0x80) ? (handle & 0x7F) : 0xFF) 1705 #define SET_VIDEO_INST_IDX(handle,data) (handle |= (0x1 << 7) | (data & 0x7F)) 1706 #endif 1707 1708