1/** @file 2* Multiple APIC Description Table (MADT) 3* 4* Copyright (c) 2012 - 2014, ARM Limited. All rights reserved. 5* Copyright (c) 2015 - 2016, Hisilicon Limited. All rights reserved. 6* Copyright (c) 2015 - 2016, Linaro Limited. All rights reserved. 7* 8* This program and the accompanying materials 9* 10* This program and the accompanying materials 11* are licensed and made available under the terms and conditions of the BSD License 12* which accompanies this distribution. The full text of the license may be found at 13* http://opensource.org/licenses/bsd-license.php 14* 15* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 16* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 17* 18* Based on the files under ArmPlatformPkg/ArmJunoPkg/AcpiTables/ 19* 20**/ 21 22 23#include <IndustryStandard/Acpi.h> 24#include <Library/AcpiLib.h> 25#include <Library/AcpiNextLib.h> 26#include <Library/ArmLib.h> 27#include <Library/PcdLib.h> 28#include "Hi1616Platform.h" 29 30// Differs from Juno, we have another affinity level beyond cluster and core 31// 0x20000 is only for socket 0 32#define PLATFORM_GET_MPID_TA(ClusterId, CoreId) (0x10000 | ((ClusterId) << 8) | (CoreId)) 33#define PLATFORM_GET_MPID_TB(ClusterId, CoreId) (0x30000 | ((ClusterId) << 8) | (CoreId)) 34#define PLATFORM_GET_MPID_TA_2(ClusterId, CoreId) (0x50000 | ((ClusterId) << 8) | (CoreId)) 35#define PLATFORM_GET_MPID_TB_2(ClusterId, CoreId) (0x70000 | ((ClusterId) << 8) | (CoreId)) 36 37// 38// Multiple APIC Description Table 39// 40#pragma pack (1) 41 42typedef struct { 43 EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER Header; 44 EFI_ACPI_5_1_GIC_STRUCTURE GicInterfaces[64]; 45 EFI_ACPI_6_0_GIC_DISTRIBUTOR_STRUCTURE GicDistributor; 46 EFI_ACPI_6_0_GIC_ITS_STRUCTURE GicITS[8]; 47} EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE; 48 49#pragma pack () 50 51EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE Madt = { 52 { 53 ARM_ACPI_HEADER ( 54 EFI_ACPI_1_0_APIC_SIGNATURE, 55 EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE, 56 EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 57 ), 58 // 59 // MADT specific fields 60 // 61 0, // LocalApicAddress 62 0, // Flags 63 }, 64 { 65 // Format: EFI_ACPI_5_1_GICC_STRUCTURE_INIT(GicId, AcpiCpuUid, Flags, PmuIrq, GicBase, GicVBase, GicHBase, 66 // GsivId, GicRBase, Mpidr) 67 // Note: The GIC Structure of the primary CPU must be the first entry (see note in 5.2.12.14 GICC Structure of 68 // ACPI v5.1). 69 // The cores from a same cluster are kept together. It is not an ACPI requirement but in case the OSPM uses 70 // the ACPI ARM Parking protocol, it might want to wake up the cores in the order of this table. 71 EFI_ACPI_5_1_GICC_STRUCTURE_INIT( 72 0, 0, PLATFORM_GET_MPID_TA(0, 0), EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase), 73 FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, 0x4D000000 + 0x100000 /* GicRBase */), 74 EFI_ACPI_5_1_GICC_STRUCTURE_INIT( 75 1, 1, PLATFORM_GET_MPID_TA(0, 1), EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase), 76 FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, 0x4D000000 + 0x140000 /* GicRBase */), 77 EFI_ACPI_5_1_GICC_STRUCTURE_INIT( 78 2, 2, PLATFORM_GET_MPID_TA(0, 2), EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase), 79 FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, 0x4D000000 + 0x180000 /* GicRBase */), 80 EFI_ACPI_5_1_GICC_STRUCTURE_INIT( 81 3, 3, PLATFORM_GET_MPID_TA(0, 3), EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase), 82 FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, 0x4D000000 + 0x1C0000 /* GicRBase */), 83 EFI_ACPI_5_1_GICC_STRUCTURE_INIT( 84 4, 4, PLATFORM_GET_MPID_TA(1, 0), EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase), 85 FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, 0x4D000000 + 0x200000 /* GicRBase */), 86 EFI_ACPI_5_1_GICC_STRUCTURE_INIT( 87 5, 5, PLATFORM_GET_MPID_TA(1, 1), EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase), 88 FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, 0x4D000000 + 0x240000 /* GicRBase */), 89 EFI_ACPI_5_1_GICC_STRUCTURE_INIT( 90 6, 6, PLATFORM_GET_MPID_TA(1, 2), EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase), 91 FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, 0x4D000000 + 0x280000 /* GicRBase */), 92 EFI_ACPI_5_1_GICC_STRUCTURE_INIT( 93 7, 7, PLATFORM_GET_MPID_TA(1, 3), EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase), 94 FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, 0x4D000000 + 0x2C0000 /* GicRBase */), 95 EFI_ACPI_5_1_GICC_STRUCTURE_INIT( 96 8, 8, PLATFORM_GET_MPID_TA(2, 0), EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase), 97 FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, 0x4D000000 + 0x300000 /* GicRBase */), 98 EFI_ACPI_5_1_GICC_STRUCTURE_INIT( 99 9, 9, PLATFORM_GET_MPID_TA(2, 1), EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase), 100 FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, 0x4D000000 + 0x340000 /* GicRBase */), 101 EFI_ACPI_5_1_GICC_STRUCTURE_INIT( 102 10, 10, PLATFORM_GET_MPID_TA(2, 2), EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase), 103 FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, 0x4D000000 + 0x380000 /* GicRBase */), 104 EFI_ACPI_5_1_GICC_STRUCTURE_INIT( 105 11, 11, PLATFORM_GET_MPID_TA(2, 3), EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase), 106 FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, 0x4D000000 + 0x3C0000 /* GicRBase */), 107 EFI_ACPI_5_1_GICC_STRUCTURE_INIT( 108 12, 12, PLATFORM_GET_MPID_TA(3, 0), EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase), 109 FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, 0x4D000000 + 0x400000 /* GicRBase */), 110 EFI_ACPI_5_1_GICC_STRUCTURE_INIT( 111 13, 13, PLATFORM_GET_MPID_TA(3, 1), EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase), 112 FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, 0x4D000000 + 0x440000 /* GicRBase */), 113 EFI_ACPI_5_1_GICC_STRUCTURE_INIT( 114 14, 14, PLATFORM_GET_MPID_TA(3, 2), EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase), 115 FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, 0x4D000000 + 0x480000 /* GicRBase */), 116 EFI_ACPI_5_1_GICC_STRUCTURE_INIT( 117 15, 15, PLATFORM_GET_MPID_TA(3, 3), EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase), 118 FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, 0x4D000000 + 0x4C0000 /* GicRBase */), 119 EFI_ACPI_5_1_GICC_STRUCTURE_INIT( 120 16, 16, PLATFORM_GET_MPID_TB(0, 0), EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase), 121 FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, 0x4D000000 + 0x20000000 + 0x100000 /* GicRBase */), 122 EFI_ACPI_5_1_GICC_STRUCTURE_INIT( 123 17, 17, PLATFORM_GET_MPID_TB(0, 1), EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase), 124 FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, 0x4D000000 + 0x20000000 + 0x140000 /* GicRBase */), 125 EFI_ACPI_5_1_GICC_STRUCTURE_INIT( 126 18, 18, PLATFORM_GET_MPID_TB(0, 2), EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase), 127 FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, 0x4D000000 + 0x20000000 + 0x180000 /* GicRBase */), 128 EFI_ACPI_5_1_GICC_STRUCTURE_INIT( 129 19, 19, PLATFORM_GET_MPID_TB(0, 3), EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase), 130 FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, 0x4D000000 + 0x20000000 + 0x1C0000 /* GicRBase */), 131 EFI_ACPI_5_1_GICC_STRUCTURE_INIT( 132 20, 20, PLATFORM_GET_MPID_TB(1, 0), EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase), 133 FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, 0x4D000000 + 0x20000000 + 0x200000 /* GicRBase */), 134 EFI_ACPI_5_1_GICC_STRUCTURE_INIT( 135 21, 21, PLATFORM_GET_MPID_TB(1, 1), EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase), 136 FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, 0x4D000000 + 0x20000000 + 0x240000 /* GicRBase */), 137 EFI_ACPI_5_1_GICC_STRUCTURE_INIT( 138 22, 22, PLATFORM_GET_MPID_TB(1, 2), EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase), 139 FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, 0x4D000000 + 0x20000000 + 0x280000 /* GicRBase */), 140 EFI_ACPI_5_1_GICC_STRUCTURE_INIT( 141 23, 23, PLATFORM_GET_MPID_TB(1, 3), EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase), 142 FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, 0x4D000000 + 0x20000000 + 0x2C0000 /* GicRBase */), 143 EFI_ACPI_5_1_GICC_STRUCTURE_INIT( 144 24, 24, PLATFORM_GET_MPID_TB(2, 0), EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase), 145 FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, 0x4D000000 + 0x20000000 + 0x300000 /* GicRBase */), 146 EFI_ACPI_5_1_GICC_STRUCTURE_INIT( 147 25, 25, PLATFORM_GET_MPID_TB(2, 1), EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase), 148 FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, 0x4D000000 + 0x20000000 + 0x340000 /* GicRBase */), 149 EFI_ACPI_5_1_GICC_STRUCTURE_INIT( 150 26, 26, PLATFORM_GET_MPID_TB(2, 2), EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase), 151 FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, 0x4D000000 + 0x20000000 + 0x380000 /* GicRBase */), 152 EFI_ACPI_5_1_GICC_STRUCTURE_INIT( 153 27, 27, PLATFORM_GET_MPID_TB(2, 3), EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase), 154 FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, 0x4D000000 + 0x20000000 + 0x3C0000 /* GicRBase */), 155 EFI_ACPI_5_1_GICC_STRUCTURE_INIT( 156 28, 28, PLATFORM_GET_MPID_TB(3, 0), EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase), 157 FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, 0x4D000000 + 0x20000000 + 0x400000 /* GicRBase */), 158 EFI_ACPI_5_1_GICC_STRUCTURE_INIT( 159 29, 29, PLATFORM_GET_MPID_TB(3, 1), EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase), 160 FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, 0x4D000000 + 0x20000000 + 0x440000 /* GicRBase */), 161 EFI_ACPI_5_1_GICC_STRUCTURE_INIT( 162 30, 30, PLATFORM_GET_MPID_TB(3, 2), EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase), 163 FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, 0x4D000000 + 0x20000000 + 0x480000 /* GicRBase */), 164 EFI_ACPI_5_1_GICC_STRUCTURE_INIT( 165 31, 31, PLATFORM_GET_MPID_TB(3, 3), EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase), 166 FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, 0x4D000000 + 0x20000000 + 0x4C0000 /* GicRBase */), 167 EFI_ACPI_5_1_GICC_STRUCTURE_INIT( 168 32, 32, PLATFORM_GET_MPID_TA_2(0, 0), EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase), 169 FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, 0x4004D000000 + 0x100000 /* GicRBase */), 170 EFI_ACPI_5_1_GICC_STRUCTURE_INIT( 171 33, 33, PLATFORM_GET_MPID_TA_2(0, 1), EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase), 172 FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, 0x4004D000000 + 0x140000 /* GicRBase */), 173 EFI_ACPI_5_1_GICC_STRUCTURE_INIT( 174 34, 34, PLATFORM_GET_MPID_TA_2(0, 2), EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase), 175 FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, 0x4004D000000 + 0x180000 /* GicRBase */), 176 EFI_ACPI_5_1_GICC_STRUCTURE_INIT( 177 35, 35, PLATFORM_GET_MPID_TA_2(0, 3), EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase), 178 FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, 0x4004D000000 + 0x1C0000 /* GicRBase */), 179 EFI_ACPI_5_1_GICC_STRUCTURE_INIT( 180 36, 36, PLATFORM_GET_MPID_TA_2(1, 0), EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase), 181 FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, 0x4004D000000 + 0x200000 /* GicRBase */), 182 EFI_ACPI_5_1_GICC_STRUCTURE_INIT( 183 37, 37, PLATFORM_GET_MPID_TA_2(1, 1), EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase), 184 FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, 0x4004D000000 + 0x240000 /* GicRBase */), 185 EFI_ACPI_5_1_GICC_STRUCTURE_INIT( 186 38, 38, PLATFORM_GET_MPID_TA_2(1, 2), EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase), 187 FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, 0x4004D000000 + 0x280000 /* GicRBase */), 188 EFI_ACPI_5_1_GICC_STRUCTURE_INIT( 189 39, 39, PLATFORM_GET_MPID_TA_2(1, 3), EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase), 190 FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, 0x4004D000000 + 0x2C0000 /* GicRBase */), 191 EFI_ACPI_5_1_GICC_STRUCTURE_INIT( 192 40, 40, PLATFORM_GET_MPID_TA_2(2, 0), EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase), 193 FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, 0x4004D000000 + 0x300000 /* GicRBase */), 194 EFI_ACPI_5_1_GICC_STRUCTURE_INIT( 195 41, 41, PLATFORM_GET_MPID_TA_2(2, 1), EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase), 196 FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, 0x4004D000000 + 0x340000 /* GicRBase */), 197 EFI_ACPI_5_1_GICC_STRUCTURE_INIT( 198 42, 42, PLATFORM_GET_MPID_TA_2(2, 2), EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase), 199 FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, 0x4004D000000 + 0x380000 /* GicRBase */), 200 EFI_ACPI_5_1_GICC_STRUCTURE_INIT( 201 43, 43, PLATFORM_GET_MPID_TA_2(2, 3), EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase), 202 FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, 0x4004D000000 + 0x3C0000 /* GicRBase */), 203 EFI_ACPI_5_1_GICC_STRUCTURE_INIT( 204 44, 44, PLATFORM_GET_MPID_TA_2(3, 0), EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase), 205 FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, 0x4004D000000 + 0x400000 /* GicRBase */), 206 EFI_ACPI_5_1_GICC_STRUCTURE_INIT( 207 45, 45, PLATFORM_GET_MPID_TA_2(3, 1), EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase), 208 FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, 0x4004D000000 + 0x440000 /* GicRBase */), 209 EFI_ACPI_5_1_GICC_STRUCTURE_INIT( 210 46, 46, PLATFORM_GET_MPID_TA_2(3, 2), EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase), 211 FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, 0x4004D000000 + 0x480000 /* GicRBase */), 212 EFI_ACPI_5_1_GICC_STRUCTURE_INIT( 213 47, 47, PLATFORM_GET_MPID_TA_2(3, 3), EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase), 214 FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, 0x4004D000000 + 0x4C0000 /* GicRBase */), 215 EFI_ACPI_5_1_GICC_STRUCTURE_INIT( 216 48, 48, PLATFORM_GET_MPID_TB_2(0, 0), EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase), 217 FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, 0x4004D000000 + 0x20000000 + 0x100000 /* GicRBase */), 218 EFI_ACPI_5_1_GICC_STRUCTURE_INIT( 219 49, 49, PLATFORM_GET_MPID_TB_2(0, 1), EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase), 220 FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, 0x4004D000000 + 0x20000000 + 0x140000 /* GicRBase */), 221 EFI_ACPI_5_1_GICC_STRUCTURE_INIT( 222 50, 50, PLATFORM_GET_MPID_TB_2(0, 2), EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase), 223 FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, 0x4004D000000 + 0x20000000 + 0x180000 /* GicRBase */), 224 EFI_ACPI_5_1_GICC_STRUCTURE_INIT( 225 51, 51, PLATFORM_GET_MPID_TB_2(0, 3), EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase), 226 FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, 0x4004D000000 + 0x20000000 + 0x1C0000 /* GicRBase */), 227 EFI_ACPI_5_1_GICC_STRUCTURE_INIT( 228 52, 52, PLATFORM_GET_MPID_TB_2(1, 0), EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase), 229 FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, 0x4004D000000 + 0x20000000 + 0x200000 /* GicRBase */), 230 EFI_ACPI_5_1_GICC_STRUCTURE_INIT( 231 53, 53, PLATFORM_GET_MPID_TB_2(1, 1), EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase), 232 FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, 0x4004D000000 + 0x20000000 + 0x240000 /* GicRBase */), 233 EFI_ACPI_5_1_GICC_STRUCTURE_INIT( 234 54, 54, PLATFORM_GET_MPID_TB_2(1, 2), EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase), 235 FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, 0x4004D000000 + 0x20000000 + 0x280000 /* GicRBase */), 236 EFI_ACPI_5_1_GICC_STRUCTURE_INIT( 237 55, 55, PLATFORM_GET_MPID_TB_2(1, 3), EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase), 238 FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, 0x4004D000000 + 0x20000000 + 0x2C0000 /* GicRBase */), 239 EFI_ACPI_5_1_GICC_STRUCTURE_INIT( 240 56, 56, PLATFORM_GET_MPID_TB_2(2, 0), EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase), 241 FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, 0x4004D000000 + 0x20000000 + 0x300000 /* GicRBase */), 242 EFI_ACPI_5_1_GICC_STRUCTURE_INIT( 243 57, 57, PLATFORM_GET_MPID_TB_2(2, 1), EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase), 244 FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, 0x4004D000000 + 0x20000000 + 0x340000 /* GicRBase */), 245 EFI_ACPI_5_1_GICC_STRUCTURE_INIT( 246 58, 58, PLATFORM_GET_MPID_TB_2(2, 2), EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase), 247 FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, 0x4004D000000 + 0x20000000 + 0x380000 /* GicRBase */), 248 EFI_ACPI_5_1_GICC_STRUCTURE_INIT( 249 59, 59, PLATFORM_GET_MPID_TB_2(2, 3), EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase), 250 FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, 0x4004D000000 + 0x20000000 + 0x3C0000 /* GicRBase */), 251 EFI_ACPI_5_1_GICC_STRUCTURE_INIT( 252 60, 60, PLATFORM_GET_MPID_TB_2(3, 0), EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase), 253 FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, 0x4004D000000 + 0x20000000 + 0x400000 /* GicRBase */), 254 EFI_ACPI_5_1_GICC_STRUCTURE_INIT( 255 61, 61, PLATFORM_GET_MPID_TB_2(3, 1), EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase), 256 FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, 0x4004D000000 + 0x20000000 + 0x440000 /* GicRBase */), 257 EFI_ACPI_5_1_GICC_STRUCTURE_INIT( 258 62, 62, PLATFORM_GET_MPID_TB_2(3, 2), EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase), 259 FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, 0x4004D000000 + 0x20000000 + 0x480000 /* GicRBase */), 260 EFI_ACPI_5_1_GICC_STRUCTURE_INIT( 261 63, 63, PLATFORM_GET_MPID_TB_2(3, 3), EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase), 262 FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, 0x4004D000000 + 0x20000000 + 0x4C0000 /* GicRBase */), 263 }, 264 265 EFI_ACPI_6_0_GIC_DISTRIBUTOR_INIT(0, 0x4D000000, 0, 0x4), 266 { 267 EFI_ACPI_6_0_GIC_ITS_INIT(0,0x4C000000), //peri a 268 EFI_ACPI_6_0_GIC_ITS_INIT(1,0x6C000000), //peri b 269 EFI_ACPI_6_0_GIC_ITS_INIT(2,0xC6000000), //dsa a 270 EFI_ACPI_6_0_GIC_ITS_INIT(3,0x8C6000000), //dsa b 271 EFI_ACPI_6_0_GIC_ITS_INIT(4,0x4004C000000), //P1 peri a 272 EFI_ACPI_6_0_GIC_ITS_INIT(5,0x4006C000000), //P1 peri b 273 EFI_ACPI_6_0_GIC_ITS_INIT(6,0x400C6000000), //P1 dsa a 274 EFI_ACPI_6_0_GIC_ITS_INIT(7,0x408C6000000), //P1 dsa b 275 } 276}; 277 278// 279// Reference the table being generated to prevent the optimizer from removing the 280// data structure from the executable 281// 282VOID* CONST ReferenceAcpiTable = &Madt; 283