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1 /*
2  * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 #include <arm_def.h>
8 #include <plat_arm.h>
9 #include "juno_def.h"
10 
11 /*
12  * On Juno, the system power level is the highest power level.
13  * The first entry in the power domain descriptor specifies the
14  * number of system power domains i.e. 1.
15  */
16 #define JUNO_PWR_DOMAINS_AT_MAX_PWR_LVL	 ARM_SYSTEM_COUNT
17 
18 /*
19  * The Juno power domain tree descriptor. The cluster power domains
20  * are arranged so that when the PSCI generic code creates the power
21  * domain tree, the indices of the CPU power domain nodes it allocates
22  * match the linear indices returned by plat_core_pos_by_mpidr()
23  * i.e. CLUSTER1 CPUs are allocated indices from 0 to 3 and the higher
24  * indices for CLUSTER0 CPUs.
25  */
26 const unsigned char juno_power_domain_tree_desc[] = {
27 	/* No of root nodes */
28 	JUNO_PWR_DOMAINS_AT_MAX_PWR_LVL,
29 	/* No of children for the root node */
30 	JUNO_CLUSTER_COUNT,
31 	/* No of children for the first cluster node */
32 	JUNO_CLUSTER1_CORE_COUNT,
33 	/* No of children for the second cluster node */
34 	JUNO_CLUSTER0_CORE_COUNT
35 };
36 
37 /*******************************************************************************
38  * This function returns the Juno topology tree information.
39  ******************************************************************************/
plat_get_power_domain_tree_desc(void)40 const unsigned char *plat_get_power_domain_tree_desc(void)
41 {
42 	return juno_power_domain_tree_desc;
43 }
44 
45 /*******************************************************************************
46  * This function returns the core count within the cluster corresponding to
47  * `mpidr`.
48  ******************************************************************************/
plat_arm_get_cluster_core_count(u_register_t mpidr)49 unsigned int plat_arm_get_cluster_core_count(u_register_t mpidr)
50 {
51 	return (((mpidr) & 0x100) ? JUNO_CLUSTER1_CORE_COUNT :\
52 				JUNO_CLUSTER0_CORE_COUNT);
53 }
54 
55 /*
56  * The array mapping platform core position (implemented by plat_my_core_pos())
57  * to the SCMI power domain ID implemented by SCP.
58  */
59 const uint32_t plat_css_core_pos_to_scmi_dmn_id_map[PLATFORM_CORE_COUNT] = {
60 			2, 3, 4, 5, 0, 1 };
61