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1 /*
2  * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 #include <arch.h>
8 #include <assert.h>
9 #include <bl_common.h>
10 #include <console.h>
11 #include <debug.h>
12 #include <errno.h>
13 #include <mmio.h>
14 #include <platform.h>
15 #include <platform_def.h>
16 #include <xlat_mmu_helpers.h>
17 
18 #include "uniphier.h"
19 
20 #define BL31_END		(unsigned long)(&__BL31_END__)
21 #define BL31_SIZE		((BL31_END) - (BL31_BASE))
22 
23 static entry_point_info_t bl32_image_ep_info;
24 static entry_point_info_t bl33_image_ep_info;
25 
bl31_plat_get_next_image_ep_info(uint32_t type)26 entry_point_info_t *bl31_plat_get_next_image_ep_info(uint32_t type)
27 {
28 	assert(sec_state_is_valid(type));
29 	return type == NON_SECURE ? &bl33_image_ep_info : &bl32_image_ep_info;
30 }
31 
bl31_early_platform_setup(void * from_bl2,void * plat_params_from_bl2)32 void bl31_early_platform_setup(void *from_bl2, void *plat_params_from_bl2)
33 {
34 	bl_params_node_t *bl_params = ((bl_params_t *)from_bl2)->head;
35 
36 	uniphier_console_setup();
37 
38 	while (bl_params) {
39 		if (bl_params->image_id == BL32_IMAGE_ID)
40 			bl32_image_ep_info = *bl_params->ep_info;
41 
42 		if (bl_params->image_id == BL33_IMAGE_ID)
43 			bl33_image_ep_info = *bl_params->ep_info;
44 
45 		bl_params = bl_params->next_params_info;
46 	}
47 
48 	if (bl33_image_ep_info.pc == 0)
49 		panic();
50 }
51 
52 #define UNIPHIER_SYS_CNTCTL_BASE	0x60E00000
53 
bl31_platform_setup(void)54 void bl31_platform_setup(void)
55 {
56 	unsigned int soc;
57 
58 	soc = uniphier_get_soc_id();
59 	if (soc == UNIPHIER_SOC_UNKNOWN) {
60 		ERROR("unsupported SoC\n");
61 		plat_error_handler(-ENOTSUP);
62 	}
63 
64 	uniphier_cci_init(soc);
65 	uniphier_cci_enable();
66 
67 	/* Initialize the GIC driver, cpu and distributor interfaces */
68 	uniphier_gic_driver_init(soc);
69 	uniphier_gic_init();
70 
71 	/* Enable and initialize the System level generic timer */
72 	mmio_write_32(UNIPHIER_SYS_CNTCTL_BASE + CNTCR_OFF,
73 			CNTCR_FCREQ(0) | CNTCR_EN);
74 }
75 
bl31_plat_arch_setup(void)76 void bl31_plat_arch_setup(void)
77 {
78 	uniphier_mmap_setup(BL31_BASE, BL31_SIZE, NULL);
79 	enable_mmu_el3(0);
80 }
81 
bl31_plat_runtime_setup(void)82 void bl31_plat_runtime_setup(void)
83 {
84 	/* Suppress any runtime logs unless DEBUG is defined */
85 #if !DEBUG
86 	console_uninit();
87 #endif
88 }
89