1/** @file 2CPU C State control methods 3 4Copyright (c) 2013-2015 Intel Corporation. 5 6This program and the accompanying materials 7are licensed and made available under the terms and conditions of the BSD License 8which accompanies this distribution. The full text of the license may be found at 9http://opensource.org/licenses/bsd-license.php 10 11THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 12WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 13 14**/ 15 16DefinitionBlock ( 17 "Cpu0Cst.aml", 18 "SSDT", 19 0x01, 20 "SsgPmm", 21 "Cpu0Cst", 22 0x0011 23 ) 24{ 25 External(\_PR.CPU0, DeviceObj) 26 External (PDC0, IntObj) 27 External (CFGD, FieldUnitObj) 28 29 Scope(\_PR.CPU0) 30 { 31 Method (_CST, 0) 32 { 33 // If CMP is supported, and OSPM is not capable of independent C1, P, T state 34 // support for each processor for multi-processor configuration, we will just report 35 // C1 halt 36 // 37 // PDCx[4] = Indicates whether OSPM is not capable of independent C1, P, T state 38 // support for each processor for multi-processor configuration. 39 // 40 If(LAnd(And(CFGD,0x01000000), LNot(And(PDC0,0x10)))) 41 { 42 Return(Package() { 43 1, 44 Package() 45 { // C1 halt 46 ResourceTemplate(){Register(FFixedHW, 0, 0, 0)}, 47 1, 48 157, 49 1000 50 } 51 }) 52 } 53 54 // 55 // If MWAIT extensions is supported and OSPM is capable of performing 56 // native C state instructions for the C2/C3 in multi-processor configuration, 57 // we report every c state with MWAIT extensions. 58 // 59 // PDCx[9] = Indicates whether OSPM is capable of performing native C state instructions 60 // for the C2/C3 in multi-processor configuration 61 // 62 If(LAnd(And(CFGD, 0x200000), And(PDC0,0x200))) 63 { 64 // 65 // If C6 is supported, we report MWAIT C1,C2,C4,C6 66 // 67 If(And(CFGD,0x200)) 68 { 69 Return( Package() 70 { 71 4, 72 Package() 73 { // MWAIT C1, hardware coordinated with no bus master avoidance 74 ResourceTemplate(){Register(FFixedHW, 1, 2, 0x00, 1)}, 75 1, 76 1, 77 1000 78 }, 79 Package() 80 { // MWAIT C2, hardware coordinated with no bus master avoidance 81 ResourceTemplate(){Register(FFixedHW, 1, 2, 0x10, 1)}, 82 2, 83 20, 84 500 85 }, 86 Package() 87 { // MWAIT C4, hardware coordinated with bus master avoidance enabled 88 ResourceTemplate(){Register(FFixedHW, 1, 2, 0x30, 3)}, 89 3, 90 100, 91 100 92 }, 93 Package() 94 { // MWAIT C6, hardware coordinated with bus master avoidance enabled 95 ResourceTemplate(){Register(FFixedHW, 1, 2, 0x50, 3)}, 96 3, 97 140, 98 10 99 } 100 }) 101 } 102 // 103 // If C4 is supported, we report MWAIT C1,C2,C4 104 // 105 If(And(CFGD,0x080)) 106 { 107 Return( Package() 108 { 109 3, 110 Package() 111 { // MWAIT C1, hardware coordinated with no bus master avoidance 112 ResourceTemplate(){Register(FFixedHW, 1, 2, 0x00, 1)}, 113 1, 114 1, 115 1000 116 }, 117 Package() 118 { // MWAIT C2, hardware coordinated with no bus master avoidance 119 ResourceTemplate(){Register(FFixedHW, 1, 2, 0x10, 1)}, 120 2, 121 20, 122 500 123 }, 124 Package() 125 { // MWAIT C4, hardware coordinated with bus master avoidance enabled 126 ResourceTemplate(){Register(FFixedHW, 1, 2, 0x30, 3)}, 127 3, 128 100, 129 100 130 } 131 }) 132 } 133 // 134 // If C2 is supported, we report MWAIT C1,C2 135 // 136 If(And(CFGD,0x020)) 137 { 138 Return( Package() 139 { 140 2, 141 Package() 142 { // MWAIT C1, hardware coordinated with no bus master avoidance 143 ResourceTemplate(){Register(FFixedHW, 1, 2, 0x00, 1)}, 144 1, 145 1, 146 1000 147 }, 148 Package() 149 { // MWAIT C2, hardware coordinated with no bus master avoidance 150 ResourceTemplate(){Register(FFixedHW, 1, 2, 0x10, 1)}, 151 2, 152 20, 153 500 154 } 155 }) 156 } 157 // 158 // Else we only report MWAIT C1. 159 // 160 Return(Package() 161 { 162 1, 163 Package() 164 { // MWAIT C1, hardware coordinated with no bus master avoidance 165 ResourceTemplate () {Register(FFixedHW, 1, 2, 0x00, 1)}, 166 1, 167 1, 168 1000 169 } 170 }) 171 } 172 173 // If OSPM is only capable of performing native C state instructions for 174 // the C1 in multi-processor configuration, we report C1 with MWAIT, other 175 // C states with IO method. 176 // 177 // PDCx[8] = Indicates whether OSPM is capable of performing native C state instructions 178 // for the C1 in multi-processor configuration 179 // 180 If(LAnd(And(CFGD, 0x200000), And(PDC0,0x100))) 181 { 182 // 183 // If C6 is supported, we report MWAIT C1, IO C2,C4,C6 184 // 185 If(And(CFGD,0x200)) 186 { 187 Return( Package() 188 { 189 4, 190 Package() 191 { // MWAIT C1, hardware coordinated with no bus master avoidance 192 ResourceTemplate () {Register(FFixedHW, 1, 2, 0x00, 1)}, 193 1, 194 1, 195 1000 196 }, 197 Package() 198 { // IO C2 ("PMBALVL2" will be updated at runtime) 199 ResourceTemplate () {Register(SystemIO, 8, 0, 0x324C564C41424D50)}, 200 2, 201 20, 202 500 203 }, 204 Package() 205 { // IO C4 ("PMBALVL4" will be updated at runtime) 206 ResourceTemplate () {Register(SystemIO, 8, 0, 0x344C564C41424D50)}, 207 3, 208 100, 209 100 210 }, 211 Package() 212 { // IO C6 ("PMBALVL6" will be updated at runtime) 213 ResourceTemplate () {Register(SystemIO, 8, 0, 0x364C564C41424D50)}, 214 3, 215 140, 216 10 217 } 218 }) 219 } 220 // 221 // If C4 is supported, we report MWAIT C1, IO C2,C4 222 // 223 If(And(CFGD,0x080)) 224 { 225 Return( Package() 226 { 227 3, 228 Package() 229 { // MWAIT C1, hardware coordinated with no bus master avoidance 230 ResourceTemplate () {Register(FFixedHW, 1, 2, 0x00, 1)}, 231 1, 232 1, 233 1000 234 }, 235 Package() 236 { // IO C2 ("PMBALVL2" will be updated at runtime) 237 ResourceTemplate () {Register(SystemIO, 8, 0, 0x324C564C41424D50)}, 238 2, 239 20, 240 500 241 }, 242 Package() 243 { // IO C4 ("PMBALVL4" will be updated at runtime) 244 ResourceTemplate () {Register(SystemIO, 8, 0, 0x344C564C41424D50)}, 245 3, 246 100, 247 100 248 } 249 }) 250 } 251 // 252 // If C2 is supported, we report MWAIT C1, IO C2 253 // 254 If(And(CFGD,0x020)) 255 { 256 Return( Package() 257 { 258 2, 259 Package() 260 { // MWAIT C1, hardware coordinated with no bus master avoidance 261 ResourceTemplate () {Register(FFixedHW, 1, 2, 0x00, 1)}, 262 1, 263 1, 264 1000 265 }, 266 Package() 267 { // IO C2 ("PMBALVL2" will be updated at runtime) 268 ResourceTemplate () {Register(SystemIO, 8, 0, 0x324C564C41424D50)}, 269 2, 270 20, 271 500 272 } 273 }) 274 } 275 // 276 // Else we only report MWAIT C1. 277 // 278 Return(Package() 279 { 280 1, 281 Package() 282 { // MWAIT C1, hardware coordinated with no bus master avoidance 283 ResourceTemplate () {Register(FFixedHW, 1, 2, 0x00, 1)}, 284 1, 285 1, 286 1000 287 } 288 }) 289 } 290 291 // 292 // If MWAIT is not supported, we report all the c states with IO method 293 // 294 295 // 296 // If C6 is supported, we report C1 halt, IO C2,C4,C6 297 // 298 If(And(CFGD,0x200)) 299 { 300 Return(Package() 301 { 302 4, 303 Package() 304 { // C1 Halt 305 ResourceTemplate () {Register(FFixedHW, 0, 0, 0)}, 306 1, 307 1, 308 1000 309 }, 310 Package() 311 { // IO C2 ("PMBALVL2" will be updated at runtime) 312 ResourceTemplate () {Register(SystemIO, 8, 0, 0x324C564C41424D50)}, 313 2, 314 20, 315 500 316 }, 317 Package() 318 { // IO C4 ("PMBALVL4" will be updated at runtime) 319 ResourceTemplate () {Register(SystemIO, 8, 0, 0x344C564C41424D50)}, 320 3, 321 100, 322 100 323 }, 324 Package() 325 { // IO C6 ("PMBALVL6" will be updated at runtime) 326 ResourceTemplate () {Register(SystemIO, 8, 0, 0x364C564C41424D50)}, 327 3, 328 140, 329 10 330 } 331 }) 332 } 333 // 334 // If C4 is supported, we report C1 halt, IO C2,C4 335 // 336 If(And(CFGD,0x080)) 337 { 338 Return(Package() 339 { 340 3, 341 Package() 342 { // C1 halt 343 ResourceTemplate () {Register(FFixedHW, 0, 0, 0)}, 344 1, 345 1, 346 1000 347 }, 348 Package() 349 { // IO C2 ("PMBALVL2" will be updated at runtime) 350 ResourceTemplate () {Register(SystemIO, 8, 0, 0x324C564C41424D50)}, 351 2, 352 20, 353 500 354 }, 355 Package() 356 { // IO C4 ("PMBALVL4" will be updated at runtime) 357 ResourceTemplate () {Register(SystemIO, 8, 0, 0x344C564C41424D50)}, 358 3, 359 100, 360 100 361 } 362 }) 363 } 364 365 // 366 // If C2 is supported, we report C1 halt, IO C2 367 // 368 If(And(CFGD,0x020)) 369 { 370 Return(Package() 371 { 372 2, 373 Package() 374 { // C1 halt 375 ResourceTemplate () {Register(FFixedHW, 0, 0, 0)}, 376 1, 377 1, 378 1000 379 }, 380 Package() 381 { // IO C2 ("PMBALVL2" will be updated at runtime) 382 ResourceTemplate () {Register(SystemIO, 8, 0, 0x324C564C41424D50)}, 383 2, 384 20, 385 500 386 } 387 }) 388 } 389 // 390 // Else we only report C1 halt. 391 // 392 Return(Package() 393 { 394 1, 395 Package() 396 { // C1 halt 397 ResourceTemplate () {Register(FFixedHW, 0, 0, 0)}, 398 1, 399 1, 400 1000 401 } 402 }) 403 } 404 } 405} 406