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1 /*
2 
3 Copyright (c) 2009, 2010, 2011 STMicroelectronics
4 Written by Christophe Lyon
5 
6 Permission is hereby granted, free of charge, to any person obtaining a copy
7 of this software and associated documentation files (the "Software"), to deal
8 in the Software without restriction, including without limitation the rights
9 to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 copies of the Software, and to permit persons to whom the Software is
11 furnished to do so, subject to the following conditions:
12 
13 The above copyright notice and this permission notice shall be included in
14 all copies or substantial portions of the Software.
15 
16 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19 AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 THE SOFTWARE.
23 
24 */
25 
26 #if defined(__arm__) || defined(__aarch64__)
27 #include <arm_neon.h>
28 #else
29 #include "stm-arm-neon.h"
30 #endif
31 
32 #include "stm-arm-neon-ref.h"
33 
34 #ifndef INSN_NAME
35 #define INSN_NAME vmlal
36 #define TEST_MSG "VMLAL"
37 #endif
38 
39 
40 #define FNNAME1(NAME) void exec_ ## NAME (void)
41 #define FNNAME(NAME) FNNAME1(NAME)
42 
FNNAME(INSN_NAME)43 FNNAME (INSN_NAME)
44 {
45   /* vector_res = OP(vector, vector3, vector4),
46      then store the result.  */
47 #define TEST_VMLXL1(INSN, T1, T2, W, W2, N)				\
48   VECT_VAR(vector_res, T1, W, N) =                                      \
49     INSN##_##T2##W2(VECT_VAR(vector, T1, W, N),                         \
50                     VECT_VAR(vector3, T1, W2, N),                       \
51                     VECT_VAR(vector4, T1, W2, N));                      \
52   vst1q_##T2##W(VECT_VAR(result, T1, W, N), VECT_VAR(vector_res, T1, W, N))
53 
54 #define TEST_VMLXL(INSN, T1, T2, W, W2, N)	\
55   TEST_VMLXL1(INSN, T1, T2, W, W2, N)
56 
57   /* With ARM RVCT, we need to declare variables before any executable
58      statement */
59   DECL_VARIABLE(vector, int, 16, 8);
60   DECL_VARIABLE(vector3, int, 8, 8);
61   DECL_VARIABLE(vector4, int, 8, 8);
62   DECL_VARIABLE(vector_res, int, 16, 8);
63 
64   DECL_VARIABLE(vector, int, 32, 4);
65   DECL_VARIABLE(vector3, int, 16, 4);
66   DECL_VARIABLE(vector4, int, 16, 4);
67   DECL_VARIABLE(vector_res, int, 32, 4);
68 
69   DECL_VARIABLE(vector, int, 64, 2);
70   DECL_VARIABLE(vector3, int, 32, 2);
71   DECL_VARIABLE(vector4, int, 32, 2);
72   DECL_VARIABLE(vector_res, int, 64, 2);
73 
74   DECL_VARIABLE(vector, uint, 16, 8);
75   DECL_VARIABLE(vector3, uint, 8, 8);
76   DECL_VARIABLE(vector4, uint, 8, 8);
77   DECL_VARIABLE(vector_res, uint, 16, 8);
78 
79   DECL_VARIABLE(vector, uint, 32, 4);
80   DECL_VARIABLE(vector3, uint, 16, 4);
81   DECL_VARIABLE(vector4, uint, 16, 4);
82   DECL_VARIABLE(vector_res, uint, 32, 4);
83 
84   DECL_VARIABLE(vector, uint, 64, 2);
85   DECL_VARIABLE(vector3, uint, 32, 2);
86   DECL_VARIABLE(vector4, uint, 32, 2);
87   DECL_VARIABLE(vector_res, uint, 64, 2);
88 
89   clean_results ();
90 
91   VLOAD(vector, buffer, q, int, s, 16, 8);
92   VLOAD(vector, buffer, q, int, s, 32, 4);
93   VLOAD(vector, buffer, q, int, s, 64, 2);
94   VLOAD(vector, buffer, q, uint, u, 16, 8);
95   VLOAD(vector, buffer, q, uint, u, 32, 4);
96   VLOAD(vector, buffer, q, uint, u, 64, 2);
97 
98   VDUP(vector3, , int, s, 8, 8, 0x55);
99   VDUP(vector4, , int, s, 8, 8, 0xBB);
100   VDUP(vector3, , int, s, 16, 4, 0x55);
101   VDUP(vector4, , int, s, 16, 4, 0xBB);
102   VDUP(vector3, , int, s, 32, 2, 0x55);
103   VDUP(vector4, , int, s, 32, 2, 0xBB);
104   VDUP(vector3, , uint, u, 8, 8, 0x55);
105   VDUP(vector4, , uint, u, 8, 8, 0xBB);
106   VDUP(vector3, , uint, u, 16, 4, 0x55);
107   VDUP(vector4, , uint, u, 16, 4, 0xBB);
108   VDUP(vector3, , uint, u, 32, 2, 0x55);
109   VDUP(vector4, , uint, u, 32, 2, 0xBB);
110 
111   TEST_VMLXL(INSN_NAME, int, s, 16, 8, 8);
112   TEST_VMLXL(INSN_NAME, int, s, 32, 16, 4);
113   TEST_VMLXL(INSN_NAME, int, s, 64, 32, 2);
114   TEST_VMLXL(INSN_NAME, uint, u, 16, 8, 8);
115   TEST_VMLXL(INSN_NAME, uint, u, 32, 16, 4);
116   TEST_VMLXL(INSN_NAME, uint, u, 64, 32, 2);
117 
118   dump_results_hex (TEST_MSG);
119 }
120