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1 /*
2 
3 Copyright (c) 2009, 2010, 2011, 2013 STMicroelectronics
4 Written by Christophe Lyon
5 
6 Permission is hereby granted, free of charge, to any person obtaining a copy
7 of this software and associated documentation files (the "Software"), to deal
8 in the Software without restriction, including without limitation the rights
9 to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 copies of the Software, and to permit persons to whom the Software is
11 furnished to do so, subject to the following conditions:
12 
13 The above copyright notice and this permission notice shall be included in
14 all copies or substantial portions of the Software.
15 
16 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19 AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 THE SOFTWARE.
23 
24 */
25 
26 #if defined(__arm__) || defined(__aarch64__)
27 #include <arm_neon.h>
28 #else
29 #include "stm-arm-neon.h"
30 #endif
31 
32 #include "stm-arm-neon-ref.h"
33 
exec_vstX_lane(void)34 void exec_vstX_lane (void)
35 {
36   /* In this case, input variables are arrays of vectors */
37 #define DECL_VSTX_LANE(T1, W, N, X)					\
38   VECT_ARRAY_TYPE(T1, W, N, X) VECT_ARRAY_VAR(vector, T1, W, N, X);	\
39   VECT_ARRAY_TYPE(T1, W, N, X) VECT_ARRAY_VAR(vector_src, T1, W, N, X);	\
40   VECT_VAR_DECL(result_bis_##X, T1, W, N)[X * N]
41 
42   /* We need to use a temporary result buffer (result_bis), because
43      the one used for other tests is not large enough. A subset of the
44      result data is moved from result_bis to result, and it is this
45      subset which is used to check the actual behaviour. The next
46      macro enables to move another chunk of data from result_bis to
47      result.  */
48 #define TEST_VSTX_LANE(Q, T1, T2, W, N, X, L)				\
49   memset (VECT_VAR(buffer_src, T1, W, N), 0xAA,				\
50 	  sizeof(VECT_VAR(buffer_src, T1, W, N)));			\
51   memset (VECT_VAR(result_bis_##X, T1, W, N), 0,			\
52 	  sizeof(VECT_VAR(result_bis_##X, T1, W, N)));			\
53 									\
54   VECT_ARRAY_VAR(vector_src, T1, W, N, X) =				\
55     vld##X##Q##_##T2##W(VECT_VAR(buffer_src, T1, W, N));		\
56 									\
57   VECT_ARRAY_VAR(vector, T1, W, N, X) =					\
58     /* Use dedicated init buffer, of size X */				\
59     vld##X##Q##_lane_##T2##W(VECT_VAR(buffer_vld##X##_lane, T1, W, X),	\
60 			     VECT_ARRAY_VAR(vector_src, T1, W, N, X),	\
61 			     L);					\
62   vst##X##Q##_lane_##T2##W(VECT_VAR(result_bis_##X, T1, W, N),		\
63 			   VECT_ARRAY_VAR(vector, T1, W, N, X),		\
64 			   L);						\
65   memcpy(VECT_VAR(result, T1, W, N), VECT_VAR(result_bis_##X, T1, W, N), \
66 	 sizeof(VECT_VAR(result, T1, W, N)));
67 
68   /* Overwrite "result" with the contents of "result_bis"[Y] */
69 #define TEST_EXTRA_CHUNK(T1, W, N, X, Y)		\
70   memcpy(VECT_VAR(result, T1, W, N),			\
71 	 &(VECT_VAR(result_bis_##X, T1, W, N)[Y*N]),	\
72 	 sizeof(VECT_VAR(result, T1, W, N)));
73 
74   /* With ARM RVCT, we need to declare variables before any executable
75      statement */
76 
77   /* We need all variants in 64 bits, but there is no 64x2 variant */
78 #define DECL_ALL_VSTX_LANE(X)			\
79   DECL_VSTX_LANE(int, 8, 8, X);			\
80   DECL_VSTX_LANE(int, 16, 4, X);		\
81   DECL_VSTX_LANE(int, 32, 2, X);		\
82   DECL_VSTX_LANE(uint, 8, 8, X);		\
83   DECL_VSTX_LANE(uint, 16, 4, X);		\
84   DECL_VSTX_LANE(uint, 32, 2, X);		\
85   DECL_VSTX_LANE(poly, 8, 8, X);		\
86   DECL_VSTX_LANE(poly, 16, 4, X);		\
87   DECL_VSTX_LANE(float, 32, 2, X);		\
88   DECL_VSTX_LANE(int, 16, 8, X);		\
89   DECL_VSTX_LANE(int, 32, 4, X);		\
90   DECL_VSTX_LANE(uint, 16, 8, X);		\
91   DECL_VSTX_LANE(uint, 32, 4, X);		\
92   DECL_VSTX_LANE(poly, 16, 8, X);		\
93   DECL_VSTX_LANE(float, 32, 4, X)
94 
95 #if defined(__ARM_FP16_FORMAT_IEEE) && ( ((__ARM_FP & 0x2) != 0) || ((__ARM_NEON_FP16_INTRINSICS & 1) != 0) )
96 #define DECL_ALL_VSTX_LANE_FP16(X)		\
97   DECL_VSTX_LANE(float, 16, 4, X);		\
98   DECL_VSTX_LANE(float, 16, 8, X)
99 #endif
100 
101 #define DUMMY_ARRAY(V, T, W, N, L) VECT_VAR_DECL(V,T,W,N)[N*L]
102 
103   /* Use the same lanes regardless of the size of the array (X), for
104      simplicity */
105 #define TEST_ALL_VSTX_LANE(X)			\
106   TEST_VSTX_LANE(, int, s, 8, 8, X, 7);		\
107   TEST_VSTX_LANE(, int, s, 16, 4, X, 2);	\
108   TEST_VSTX_LANE(, int, s, 32, 2, X, 0);	\
109   TEST_VSTX_LANE(, float, f, 32, 2, X, 0);	\
110   TEST_VSTX_LANE(, uint, u, 8, 8, X, 4);	\
111   TEST_VSTX_LANE(, uint, u, 16, 4, X, 3);	\
112   TEST_VSTX_LANE(, uint, u, 32, 2, X, 1);	\
113   TEST_VSTX_LANE(, poly, p, 8, 8, X, 4);	\
114   TEST_VSTX_LANE(, poly, p, 16, 4, X, 3);	\
115   TEST_VSTX_LANE(q, int, s, 16, 8, X, 6);	\
116   TEST_VSTX_LANE(q, int, s, 32, 4, X, 2);	\
117   TEST_VSTX_LANE(q, uint, u, 16, 8, X, 5);	\
118   TEST_VSTX_LANE(q, uint, u, 32, 4, X, 0);	\
119   TEST_VSTX_LANE(q, poly, p, 16, 8, X, 5);	\
120   TEST_VSTX_LANE(q, float, f, 32, 4, X, 2)
121 
122 #if defined(__ARM_FP16_FORMAT_IEEE) && ( ((__ARM_FP & 0x2) != 0) || ((__ARM_NEON_FP16_INTRINSICS & 1) != 0) )
123 #define TEST_ALL_VSTX_LANE_FP16(X)		\
124   TEST_VSTX_LANE(, float, f, 16, 4, X, 3);	\
125   TEST_VSTX_LANE(q, float, f, 16, 8, X, 6)
126 #endif
127 
128 #define TEST_ALL_EXTRA_CHUNKS(X, Y)		\
129   TEST_EXTRA_CHUNK(int, 8, 8, X, Y);		\
130   TEST_EXTRA_CHUNK(int, 16, 4, X, Y);		\
131   TEST_EXTRA_CHUNK(int, 32, 2, X, Y);		\
132   TEST_EXTRA_CHUNK(uint, 8, 8, X, Y);		\
133   TEST_EXTRA_CHUNK(uint, 16, 4, X, Y);		\
134   TEST_EXTRA_CHUNK(uint, 32, 2, X, Y);		\
135   TEST_EXTRA_CHUNK(poly, 8, 8, X, Y);		\
136   TEST_EXTRA_CHUNK(poly, 16, 4, X, Y);		\
137   TEST_EXTRA_CHUNK(float, 32, 2, X, Y);		\
138   TEST_EXTRA_CHUNK(int, 16, 8, X, Y);		\
139   TEST_EXTRA_CHUNK(int, 32, 4, X, Y);		\
140   TEST_EXTRA_CHUNK(uint, 16, 8, X, Y);		\
141   TEST_EXTRA_CHUNK(uint, 32, 4, X, Y);		\
142   TEST_EXTRA_CHUNK(poly, 16, 8, X, Y);		\
143   TEST_EXTRA_CHUNK(float, 32, 4, X, Y)
144 
145 #if defined(__ARM_FP16_FORMAT_IEEE) && ( ((__ARM_FP & 0x2) != 0) || ((__ARM_NEON_FP16_INTRINSICS & 1) != 0) )
146 #define TEST_ALL_EXTRA_CHUNKS_FP16(X, Y)	\
147   TEST_EXTRA_CHUNK(float, 16, 4, X, Y);		\
148   TEST_EXTRA_CHUNK(float, 16, 8, X, Y)
149 #endif
150 
151   /* Declare the temporary buffers / variables */
152   DECL_ALL_VSTX_LANE(2);
153   DECL_ALL_VSTX_LANE(3);
154   DECL_ALL_VSTX_LANE(4);
155 #if defined(__ARM_FP16_FORMAT_IEEE) && ( ((__ARM_FP & 0x2) != 0) || ((__ARM_NEON_FP16_INTRINSICS & 1) != 0) )
156   DECL_ALL_VSTX_LANE_FP16(2);
157   DECL_ALL_VSTX_LANE_FP16(3);
158   DECL_ALL_VSTX_LANE_FP16(4);
159 #endif
160 
161   /* Define dummy input arrays, large enough for x4 vectors */
162   DUMMY_ARRAY(buffer_src, int, 8, 8, 4);
163   DUMMY_ARRAY(buffer_src, int, 16, 4, 4);
164   DUMMY_ARRAY(buffer_src, int, 32, 2, 4);
165   DUMMY_ARRAY(buffer_src, uint, 8, 8, 4);
166   DUMMY_ARRAY(buffer_src, uint, 16, 4, 4);
167   DUMMY_ARRAY(buffer_src, uint, 32, 2, 4);
168   DUMMY_ARRAY(buffer_src, poly, 8, 8, 4);
169   DUMMY_ARRAY(buffer_src, poly, 16, 4, 4);
170   DUMMY_ARRAY(buffer_src, float, 32, 2, 4);
171   DUMMY_ARRAY(buffer_src, int, 16, 8, 4);
172   DUMMY_ARRAY(buffer_src, int, 32, 4, 4);
173   DUMMY_ARRAY(buffer_src, uint, 16, 8, 4);
174   DUMMY_ARRAY(buffer_src, uint, 32, 4, 4);
175   DUMMY_ARRAY(buffer_src, poly, 16, 8, 4);
176   DUMMY_ARRAY(buffer_src, float, 32, 4, 4);
177 #if defined(__ARM_FP16_FORMAT_IEEE) && ( ((__ARM_FP & 0x2) != 0) || ((__ARM_NEON_FP16_INTRINSICS & 1) != 0) )
178   DUMMY_ARRAY(buffer_src, float, 16, 4, 4);
179   DUMMY_ARRAY(buffer_src, float, 16, 8, 4);
180 #endif
181 
182   /* Check vst2_lane/vst2q_lane */
183   clean_results ();
184 #define TEST_MSG "VST2_LANE/VST2Q_LANE"
185   TEST_ALL_VSTX_LANE(2);
186 #if defined(__ARM_FP16_FORMAT_IEEE) && ( ((__ARM_FP & 0x2) != 0) || ((__ARM_NEON_FP16_INTRINSICS & 1) != 0) )
187   TEST_ALL_VSTX_LANE_FP16(2);
188 #endif
189   dump_results_hex2 (TEST_MSG, " chunk 0");
190 
191   TEST_ALL_EXTRA_CHUNKS(2, 1);
192 #if defined(__ARM_FP16_FORMAT_IEEE) && ( ((__ARM_FP & 0x2) != 0) || ((__ARM_NEON_FP16_INTRINSICS & 1) != 0) )
193   TEST_ALL_EXTRA_CHUNKS_FP16(2, 1);
194 #endif
195   dump_results_hex2 (TEST_MSG, " chunk 1");
196 
197   /* Check vst3_lane/vst3q_lane */
198   clean_results ();
199 #undef TEST_MSG
200 #define TEST_MSG "VST3_LANE/VST3Q_LANE"
201   TEST_ALL_VSTX_LANE(3);
202 #if defined(__ARM_FP16_FORMAT_IEEE) && ( ((__ARM_FP & 0x2) != 0) || ((__ARM_NEON_FP16_INTRINSICS & 1) != 0) )
203   TEST_ALL_VSTX_LANE_FP16(3);
204 #endif
205   dump_results_hex2 (TEST_MSG, " chunk 0");
206 
207   TEST_ALL_EXTRA_CHUNKS(3, 1);
208 #if defined(__ARM_FP16_FORMAT_IEEE) && ( ((__ARM_FP & 0x2) != 0) || ((__ARM_NEON_FP16_INTRINSICS & 1) != 0) )
209   TEST_ALL_EXTRA_CHUNKS_FP16(3, 1);
210 #endif
211   dump_results_hex2 (TEST_MSG, " chunk 1");
212   TEST_ALL_EXTRA_CHUNKS(3, 2);
213 #if defined(__ARM_FP16_FORMAT_IEEE) && ( ((__ARM_FP & 0x2) != 0) || ((__ARM_NEON_FP16_INTRINSICS & 1) != 0) )
214   TEST_ALL_EXTRA_CHUNKS_FP16(3, 2);
215 #endif
216   dump_results_hex2 (TEST_MSG, " chunk 2");
217 
218   /* Check vst4_lane/vst4q_lane */
219   clean_results ();
220 #undef TEST_MSG
221 #define TEST_MSG "VST4_LANE/VST4Q_LANE"
222   TEST_ALL_VSTX_LANE(4);
223 #if defined(__ARM_FP16_FORMAT_IEEE) && ( ((__ARM_FP & 0x2) != 0) || ((__ARM_NEON_FP16_INTRINSICS & 1) != 0) )
224   TEST_ALL_VSTX_LANE_FP16(4);
225 #endif
226   dump_results_hex2 (TEST_MSG, " chunk 0");
227 
228   TEST_ALL_EXTRA_CHUNKS(4, 1);
229 #if defined(__ARM_FP16_FORMAT_IEEE) && ( ((__ARM_FP & 0x2) != 0) || ((__ARM_NEON_FP16_INTRINSICS & 1) != 0) )
230   TEST_ALL_EXTRA_CHUNKS_FP16(4, 1);
231 #endif
232   dump_results_hex2 (TEST_MSG, " chunk 1");
233   TEST_ALL_EXTRA_CHUNKS(4, 2);
234 #if defined(__ARM_FP16_FORMAT_IEEE) && ( ((__ARM_FP & 0x2) != 0) || ((__ARM_NEON_FP16_INTRINSICS & 1) != 0) )
235   TEST_ALL_EXTRA_CHUNKS_FP16(4, 2);
236 #endif
237   dump_results_hex2 (TEST_MSG, " chunk 2");
238   TEST_ALL_EXTRA_CHUNKS(4, 3);
239 #if defined(__ARM_FP16_FORMAT_IEEE) && ( ((__ARM_FP & 0x2) != 0) || ((__ARM_NEON_FP16_INTRINSICS & 1) != 0) )
240   TEST_ALL_EXTRA_CHUNKS_FP16(4, 3);
241 #endif
242   dump_results_hex2 (TEST_MSG, " chunk 3");
243 }
244