1 /******************************************************************************* 2 * Copyright 2016-2018 Intel Corporation 3 * All Rights Reserved. 4 * 5 * If this software was obtained under the Intel Simplified Software License, 6 * the following terms apply: 7 * 8 * The source code, information and material ("Material") contained herein is 9 * owned by Intel Corporation or its suppliers or licensors, and title to such 10 * Material remains with Intel Corporation or its suppliers or licensors. The 11 * Material contains proprietary information of Intel or its suppliers and 12 * licensors. The Material is protected by worldwide copyright laws and treaty 13 * provisions. No part of the Material may be used, copied, reproduced, 14 * modified, published, uploaded, posted, transmitted, distributed or disclosed 15 * in any way without Intel's prior express written permission. No license under 16 * any patent, copyright or other intellectual property rights in the Material 17 * is granted to or conferred upon you, either expressly, by implication, 18 * inducement, estoppel or otherwise. Any license under such intellectual 19 * property rights must be express and approved by Intel in writing. 20 * 21 * Unless otherwise agreed by Intel in writing, you may not remove or alter this 22 * notice or any other notice embedded in Materials by Intel or Intel's 23 * suppliers or licensors in any way. 24 * 25 * 26 * If this software was obtained under the Apache License, Version 2.0 (the 27 * "License"), the following terms apply: 28 * 29 * You may not use this file except in compliance with the License. You may 30 * obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 31 * 32 * 33 * Unless required by applicable law or agreed to in writing, software 34 * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT 35 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 36 * 37 * See the License for the specific language governing permissions and 38 * limitations under the License. 39 *******************************************************************************/ 40 41 /* 42 // Intel(R) Integrated Performance Primitives. Cryptography Primitives. 43 // 44 // Context: 45 // ippsGFpECPrivateKey() 46 // 47 */ 48 49 #include "owndefs.h" 50 #include "owncp.h" 51 #include "pcpgfpecstuff.h" 52 53 /*F* 54 // Name: ippsGFpECPrivateKey 55 // 56 // Purpose: Generate random private key 57 // 58 // Returns: Reason: 59 // ippStsNullPtrErr NULL == pEC 60 // NULL == pPrivate 61 // 62 // ippStsContextMatchErr illegal pEC->idCtx 63 // pEC->subgroup == NULL 64 // illegal pPrivate->idCtx 65 // 66 // ippStsSizeErr BN_ROOM(pPrivate)*BITSIZE(BNU_CHUNK_T)<ECP_ORDBITSIZE(pEC) 67 // 68 // ippStsNoErr no errors 69 // 70 // Parameters: 71 // pPrivate pointer to the resultant private key 72 // pEC pointer to the EC context 73 // rndFunc Specified Random Generator 74 // pRndParam Pointer to the Random Generator context 75 // 76 *F*/ 77 IPPFUN(IppStatus, ippsGFpECPrivateKey, (IppsBigNumState* pPrivate, IppsGFpECState* pEC, 78 IppBitSupplier rndFunc, void* pRndParam)) 79 { 80 IPP_BAD_PTR2_RET(pEC, rndFunc); 81 82 /* use aligned EC context */ 83 pEC = (IppsGFpECState*)( IPP_ALIGNED_PTR(pEC, ECGFP_ALIGNMENT) ); 84 IPP_BADARG_RET(!ECP_TEST_ID(pEC), ippStsContextMatchErr); 85 IPP_BADARG_RET(!ECP_SUBGROUP(pEC), ippStsContextMatchErr); 86 87 /* test private key */ 88 IPP_BAD_PTR1_RET(pPrivate); 89 pPrivate = (IppsBigNumState*)( IPP_ALIGNED_PTR(pPrivate, ALIGN_VAL) ); 90 IPP_BADARG_RET(!BN_VALID_ID(pPrivate), ippStsContextMatchErr); 91 IPP_BADARG_RET((BN_ROOM(pPrivate)*BITSIZE(BNU_CHUNK_T)<ECP_ORDBITSIZE(pEC)), ippStsSizeErr); 92 93 { 94 /* generate random private key X: 0 < X < R */ 95 BNU_CHUNK_T* pOrder = MOD_MODULUS(ECP_MONT_R(pEC)); 96 int orderBitLen = ECP_ORDBITSIZE(pEC); 97 int orderLen = BITS_BNU_CHUNK(orderBitLen); 98 99 BNU_CHUNK_T* pX = BN_NUMBER(pPrivate); 100 int nsX = BITS_BNU_CHUNK(orderBitLen); 101 BNU_CHUNK_T xMask = MASK_BNU_CHUNK(orderBitLen); 102 103 IppStatus sts; 104 do { 105 sts = rndFunc((Ipp32u*)pX, orderBitLen, pRndParam); 106 if(ippStsNoErr!=sts) 107 break; 108 pX[nsX-1] &= xMask; 109 } while( (1 == cpEqu_BNU_CHUNK(pX, nsX, 0)) || 110 (0 <= cpCmp_BNU(pX, nsX, pOrder, orderLen)) ); 111 112 /* set up private */ 113 if(ippStsNoErr==sts) { 114 BN_SIGN(pPrivate) = ippBigNumPOS; 115 FIX_BNU(pX, nsX); 116 BN_SIZE(pPrivate) = nsX; 117 } 118 119 return sts; 120 } 121 } 122