1 //===-- AArch64MCTargetDesc.h - AArch64 Target Descriptions -----*- C++ -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file provides AArch64 specific target descriptions. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #ifndef LLVM_LIB_TARGET_AARCH64_MCTARGETDESC_AARCH64MCTARGETDESC_H 15 #define LLVM_LIB_TARGET_AARCH64_MCTARGETDESC_AARCH64MCTARGETDESC_H 16 17 #include "llvm/Support/DataTypes.h" 18 19 namespace llvm { 20 class formatted_raw_ostream; 21 class MCAsmBackend; 22 class MCCodeEmitter; 23 class MCContext; 24 class MCInstrInfo; 25 class MCInstPrinter; 26 class MCRegisterInfo; 27 class MCObjectWriter; 28 class MCStreamer; 29 class MCSubtargetInfo; 30 class MCTargetStreamer; 31 class StringRef; 32 class Target; 33 class Triple; 34 class raw_ostream; 35 class raw_pwrite_stream; 36 37 extern Target TheAArch64leTarget; 38 extern Target TheAArch64beTarget; 39 extern Target TheARM64Target; 40 41 MCCodeEmitter *createAArch64MCCodeEmitter(const MCInstrInfo &MCII, 42 const MCRegisterInfo &MRI, 43 MCContext &Ctx); 44 MCAsmBackend *createAArch64leAsmBackend(const Target &T, 45 const MCRegisterInfo &MRI, 46 const Triple &TT, StringRef CPU); 47 MCAsmBackend *createAArch64beAsmBackend(const Target &T, 48 const MCRegisterInfo &MRI, 49 const Triple &TT, StringRef CPU); 50 51 MCObjectWriter *createAArch64ELFObjectWriter(raw_pwrite_stream &OS, 52 uint8_t OSABI, 53 bool IsLittleEndian); 54 55 MCObjectWriter *createAArch64MachObjectWriter(raw_pwrite_stream &OS, 56 uint32_t CPUType, 57 uint32_t CPUSubtype); 58 59 MCTargetStreamer *createAArch64AsmTargetStreamer(MCStreamer &S, 60 formatted_raw_ostream &OS, 61 MCInstPrinter *InstPrint, 62 bool isVerboseAsm); 63 64 MCTargetStreamer *createAArch64ObjectTargetStreamer(MCStreamer &S, 65 const MCSubtargetInfo &STI); 66 67 } // End llvm namespace 68 69 // Defines symbolic names for AArch64 registers. This defines a mapping from 70 // register name to register number. 71 // 72 #define GET_REGINFO_ENUM 73 #include "AArch64GenRegisterInfo.inc" 74 75 // Defines symbolic names for the AArch64 instructions. 76 // 77 #define GET_INSTRINFO_ENUM 78 #include "AArch64GenInstrInfo.inc" 79 80 #define GET_SUBTARGETINFO_ENUM 81 #include "AArch64GenSubtargetInfo.inc" 82 83 #endif 84