1; RUN: llc -O0 -stop-after=irtranslator -global-isel -verify-machineinstrs %s -o - 2>&1 | FileCheck %s 2; REQUIRES: global-isel 3; This file checks that the translation from llvm IR to generic MachineInstr 4; is correct. 5target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128" 6target triple = "aarch64-apple-ios" 7 8; Tests for add. 9; CHECK: name: addi64 10; CHECK: [[ARG1:%[0-9]+]](64) = COPY %x0 11; CHECK-NEXT: [[ARG2:%[0-9]+]](64) = COPY %x1 12; CHECK-NEXT: [[RES:%[0-9]+]](64) = G_ADD i64 [[ARG1]], [[ARG2]] 13; CHECK-NEXT: %x0 = COPY [[RES]] 14; CHECK-NEXT: RET_ReallyLR implicit %x0 15define i64 @addi64(i64 %arg1, i64 %arg2) { 16 %res = add i64 %arg1, %arg2 17 ret i64 %res 18} 19 20; Tests for br. 21; CHECK: name: uncondbr 22; CHECK: body: 23; 24; Entry basic block. 25; CHECK: {{[0-9a-zA-Z._-]+}}: 26; 27; Make sure we have one successor and only one. 28; CHECK-NEXT: successors: %[[END:[0-9a-zA-Z._-]+]]({{0x[a-f0-9]+ / 0x[a-f0-9]+}} = 100.00%) 29; 30; Check that we emit the correct branch. 31; CHECK: G_BR label %[[END]] 32; 33; Check that end contains the return instruction. 34; CHECK: [[END]]: 35; CHECK-NEXT: RET_ReallyLR 36define void @uncondbr() { 37 br label %end 38end: 39 ret void 40} 41 42; Tests for or. 43; CHECK: name: ori64 44; CHECK: [[ARG1:%[0-9]+]](64) = COPY %x0 45; CHECK-NEXT: [[ARG2:%[0-9]+]](64) = COPY %x1 46; CHECK-NEXT: [[RES:%[0-9]+]](64) = G_OR i64 [[ARG1]], [[ARG2]] 47; CHECK-NEXT: %x0 = COPY [[RES]] 48; CHECK-NEXT: RET_ReallyLR implicit %x0 49define i64 @ori64(i64 %arg1, i64 %arg2) { 50 %res = or i64 %arg1, %arg2 51 ret i64 %res 52} 53 54; CHECK: name: ori32 55; CHECK: [[ARG1:%[0-9]+]](32) = COPY %w0 56; CHECK-NEXT: [[ARG2:%[0-9]+]](32) = COPY %w1 57; CHECK-NEXT: [[RES:%[0-9]+]](32) = G_OR i32 [[ARG1]], [[ARG2]] 58; CHECK-NEXT: %w0 = COPY [[RES]] 59; CHECK-NEXT: RET_ReallyLR implicit %w0 60define i32 @ori32(i32 %arg1, i32 %arg2) { 61 %res = or i32 %arg1, %arg2 62 ret i32 %res 63} 64