1; RUN: llc -aarch64-atomic-cfg-tidy=0 -mtriple=aarch64-apple-darwin < %s | FileCheck %s 2; RUN: llc -fast-isel -fast-isel-abort=1 -aarch64-atomic-cfg-tidy=0 -mtriple=aarch64-apple-darwin < %s | FileCheck %s 3 4define i32 @fcmp_oeq(float %x, float %y) { 5; CHECK-LABEL: fcmp_oeq 6; CHECK: fcmp s0, s1 7; CHECK-NEXT: b.ne {{LBB.+_2}} 8 %1 = fcmp oeq float %x, %y 9 br i1 %1, label %bb1, label %bb2 10bb2: 11 ret i32 1 12bb1: 13 ret i32 0 14} 15 16define i32 @fcmp_ogt(float %x, float %y) { 17; CHECK-LABEL: fcmp_ogt 18; CHECK: fcmp s0, s1 19; CHECK-NEXT: b.le {{LBB.+_2}} 20 %1 = fcmp ogt float %x, %y 21 br i1 %1, label %bb1, label %bb2 22bb2: 23 ret i32 1 24bb1: 25 ret i32 0 26} 27 28define i32 @fcmp_oge(float %x, float %y) { 29; CHECK-LABEL: fcmp_oge 30; CHECK: fcmp s0, s1 31; CHECK-NEXT: b.lt {{LBB.+_2}} 32 %1 = fcmp oge float %x, %y 33 br i1 %1, label %bb1, label %bb2 34bb2: 35 ret i32 1 36bb1: 37 ret i32 0 38} 39 40define i32 @fcmp_olt(float %x, float %y) { 41; CHECK-LABEL: fcmp_olt 42; CHECK: fcmp s0, s1 43; CHECK-NEXT: b.pl {{LBB.+_2}} 44 %1 = fcmp olt float %x, %y 45 br i1 %1, label %bb1, label %bb2 46bb2: 47 ret i32 1 48bb1: 49 ret i32 0 50} 51 52define i32 @fcmp_ole(float %x, float %y) { 53; CHECK-LABEL: fcmp_ole 54; CHECK: fcmp s0, s1 55; CHECK-NEXT: b.hi {{LBB.+_2}} 56 %1 = fcmp ole float %x, %y 57 br i1 %1, label %bb1, label %bb2 58bb2: 59 ret i32 1 60bb1: 61 ret i32 0 62} 63 64define i32 @fcmp_one(float %x, float %y) { 65; CHECK-LABEL: fcmp_one 66; CHECK: fcmp s0, s1 67; CHECK-NEXT: b.mi 68; CHECK-NEXT: b.gt 69 %1 = fcmp one float %x, %y 70 br i1 %1, label %bb1, label %bb2 71bb2: 72 ret i32 1 73bb1: 74 ret i32 0 75} 76 77define i32 @fcmp_ord(float %x, float %y) { 78; CHECK-LABEL: fcmp_ord 79; CHECK: fcmp s0, s1 80; CHECK-NEXT: b.vs {{LBB.+_2}} 81 %1 = fcmp ord float %x, %y 82 br i1 %1, label %bb1, label %bb2 83bb2: 84 ret i32 1 85bb1: 86 ret i32 0 87} 88 89define i32 @fcmp_uno(float %x, float %y) { 90; CHECK-LABEL: fcmp_uno 91; CHECK: fcmp s0, s1 92; CHECK-NEXT: b.vs {{LBB.+_2}} 93 %1 = fcmp uno float %x, %y 94 br i1 %1, label %bb1, label %bb2 95bb2: 96 ret i32 1 97bb1: 98 ret i32 0 99} 100 101define i32 @fcmp_ueq(float %x, float %y) { 102; CHECK-LABEL: fcmp_ueq 103; CHECK: fcmp s0, s1 104; CHECK-NEXT: b.eq {{LBB.+_2}} 105; CHECK-NEXT: b.vs {{LBB.+_2}} 106 %1 = fcmp ueq float %x, %y 107 br i1 %1, label %bb1, label %bb2 108bb2: 109 ret i32 1 110bb1: 111 ret i32 0 112} 113 114define i32 @fcmp_ugt(float %x, float %y) { 115; CHECK-LABEL: fcmp_ugt 116; CHECK: fcmp s0, s1 117; CHECK-NEXT: b.ls {{LBB.+_2}} 118 %1 = fcmp ugt float %x, %y 119 br i1 %1, label %bb1, label %bb2 120bb2: 121 ret i32 1 122bb1: 123 ret i32 0 124} 125 126define i32 @fcmp_uge(float %x, float %y) { 127; CHECK-LABEL: fcmp_uge 128; CHECK: fcmp s0, s1 129; CHECK-NEXT: b.mi {{LBB.+_2}} 130 %1 = fcmp uge float %x, %y 131 br i1 %1, label %bb1, label %bb2 132bb2: 133 ret i32 1 134bb1: 135 ret i32 0 136} 137 138define i32 @fcmp_ult(float %x, float %y) { 139; CHECK-LABEL: fcmp_ult 140; CHECK: fcmp s0, s1 141; CHECK-NEXT: b.ge {{LBB.+_2}} 142 %1 = fcmp ult float %x, %y 143 br i1 %1, label %bb1, label %bb2 144bb2: 145 ret i32 1 146bb1: 147 ret i32 0 148} 149 150define i32 @fcmp_ule(float %x, float %y) { 151; CHECK-LABEL: fcmp_ule 152; CHECK: fcmp s0, s1 153; CHECK-NEXT: b.gt {{LBB.+_2}} 154 %1 = fcmp ule float %x, %y 155 br i1 %1, label %bb1, label %bb2 156bb2: 157 ret i32 1 158bb1: 159 ret i32 0 160} 161 162define i32 @fcmp_une(float %x, float %y) { 163; CHECK-LABEL: fcmp_une 164; CHECK: fcmp s0, s1 165; CHECK-NEXT: b.eq {{LBB.+_2}} 166 %1 = fcmp une float %x, %y 167 br i1 %1, label %bb1, label %bb2 168bb2: 169 ret i32 1 170bb1: 171 ret i32 0 172} 173 174define i32 @icmp_eq(i32 %x, i32 %y) { 175; CHECK-LABEL: icmp_eq 176; CHECK: cmp w0, w1 177; CHECK-NEXT: b.ne {{LBB.+_2}} 178 %1 = icmp eq i32 %x, %y 179 br i1 %1, label %bb1, label %bb2 180bb2: 181 ret i32 1 182bb1: 183 ret i32 0 184} 185 186define i32 @icmp_ne(i32 %x, i32 %y) { 187; CHECK-LABEL: icmp_ne 188; CHECK: cmp w0, w1 189; CHECK-NEXT: b.eq {{LBB.+_2}} 190 %1 = icmp ne i32 %x, %y 191 br i1 %1, label %bb1, label %bb2 192bb2: 193 ret i32 1 194bb1: 195 ret i32 0 196} 197 198define i32 @icmp_ugt(i32 %x, i32 %y) { 199; CHECK-LABEL: icmp_ugt 200; CHECK: cmp w0, w1 201; CHECK-NEXT: b.ls {{LBB.+_2}} 202 %1 = icmp ugt i32 %x, %y 203 br i1 %1, label %bb1, label %bb2 204bb2: 205 ret i32 1 206bb1: 207 ret i32 0 208} 209 210define i32 @icmp_uge(i32 %x, i32 %y) { 211; CHECK-LABEL: icmp_uge 212; CHECK: cmp w0, w1 213; CHECK-NEXT: b.lo {{LBB.+_2}} 214 %1 = icmp uge i32 %x, %y 215 br i1 %1, label %bb1, label %bb2 216bb2: 217 ret i32 1 218bb1: 219 ret i32 0 220} 221 222define i32 @icmp_ult(i32 %x, i32 %y) { 223; CHECK-LABEL: icmp_ult 224; CHECK: cmp w0, w1 225; CHECK-NEXT: b.hs {{LBB.+_2}} 226 %1 = icmp ult i32 %x, %y 227 br i1 %1, label %bb1, label %bb2 228bb2: 229 ret i32 1 230bb1: 231 ret i32 0 232} 233 234define i32 @icmp_ule(i32 %x, i32 %y) { 235; CHECK-LABEL: icmp_ule 236; CHECK: cmp w0, w1 237; CHECK-NEXT: b.hi {{LBB.+_2}} 238 %1 = icmp ule i32 %x, %y 239 br i1 %1, label %bb1, label %bb2 240bb2: 241 ret i32 1 242bb1: 243 ret i32 0 244} 245 246define i32 @icmp_sgt(i32 %x, i32 %y) { 247; CHECK-LABEL: icmp_sgt 248; CHECK: cmp w0, w1 249; CHECK-NEXT: b.le {{LBB.+_2}} 250 %1 = icmp sgt i32 %x, %y 251 br i1 %1, label %bb1, label %bb2 252bb2: 253 ret i32 1 254bb1: 255 ret i32 0 256} 257 258define i32 @icmp_sge(i32 %x, i32 %y) { 259; CHECK-LABEL: icmp_sge 260; CHECK: cmp w0, w1 261; CHECK-NEXT: b.lt {{LBB.+_2}} 262 %1 = icmp sge i32 %x, %y 263 br i1 %1, label %bb1, label %bb2 264bb2: 265 ret i32 1 266bb1: 267 ret i32 0 268} 269 270define i32 @icmp_slt(i32 %x, i32 %y) { 271; CHECK-LABEL: icmp_slt 272; CHECK: cmp w0, w1 273; CHECK-NEXT: b.ge {{LBB.+_2}} 274 %1 = icmp slt i32 %x, %y 275 br i1 %1, label %bb1, label %bb2 276bb2: 277 ret i32 1 278bb1: 279 ret i32 0 280} 281 282define i32 @icmp_sle(i32 %x, i32 %y) { 283; CHECK-LABEL: icmp_sle 284; CHECK: cmp w0, w1 285; CHECK-NEXT: b.gt {{LBB.+_2}} 286 %1 = icmp sle i32 %x, %y 287 br i1 %1, label %bb1, label %bb2 288bb2: 289 ret i32 1 290bb1: 291 ret i32 0 292} 293 294