1; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s 2; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=VI -check-prefix=FUNC %s 3 4declare double @llvm.AMDGPU.rsq.clamped.f64(double) nounwind readnone 5 6; FUNC-LABEL: {{^}}rsq_clamped_f64: 7; SI: v_rsq_clamp_f64_e32 8 9; VI-DAG: v_rsq_f64_e32 [[RSQ:v\[[0-9]+:[0-9]+\]]], s[{{[0-9]+:[0-9]+}}] 10; TODO: this constant should be folded: 11; VI-DAG: s_mov_b32 s[[LOW1:[0-9+]]], -1 12; VI-DAG: s_mov_b32 s[[HIGH1:[0-9+]]], 0x7fefffff 13; VI-DAG: v_min_f64 v[0:1], [[RSQ]], s{{\[}}[[LOW1]]:[[HIGH1]]] 14; VI-DAG: s_mov_b32 s[[HIGH2:[0-9+]]], 0xffefffff 15; VI-DAG: v_max_f64 v[0:1], v[0:1], s{{\[}}[[LOW1]]:[[HIGH2]]] 16 17define void @rsq_clamped_f64(double addrspace(1)* %out, double %src) nounwind { 18 %rsq_clamped = call double @llvm.AMDGPU.rsq.clamped.f64(double %src) nounwind readnone 19 store double %rsq_clamped, double addrspace(1)* %out, align 8 20 ret void 21} 22