1; RUN: llc -march=amdgcn -mtriple=amdgcn-unknown-amdhsa -mcpu=kaveri -verify-machineinstrs < %s | FileCheck -check-prefix=ALL -check-prefix=HSA -check-prefix=CI-HSA %s 2; RUN: llc -march=amdgcn -mtriple=amdgcn-unknown-amdhsa -mcpu=carrizo -verify-machineinstrs < %s | FileCheck -check-prefix=ALL -check-prefix=HSA -check-prefix=VI-HSA %s 3; RUN: llc -march=amdgcn -mcpu=tahiti -verify-machineinstrs < %s | FileCheck -check-prefix=ALL -check-prefix=MESA -check-prefix=SI-MESA %s 4; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=ALL -check-prefix=MESA -check-prefix=VI-MESA %s 5 6declare i32 @llvm.amdgcn.workgroup.id.x() #0 7declare i32 @llvm.amdgcn.workgroup.id.y() #0 8declare i32 @llvm.amdgcn.workgroup.id.z() #0 9 10; ALL-LABEL {{^}}test_workgroup_id_x: 11 12; HSA: .amd_kernel_code_t 13; HSA: compute_pgm_rsrc2_user_sgpr = 6 14; HSA: compute_pgm_rsrc2_tgid_x_en = 1 15; HSA: compute_pgm_rsrc2_tgid_y_en = 0 16; HSA: compute_pgm_rsrc2_tgid_z_en = 0 17; HSA: compute_pgm_rsrc2_tg_size_en = 0 18; HSA: compute_pgm_rsrc2_tidig_comp_cnt = 0 19; HSA: enable_sgpr_grid_workgroup_count_x = 0 20; HSA: enable_sgpr_grid_workgroup_count_y = 0 21; HSA: enable_sgpr_grid_workgroup_count_z = 0 22; HSA: .end_amd_kernel_code_t 23 24; MESA: v_mov_b32_e32 [[VCOPY:v[0-9]+]], s2{{$}} 25; HSA: v_mov_b32_e32 [[VCOPY:v[0-9]+]], s6{{$}} 26 27; ALL-NOT: [[VCOPY]] 28; ALL: {{buffer|flat}}_store_dword {{.*}}[[VCOPY]] 29 30; HSA: COMPUTE_PGM_RSRC2:USER_SGPR: 6 31; ALL-NOHSA: COMPUTE_PGM_RSRC2:USER_SGPR: 2 32; ALL: COMPUTE_PGM_RSRC2:TGID_X_EN: 1 33; ALL: COMPUTE_PGM_RSRC2:TGID_Y_EN: 0 34; ALL: COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 35; ALL: COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0 36define void @test_workgroup_id_x(i32 addrspace(1)* %out) #1 { 37 %id = call i32 @llvm.amdgcn.workgroup.id.x() 38 store i32 %id, i32 addrspace(1)* %out 39 ret void 40} 41 42; ALL-LABEL {{^}}test_workgroup_id_y: 43; HSA: compute_pgm_rsrc2_user_sgpr = 6 44; HSA: compute_pgm_rsrc2_tgid_x_en = 1 45; HSA: compute_pgm_rsrc2_tgid_y_en = 1 46; HSA: compute_pgm_rsrc2_tgid_z_en = 0 47; HSA: compute_pgm_rsrc2_tg_size_en = 0 48; HSA: enable_sgpr_grid_workgroup_count_x = 0 49; HSA: enable_sgpr_grid_workgroup_count_y = 0 50; HSA: enable_sgpr_grid_workgroup_count_z = 0 51 52; MESA: v_mov_b32_e32 [[VCOPY:v[0-9]+]], s3{{$}} 53; HSA: v_mov_b32_e32 [[VCOPY:v[0-9]+]], s7{{$}} 54 55; ALL-NOT: [[VCOPY]] 56; ALL: {{buffer|flat}}_store_dword {{.*}}[[VCOPY]] 57 58; HSA: COMPUTE_PGM_RSRC2:USER_SGPR: 6 59; ALL-NOHSA: COMPUTE_PGM_RSRC2:USER_SGPR: 2 60; ALL: COMPUTE_PGM_RSRC2:TGID_X_EN: 1 61; ALL: COMPUTE_PGM_RSRC2:TGID_Y_EN: 1 62; ALL: COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 63; ALL: COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0 64define void @test_workgroup_id_y(i32 addrspace(1)* %out) #1 { 65 %id = call i32 @llvm.amdgcn.workgroup.id.y() 66 store i32 %id, i32 addrspace(1)* %out 67 ret void 68} 69 70; ALL-LABEL {{^}}test_workgroup_id_z: 71; HSA: compute_pgm_rsrc2_user_sgpr = 6 72; HSA: compute_pgm_rsrc2_tgid_x_en = 1 73; HSA: compute_pgm_rsrc2_tgid_y_en = 0 74; HSA: compute_pgm_rsrc2_tgid_z_en = 1 75; HSA: compute_pgm_rsrc2_tg_size_en = 0 76; HSA: compute_pgm_rsrc2_tidig_comp_cnt = 0 77; HSA: enable_sgpr_private_segment_buffer = 1 78; HSA: enable_sgpr_dispatch_ptr = 0 79; HSA: enable_sgpr_queue_ptr = 0 80; HSA: enable_sgpr_kernarg_segment_ptr = 1 81; HSA: enable_sgpr_dispatch_id = 0 82; HSA: enable_sgpr_flat_scratch_init = 0 83; HSA: enable_sgpr_private_segment_size = 0 84; HSA: enable_sgpr_grid_workgroup_count_x = 0 85; HSA: enable_sgpr_grid_workgroup_count_y = 0 86; HSA: enable_sgpr_grid_workgroup_count_z = 0 87 88; MESA: v_mov_b32_e32 [[VCOPY:v[0-9]+]], s3{{$}} 89; HSA: v_mov_b32_e32 [[VCOPY:v[0-9]+]], s7{{$}} 90 91; ALL-NOT: [[VCOPY]] 92; ALL: {{buffer|flat}}_store_dword {{.*}}[[VCOPY]] 93 94; HSA: COMPUTE_PGM_RSRC2:USER_SGPR: 6 95; ALL-NOHSA: COMPUTE_PGM_RSRC2:USER_SGPR: 2 96; ALL: COMPUTE_PGM_RSRC2:TGID_X_EN: 1 97; ALL: COMPUTE_PGM_RSRC2:TGID_Y_EN: 0 98; ALL: COMPUTE_PGM_RSRC2:TGID_Z_EN: 1 99; ALL: COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0 100define void @test_workgroup_id_z(i32 addrspace(1)* %out) #1 { 101 %id = call i32 @llvm.amdgcn.workgroup.id.z() 102 store i32 %id, i32 addrspace(1)* %out 103 ret void 104} 105 106attributes #0 = { nounwind readnone } 107attributes #1 = { nounwind } 108