1; RUN: llc -O0 -mtriple thumbv7-windows-itanium -filetype asm -o - %s | FileCheck %s 2 3declare arm_aapcs_vfpcc i32 @num_entries() 4 5define arm_aapcs_vfpcc void @test___builtin_alloca() { 6entry: 7 %array = alloca i8*, align 4 8 %call = call arm_aapcs_vfpcc i32 @num_entries() 9 %mul = mul i32 4, %call 10 %0 = alloca i8, i32 %mul 11 store i8* %0, i8** %array, align 4 12 ret void 13} 14 15; CHECK: bl num_entries 16; Any register is actually valid here, but turns out we use lr, 17; because we do not have the kill flag on R0. 18; CHECK: mov.w [[R1:lr]], #7 19; CHECK: add.w [[R0:r[0-9]+]], [[R1]], [[R0]], lsl #2 20; CHECK: bic [[R0]], [[R0]], #7 21; CHECK: lsrs r4, [[R0]], #2 22; CHECK: bl __chkstk 23; CHECK: sub.w sp, sp, r4 24 25