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1; RUN: llc -mtriple=armv7-none-eabi -mattr=+neon < %s -o - | FileCheck %s
2
3; The following functions test the use case where an X constraint is used to
4; add a dependency between an assembly instruction (vmsr in this case) and
5; another instruction. In each function, we use a different type for the
6; X constraint argument.
7;
8; We can something similar from the following C code:
9; double f1(double f, int pscr_value) {
10;   asm volatile("vmsr fpscr,%0" : "=X" ((f)): "r" (pscr_value));
11;   return f+f;
12; }
13
14; CHECK-LABEL: f1
15; CHECK: vmsr fpscr
16; CHECK: vadd.f64
17
18define arm_aapcs_vfpcc double @f1(double %f, i32 %pscr_value) {
19entry:
20  %f.addr = alloca double, align 8
21  store double %f, double* %f.addr, align 8
22  call void asm sideeffect "vmsr fpscr,$1", "=*X,r"(double* nonnull %f.addr, i32 %pscr_value) nounwind
23  %0 = load double, double* %f.addr, align 8
24  %add = fadd double %0, %0
25  ret double %add
26}
27
28; int f2(int f, int pscr_value) {
29;   asm volatile("vmsr fpscr,%0" : "=X" ((f)): "r" (pscr_value));
30;   return f+f;
31; }
32
33; CHECK-LABEL: f2
34; CHECK: vmsr fpscr
35; CHECK: mul
36define arm_aapcs_vfpcc i32 @f2(i32 %f, i32 %pscr_value) {
37entry:
38  %f.addr = alloca i32, align 4
39  store i32 %f, i32* %f.addr, align 4
40  call void asm sideeffect "vmsr fpscr,$1", "=*X,r"(i32* nonnull %f.addr, i32 %pscr_value) nounwind
41  %0 = load i32, i32* %f.addr, align 4
42  %mul = mul i32 %0, %0
43  ret i32 %mul
44}
45
46
47; int f3(int f, int pscr_value) {
48;   asm volatile("vmsr fpscr,%0" : "=X" ((f)): "r" (pscr_value));
49;   return f+f;
50; }
51
52; typedef signed char int8_t;
53; typedef __attribute__((neon_vector_type(8))) int8_t int8x8_t;
54; void f3 (void)
55; {
56;   int8x8_t vector_res_int8x8;
57;   unsigned int fpscr;
58;   asm volatile ("vmsr fpscr,%1" : "=X" ((vector_res_int8x8)) : "r" (fpscr));
59;   return vector_res_int8x8 * vector_res_int8x8;
60; }
61
62; CHECK-LABEL: f3
63; CHECK: vmsr fpscr
64; CHECK: vmul.i8
65define arm_aapcs_vfpcc <8 x i8> @f3() {
66entry:
67  %vector_res_int8x8 = alloca <8 x i8>, align 8
68  %0 = getelementptr inbounds <8 x i8>, <8 x i8>* %vector_res_int8x8, i32 0, i32 0
69  call void asm sideeffect "vmsr fpscr,$1", "=*X,r"(<8 x i8>* nonnull %vector_res_int8x8, i32 undef) nounwind
70  %1 = load <8 x i8>, <8 x i8>* %vector_res_int8x8, align 8
71  %mul = mul <8 x i8> %1, %1
72  ret <8 x i8> %mul
73}
74
75; We can emit integer constants.
76; We can get this from:
77; void f() {
78;   int x = 2;
79;   asm volatile ("add r0, r0, %0" : : "X" (x));
80; }
81;
82; CHECK-LABEL: f4
83; CHECK: add r0, r0, #2
84define void @f4() {
85entry:
86  tail call void asm sideeffect "add r0, r0, $0", "X"(i32 2)
87  ret void
88}
89
90; We can emit function labels. This is equivalent to the following C code:
91; void f(void) {
92;   void (*x)(void) = &foo;
93;   asm volatile ("bl %0" : : "X" (x));
94; }
95; CHECK-LABEL: f5
96; CHECK: bl f4
97define void @f5() {
98entry:
99  tail call void asm sideeffect "bl $0", "X"(void ()* nonnull @f4)
100  ret void
101}
102
103declare void @foo(...)
104
105; This tests the behavior of the X constraint when used on functions pointers,
106; or functions with a cast. In the first asm call we figure out that this
107; is a function pointer and emit the label. However, in the second asm call
108; we can't see through the bitcast and we end up having to lower this constraint
109; to something else. This is not ideal, but it is a correct behaviour according
110; to the definition of the X constraint.
111;
112; In this case (and other cases where we could have emitted something else),
113; what we're doing with the X constraint is not particularly useful either,
114; since the user could have used "r" in this situation for the same effect.
115
116; CHECK-LABEL: f6
117; CHECK: bl foo
118; CHECK: bl r
119
120define void @f6() nounwind {
121entry:
122  tail call void asm sideeffect "bl $0", "X"(void (...)* @foo) nounwind
123  tail call void asm sideeffect "bl $0", "X"(void (...)* bitcast (void ()* @f4 to void (...)*)) nounwind
124  ret void
125}
126
127; The following IR can be generated from C code with a function like:
128; void a() {
129;   void* a = &&A;
130;   asm volatile ("bl %0" : : "X" (a));
131;  A:
132;   return;
133; }
134;
135; Ideally this would give the block address of bb, but it requires us to see
136; through blockaddress, which we can't do at the moment. This might break some
137; existing use cases where a user would expect to get a block label and instead
138; gets the block address in a register. However, note that according to the
139; "no constraints" definition this behaviour is correct (although not very nice).
140
141; CHECK-LABEL: f7
142; CHECK: bl
143define void @f7() {
144  call void asm sideeffect "bl $0", "X"( i8* blockaddress(@f7, %bb) )
145  br label %bb
146bb:
147  ret void
148}
149
150; If we use a constraint "=*X", we should get a store back to *%x (in r0).
151; CHECK-LABEL: f8
152; CHECK: str	r{{.*}}, [r0]
153define void @f8(i32 *%x) {
154entry:
155  tail call void asm sideeffect "add $0, r0, r0", "=*X"(i32 *%x)
156  ret void
157}
158