1; RUN: llc -mtriple=thumbv7-apple-ios7.0 -o - %s -verify-machineinstrs | FileCheck %s 2 3; The base register for the store is killed by the last instruction, but is 4; actually also used during as part of the store itself. If an extra ADD is 5; inserted, it should not kill the base. 6define void @test_base_kill(i32 %v0, i32 %v1, i32* %addr) { 7; CHECK-LABEL: test_base_kill: 8; CHECK: adds [[NEWBASE:r[0-9]+]], r2, #4 9; CHECK: stm [[NEWBASE]]!, {r0, r1, r2} 10 11 %addr.1 = getelementptr i32, i32* %addr, i32 1 12 store i32 %v0, i32* %addr.1 13 14 %addr.2 = getelementptr i32, i32* %addr, i32 2 15 store i32 %v1, i32* %addr.2 16 17 %addr.3 = getelementptr i32, i32* %addr, i32 3 18 %val = ptrtoint i32* %addr to i32 19 store i32 %val, i32* %addr.3 20 21 ret void 22} 23 24; Similar, but it's not sufficient to look at just the last instruction (where 25; liveness of the base is determined). An intervening instruction might be moved 26; past it to form the STM. 27define void @test_base_kill_mid(i32 %v0, i32* %addr, i32 %v1) { 28; CHECK-LABEL: test_base_kill_mid: 29; CHECK: adds [[NEWBASE:r[0-9]+]], r1, #4 30; CHECK: stm [[NEWBASE]]!, {r0, r1, r2} 31 32 %addr.1 = getelementptr i32, i32* %addr, i32 1 33 store i32 %v0, i32* %addr.1 34 35 %addr.2 = getelementptr i32, i32* %addr, i32 2 36 %val = ptrtoint i32* %addr to i32 37 store i32 %val, i32* %addr.2 38 39 %addr.3 = getelementptr i32, i32* %addr, i32 3 40 store i32 %v1, i32* %addr.3 41 42 ret void 43} 44