1; RUN: llc < %s -pre-RA-sched=default 2; RUN: llc < %s -pre-RA-sched=list-burr 3; RUN: llc < %s -pre-RA-sched=fast 4; PR859 5 6; The top-down schedulers are excluded here because they don't yet support 7; targets that use physreg defs. 8 9declare i32 @printf(i8*, i32, float) 10 11define i32 @testissue(i32 %i, float %x, float %y) { 12 br label %bb1 13 14bb1: ; preds = %bb1, %0 15 %x1 = fmul float %x, %y ; <float> [#uses=1] 16 %y1 = fmul float %y, 7.500000e-01 ; <float> [#uses=1] 17 %z1 = fadd float %x1, %y1 ; <float> [#uses=1] 18 %x2 = fmul float %x, 5.000000e-01 ; <float> [#uses=1] 19 %y2 = fmul float %y, 0x3FECCCCCC0000000 ; <float> [#uses=1] 20 %z2 = fadd float %x2, %y2 ; <float> [#uses=1] 21 %z3 = fadd float %z1, %z2 ; <float> [#uses=1] 22 %i1 = shl i32 %i, 3 ; <i32> [#uses=1] 23 %j1 = add i32 %i, 7 ; <i32> [#uses=1] 24 %m1 = add i32 %i1, %j1 ; <i32> [#uses=2] 25 %b = icmp sle i32 %m1, 6 ; <i1> [#uses=1] 26 br i1 %b, label %bb1, label %bb2 27 28bb2: ; preds = %bb1 29 %Msg = inttoptr i64 0 to i8* ; <i8*> [#uses=1] 30 call i32 @printf( i8* %Msg, i32 %m1, float %z3 ) ; <i32>:1 [#uses=0] 31 ret i32 0 32} 33