1; RUN: llc -march=hexagon -mcpu=hexagonv5 -enable-hexagon-ieee-rnd-near < %s | FileCheck %s 2; Check that we generate conversion from double precision floating point 3; to 32-bit int value in IEEE rounding to the nearest mode in V5. 4 5; CHECK: r{{[0-9]+}} = convert_df2w(r{{[0-9]+}}:{{[0-9]+}}) 6 7define i32 @main() nounwind { 8entry: 9 %retval = alloca i32, align 4 10 %i = alloca i32, align 4 11 %a = alloca double, align 8 12 %b = alloca double, align 8 13 %c = alloca double, align 8 14 store i32 0, i32* %retval 15 store double 1.540000e+01, double* %a, align 8 16 store double 9.100000e+00, double* %b, align 8 17 %0 = load double, double* %a, align 8 18 %1 = load double, double* %b, align 8 19 %add = fadd double %0, %1 20 store double %add, double* %c, align 8 21 %2 = load double, double* %c, align 8 22 %conv = fptosi double %2 to i32 23 store i32 %conv, i32* %i, align 4 24 %3 = load i32, i32* %i, align 4 25 ret i32 %3 26} 27