1; A basic inline assembly test 2 3; RUN: llc -march=mips -mattr=+msa,+fp64 < %s | FileCheck %s 4 5@v4i32_r = global <4 x i32> zeroinitializer, align 16 6 7define void @test1() nounwind { 8entry: 9 ; CHECK-LABEL: test1: 10 %0 = call <4 x i32> asm "ldi.w ${0:w}, 1", "=f"() 11 ; CHECK: ldi.w $w{{[1-3]?[0-9]}}, 1 12 store <4 x i32> %0, <4 x i32>* @v4i32_r 13 ret void 14} 15 16define void @test2() nounwind { 17entry: 18 ; CHECK-LABEL: test2: 19 %0 = load <4 x i32>, <4 x i32>* @v4i32_r 20 %1 = call <4 x i32> asm "addvi.w ${0:w}, ${1:w}, 1", "=f,f"(<4 x i32> %0) 21 ; CHECK: addvi.w $w{{[1-3]?[0-9]}}, $w{{[1-3]?[0-9]}}, 1 22 store <4 x i32> %1, <4 x i32>* @v4i32_r 23 ret void 24} 25 26define void @test3() nounwind { 27entry: 28 ; CHECK-LABEL: test3: 29 %0 = load <4 x i32>, <4 x i32>* @v4i32_r 30 %1 = call <4 x i32> asm sideeffect "addvi.w ${0:w}, ${1:w}, 1", "=f,f,~{$w0}"(<4 x i32> %0) 31 ; CHECK: addvi.w $w{{([1-9]|[1-3][0-9])}}, $w{{([1-9]|[1-3][0-9])}}, 1 32 store <4 x i32> %1, <4 x i32>* @v4i32_r 33 ret void 34} 35