1; RUN: llc -march=mipsel -mattr=mips16 -relocation-model=pic < %s | FileCheck %s -check-prefix=16 2 3@t = global i32 10, align 4 4@f = global i32 199, align 4 5@a = global i32 1, align 4 6@b = global i32 10, align 4 7@c = global i32 1, align 4 8@z1 = common global i32 0, align 4 9@z2 = common global i32 0, align 4 10@z3 = common global i32 0, align 4 11@z4 = common global i32 0, align 4 12@.str = private unnamed_addr constant [5 x i8] c"%i \0A\00", align 1 13 14define void @calc_seleq() nounwind "target-cpu"="mips16" "target-features"="+mips16,+o32" { 15entry: 16 %0 = load i32, i32* @a, align 4 17 %1 = load i32, i32* @b, align 4 18 %cmp = icmp ne i32 %0, %1 19 br i1 %cmp, label %cond.true, label %cond.false 20 21cond.true: ; preds = %entry 22 %2 = load i32, i32* @f, align 4 23 br label %cond.end 24 25cond.false: ; preds = %entry 26 %3 = load i32, i32* @t, align 4 27 br label %cond.end 28 29cond.end: ; preds = %cond.false, %cond.true 30 %cond = phi i32 [ %2, %cond.true ], [ %3, %cond.false ] 31 store i32 %cond, i32* @z1, align 4 32 %4 = load i32, i32* @b, align 4 33 %5 = load i32, i32* @a, align 4 34 %cmp1 = icmp ne i32 %4, %5 35 br i1 %cmp1, label %cond.true2, label %cond.false3 36 37cond.true2: ; preds = %cond.end 38 %6 = load i32, i32* @f, align 4 39 br label %cond.end4 40 41cond.false3: ; preds = %cond.end 42 %7 = load i32, i32* @t, align 4 43 br label %cond.end4 44 45cond.end4: ; preds = %cond.false3, %cond.true2 46 %cond5 = phi i32 [ %6, %cond.true2 ], [ %7, %cond.false3 ] 47 store i32 %cond5, i32* @z2, align 4 48 %8 = load i32, i32* @c, align 4 49 %9 = load i32, i32* @a, align 4 50 %cmp6 = icmp ne i32 %8, %9 51 br i1 %cmp6, label %cond.true7, label %cond.false8 52 53cond.true7: ; preds = %cond.end4 54 %10 = load i32, i32* @t, align 4 55 br label %cond.end9 56 57cond.false8: ; preds = %cond.end4 58 %11 = load i32, i32* @f, align 4 59 br label %cond.end9 60 61cond.end9: ; preds = %cond.false8, %cond.true7 62 %cond10 = phi i32 [ %10, %cond.true7 ], [ %11, %cond.false8 ] 63 store i32 %cond10, i32* @z3, align 4 64 %12 = load i32, i32* @a, align 4 65 %13 = load i32, i32* @c, align 4 66 %cmp11 = icmp ne i32 %12, %13 67 br i1 %cmp11, label %cond.true12, label %cond.false13 68 69cond.true12: ; preds = %cond.end9 70 %14 = load i32, i32* @t, align 4 71 br label %cond.end14 72 73cond.false13: ; preds = %cond.end9 74 %15 = load i32, i32* @f, align 4 75 br label %cond.end14 76 77cond.end14: ; preds = %cond.false13, %cond.true12 78 %cond15 = phi i32 [ %14, %cond.true12 ], [ %15, %cond.false13 ] 79 store i32 %cond15, i32* @z4, align 4 80 ret void 81} 82 83attributes #0 = { nounwind "target-cpu"="mips16" "target-features"="+mips16,+o32" } 84attributes #1 = { "target-cpu"="mips16" "target-features"="+mips16,+o32" } 85 86; 16: cmp ${{[0-9]+}}, ${{[0-9]+}} 87; 16: bteqz $BB{{[0-9]+}}_{{[0-9]}} 88 89; 16: cmp ${{[0-9]+}}, ${{[0-9]+}} 90; 16: bteqz $BB{{[0-9]+}}_{{[0-9]}} 91 92; 16: cmp ${{[0-9]+}}, ${{[0-9]+}} 93; 16: bteqz $BB{{[0-9]+}}_{{[0-9]}} 94 95; 16: cmp ${{[0-9]+}}, ${{[0-9]+}} 96; 16: bteqz $BB{{[0-9]+}}_{{[0-9]}} 97 98