1; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 | FileCheck %s --check-prefix=ELF64 2 3; Test add with non-legal types 4 5define void @add_i8(i8 %a, i8 %b) nounwind { 6entry: 7; ELF64: add_i8 8 %a.addr = alloca i8, align 4 9 %0 = add i8 %a, %b 10; ELF64: add 11 store i8 %0, i8* %a.addr, align 4 12 ret void 13} 14 15define void @add_i8_imm(i8 %a) nounwind { 16entry: 17; ELF64: add_i8_imm 18 %a.addr = alloca i8, align 4 19 %0 = add i8 %a, 22; 20; ELF64: addi 21 store i8 %0, i8* %a.addr, align 4 22 ret void 23} 24 25define void @add_i16(i16 %a, i16 %b) nounwind { 26entry: 27; ELF64: add_i16 28 %a.addr = alloca i16, align 4 29 %0 = add i16 %a, %b 30; ELF64: add 31 store i16 %0, i16* %a.addr, align 4 32 ret void 33} 34 35define void @add_i16_imm(i16 %a, i16 %b) nounwind { 36entry: 37; ELF64: add_i16_imm 38 %a.addr = alloca i16, align 4 39 %0 = add i16 %a, 243; 40; ELF64: addi 41 store i16 %0, i16* %a.addr, align 4 42 ret void 43} 44 45; Test or with non-legal types 46 47define void @or_i8(i8 %a, i8 %b) nounwind { 48entry: 49; ELF64: or_i8 50 %a.addr = alloca i8, align 4 51 %0 = or i8 %a, %b 52; ELF64: or 53 store i8 %0, i8* %a.addr, align 4 54 ret void 55} 56 57define void @or_i8_imm(i8 %a) nounwind { 58entry: 59; ELF64: or_i8_imm 60 %a.addr = alloca i8, align 4 61 %0 = or i8 %a, -13; 62; ELF64: ori 63 store i8 %0, i8* %a.addr, align 4 64 ret void 65} 66 67define void @or_i16(i16 %a, i16 %b) nounwind { 68entry: 69; ELF64: or_i16 70 %a.addr = alloca i16, align 4 71 %0 = or i16 %a, %b 72; ELF64: or 73 store i16 %0, i16* %a.addr, align 4 74 ret void 75} 76 77define void @or_i16_imm(i16 %a) nounwind { 78entry: 79; ELF64: or_i16_imm 80 %a.addr = alloca i16, align 4 81 %0 = or i16 %a, 273; 82; ELF64: ori 83 store i16 %0, i16* %a.addr, align 4 84 ret void 85} 86 87; Test sub with non-legal types 88 89define void @sub_i8(i8 %a, i8 %b) nounwind { 90entry: 91; ELF64: sub_i8 92 %a.addr = alloca i8, align 4 93 %0 = sub i8 %a, %b 94; ELF64: subf 95 store i8 %0, i8* %a.addr, align 4 96 ret void 97} 98 99define void @sub_i8_imm(i8 %a) nounwind { 100entry: 101; ELF64: sub_i8_imm 102 %a.addr = alloca i8, align 4 103 %0 = sub i8 %a, 22; 104; ELF64: addi 105 store i8 %0, i8* %a.addr, align 4 106 ret void 107} 108 109define void @sub_i16(i16 %a, i16 %b) nounwind { 110entry: 111; ELF64: sub_i16 112 %a.addr = alloca i16, align 4 113 %0 = sub i16 %a, %b 114; ELF64: subf 115 store i16 %0, i16* %a.addr, align 4 116 ret void 117} 118 119define void @sub_i16_imm(i16 %a) nounwind { 120entry: 121; ELF64: sub_i16_imm 122 %a.addr = alloca i16, align 4 123 %0 = sub i16 %a, 247; 124; ELF64: addi 125 store i16 %0, i16* %a.addr, align 4 126 ret void 127} 128 129define void @sub_i16_badimm(i16 %a) nounwind { 130entry: 131; ELF64: sub_i16_imm 132 %a.addr = alloca i16, align 4 133 %0 = sub i16 %a, -32768; 134; ELF64: subf 135 store i16 %0, i16* %a.addr, align 4 136 ret void 137} 138