1; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=g5 | FileCheck %s 2; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr6 | FileCheck -check-prefix=CHECK-PWR6 %s 3; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=a2 | FileCheck -check-prefix=CHECK-A2 %s 4; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -mattr=+vsx | FileCheck -check-prefix=CHECK-VSX %s 5target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64" 6target triple = "powerpc64-unknown-linux-gnu" 7 8define float @foo(i32 %a) nounwind { 9entry: 10 %x = sitofp i32 %a to float 11 ret float %x 12 13; CHECK: @foo 14; CHECK: extsw [[REG:[0-9]+]], 3 15; CHECK: std [[REG]], 16; CHECK: lfd [[REG2:[0-9]+]], 17; CHECK: fcfid [[REG3:[0-9]+]], [[REG2]] 18; CHECK: frsp 1, [[REG3]] 19; CHECK: blr 20 21; CHECK-PWR6: @foo 22; CHECK-PWR6: stw 3, 23; CHECK-PWR6: lfiwax [[REG:[0-9]+]], 24; CHECK-PWR6: fcfid [[REG2:[0-9]+]], [[REG]] 25; CHECK-PWR6: frsp 1, [[REG2]] 26; CHECK-PWR6: blr 27 28; CHECK-A2: @foo 29; CHECK-A2: stw 3, 30; CHECK-A2: lfiwax [[REG:[0-9]+]], 31; CHECK-A2: fcfids 1, [[REG]] 32; CHECK-A2: blr 33 34; CHECK-VSX: @foo 35; CHECK-VSX: stw 3, 36; CHECK-VSX: lfiwax [[REG:[0-9]+]], 37; CHECK-VSX: fcfids 1, [[REG]] 38; CHECK-VSX: blr 39} 40 41define double @goo(i32 %a) nounwind { 42entry: 43 %x = sitofp i32 %a to double 44 ret double %x 45 46; CHECK: @goo 47; CHECK: extsw [[REG:[0-9]+]], 3 48; CHECK: std [[REG]], 49; CHECK: lfd [[REG2:[0-9]+]], 50; CHECK: fcfid 1, [[REG2]] 51; CHECK: blr 52 53; CHECK-PWR6: @goo 54; CHECK-PWR6: stw 3, 55; CHECK-PWR6: lfiwax [[REG:[0-9]+]], 56; CHECK-PWR6: fcfid 1, [[REG]] 57; CHECK-PWR6: blr 58 59; CHECK-A2: @goo 60; CHECK-A2: stw 3, 61; CHECK-A2: lfiwax [[REG:[0-9]+]], 62; CHECK-A2: fcfid 1, [[REG]] 63; CHECK-A2: blr 64 65; CHECK-VSX: @goo 66; CHECK-VSX: stw 3, 67; CHECK-VSX: lfiwax [[REG:[0-9]+]], 68; CHECK-VSX: xscvsxddp 1, [[REG]] 69; CHECK-VSX: blr 70} 71 72define float @foou(i32 %a) nounwind { 73entry: 74 %x = uitofp i32 %a to float 75 ret float %x 76 77; CHECK-A2: @foou 78; CHECK-A2: stw 3, 79; CHECK-A2: lfiwzx [[REG:[0-9]+]], 80; CHECK-A2: fcfidus 1, [[REG]] 81; CHECK-A2: blr 82 83; CHECK-VSX: @foou 84; CHECK-VSX: stw 3, 85; CHECK-VSX: lfiwzx [[REG:[0-9]+]], 86; CHECK-VSX: fcfidus 1, [[REG]] 87; CHECK-VSX: blr 88} 89 90define double @goou(i32 %a) nounwind { 91entry: 92 %x = uitofp i32 %a to double 93 ret double %x 94 95; CHECK-A2: @goou 96; CHECK-A2: stw 3, 97; CHECK-A2: lfiwzx [[REG:[0-9]+]], 98; CHECK-A2: fcfidu 1, [[REG]] 99; CHECK-A2: blr 100 101; CHECK-VSX: @goou 102; CHECK-VSX: stw 3, 103; CHECK-VSX: lfiwzx [[REG:[0-9]+]], 104; CHECK-VSX: xscvuxddp 1, [[REG]] 105; CHECK-VSX: blr 106} 107 108