1; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr8 -mattr=-direct-move | FileCheck %s 2; RUN: llc < %s -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr8 -mattr=-direct-move | FileCheck %s 3 4@d = common global double 0.000000e+00, align 8 5@f = common global float 0.000000e+00, align 4 6@i = common global i32 0, align 4 7@ui = common global i32 0, align 4 8 9; Function Attrs: nounwind 10define void @dblToInt() #0 { 11entry: 12 %ii = alloca i32, align 4 13 %0 = load double, double* @d, align 8 14 %conv = fptosi double %0 to i32 15 store volatile i32 %conv, i32* %ii, align 4 16 ret void 17; CHECK-LABEL: @dblToInt 18; CHECK: xscvdpsxws [[REGCONV1:[0-9]+]], 19; CHECK: stxsiwx [[REGCONV1]], 20} 21 22; Function Attrs: nounwind 23define void @fltToInt() #0 { 24entry: 25 %ii = alloca i32, align 4 26 %0 = load float, float* @f, align 4 27 %conv = fptosi float %0 to i32 28 store volatile i32 %conv, i32* %ii, align 4 29 ret void 30; CHECK-LABEL: @fltToInt 31; CHECK: xscvdpsxws [[REGCONV2:[0-9]+]], 32; CHECK: stxsiwx [[REGCONV2]], 33} 34 35; Function Attrs: nounwind 36define void @intToDbl() #0 { 37entry: 38 %dd = alloca double, align 8 39 %0 = load i32, i32* @i, align 4 40 %conv = sitofp i32 %0 to double 41 store volatile double %conv, double* %dd, align 8 42 ret void 43; CHECK-LABEL: @intToDbl 44; CHECK: lxsiwax [[REGLD1:[0-9]+]], 45; CHECK: xscvsxddp {{[0-9]+}}, [[REGLD1]] 46} 47 48; Function Attrs: nounwind 49define void @intToFlt() #0 { 50entry: 51 %ff = alloca float, align 4 52 %0 = load i32, i32* @i, align 4 53 %conv = sitofp i32 %0 to float 54 store volatile float %conv, float* %ff, align 4 55 ret void 56; CHECK-LABEL: @intToFlt 57; CHECK: lxsiwax [[REGLD2:[0-9]+]], 58; CHECK: xscvsxdsp {{[0-9]}}, [[REGLD2]] 59} 60 61; Function Attrs: nounwind 62define void @dblToUInt() #0 { 63entry: 64 %uiui = alloca i32, align 4 65 %0 = load double, double* @d, align 8 66 %conv = fptoui double %0 to i32 67 store volatile i32 %conv, i32* %uiui, align 4 68 ret void 69; CHECK-LABEL: @dblToUInt 70; CHECK: xscvdpuxws [[REGCONV3:[0-9]+]], 71; CHECK: stxsiwx [[REGCONV3]], 72} 73 74; Function Attrs: nounwind 75define void @fltToUInt() #0 { 76entry: 77 %uiui = alloca i32, align 4 78 %0 = load float, float* @f, align 4 79 %conv = fptoui float %0 to i32 80 store volatile i32 %conv, i32* %uiui, align 4 81 ret void 82; CHECK-LABEL: @fltToUInt 83; CHECK: xscvdpuxws [[REGCONV4:[0-9]+]], 84; CHECK: stxsiwx [[REGCONV4]], 85} 86 87; Function Attrs: nounwind 88define void @uIntToDbl() #0 { 89entry: 90 %dd = alloca double, align 8 91 %0 = load i32, i32* @ui, align 4 92 %conv = uitofp i32 %0 to double 93 store volatile double %conv, double* %dd, align 8 94 ret void 95; CHECK-LABEL: @uIntToDbl 96; CHECK: lxsiwzx [[REGLD3:[0-9]+]], 97; CHECK: xscvuxddp {{[0-9]+}}, [[REGLD3]] 98} 99 100; Function Attrs: nounwind 101define void @uIntToFlt() #0 { 102entry: 103 %ff = alloca float, align 4 104 %0 = load i32, i32* @ui, align 4 105 %conv = uitofp i32 %0 to float 106 store volatile float %conv, float* %ff, align 4 107 ret void 108; CHECK-LABEL: @uIntToFlt 109; CHECK: lxsiwzx [[REGLD4:[0-9]+]], 110; CHECK: xscvuxdsp {{[0-9]+}}, [[REGLD4]] 111} 112 113; Function Attrs: nounwind 114define void @dblToFloat() #0 { 115entry: 116 %ff = alloca float, align 4 117 %0 = load double, double* @d, align 8 118 %conv = fptrunc double %0 to float 119 store volatile float %conv, float* %ff, align 4 120 ret void 121; CHECK-LABEL: @dblToFloat 122; CHECK: lxsdx [[REGLD5:[0-9]+]], 123; CHECK: stxsspx [[REGLD5]], 124} 125 126; Function Attrs: nounwind 127define void @floatToDbl() #0 { 128entry: 129 %dd = alloca double, align 8 130 %0 = load float, float* @f, align 4 131 %conv = fpext float %0 to double 132 store volatile double %conv, double* %dd, align 8 133 ret void 134; CHECK-LABEL: @floatToDbl 135; CHECK: lxsspx [[REGLD5:[0-9]+]], 136; CHECK: stxsdx [[REGLD5]], 137} 138