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1;RUN: llc -march=sparc < %s -verify-machineinstrs | FileCheck %s
2;RUN: llc -march=sparc -O0 < %s -verify-machineinstrs | FileCheck %s -check-prefix=UNOPT
3
4target triple = "sparc-unknown-linux-gnu"
5
6define i32 @test(i32 %a) nounwind {
7entry:
8; CHECK: test
9; CHECK: call bar
10; CHECK-NOT: nop
11; CHECK: ret
12; CHECK-NEXT: restore
13  %0 = tail call i32 @bar(i32 %a) nounwind
14  ret i32 %0
15}
16
17define i32 @test_jmpl(i32 (i32, i32)* nocapture %f, i32 %a, i32 %b) nounwind {
18entry:
19; CHECK:      test_jmpl
20; CHECK:      call
21; CHECK-NOT:  nop
22; CHECK:      ret
23; CHECK-NEXT: restore
24  %0 = tail call i32 %f(i32 %a, i32 %b) nounwind
25  ret i32 %0
26}
27
28define i32 @test_loop(i32 %a, i32 %b) nounwind readnone {
29; CHECK: test_loop
30entry:
31  %0 = icmp sgt i32 %b, 0
32  br i1 %0, label %bb, label %bb5
33
34bb:                                               ; preds = %entry, %bb
35  %a_addr.18 = phi i32 [ %a_addr.0, %bb ], [ %a, %entry ]
36  %1 = phi i32 [ %3, %bb ], [ 0, %entry ]
37  %tmp9 = mul i32 %1, %b
38  %2 = and i32 %1, 1
39  %tmp = xor i32 %2, 1
40  %.pn = shl i32 %tmp9, %tmp
41  %a_addr.0 = add i32 %.pn, %a_addr.18
42  %3 = add nsw i32 %1, 1
43  %exitcond = icmp eq i32 %3, %b
44;CHECK:      cmp
45;CHECK:      bne
46;CHECK-NOT:  nop
47  br i1 %exitcond, label %bb5, label %bb
48
49bb5:                                              ; preds = %bb, %entry
50  %a_addr.1.lcssa = phi i32 [ %a, %entry ], [ %a_addr.0, %bb ]
51;CHECK:      retl
52;CHECK-NOT: restore
53  ret i32 %a_addr.1.lcssa
54}
55
56define i32 @test_inlineasm(i32 %a) nounwind {
57entry:
58;CHECK-LABEL:      test_inlineasm:
59;CHECK:      sethi
60;CHECK:      !NO_APP
61;CHECK-NEXT: cmp
62;CHECK-NEXT: ble
63;CHECK-NEXT: mov
64  tail call void asm sideeffect "sethi 0, %g0", ""() nounwind
65  %0 = icmp slt i32 %a, 0
66  br i1 %0, label %bb, label %bb1
67
68bb:                                               ; preds = %entry
69  %1 = tail call i32 (...) @foo(i32 %a) nounwind
70  ret i32 %1
71
72bb1:                                              ; preds = %entry
73  %2 = tail call i32 @bar(i32 %a) nounwind
74  ret i32 %2
75}
76
77declare i32 @foo(...)
78
79declare i32 @bar(i32)
80
81
82define i32 @test_implicit_def() nounwind {
83entry:
84;UNOPT-LABEL:       test_implicit_def:
85;UNOPT:       call func
86;UNOPT-NEXT:  nop
87  %0 = tail call i32 @func(i32* undef) nounwind
88  ret i32 0
89}
90
91define i32 @prevent_o7_in_call_delay_slot(i32 %i0) {
92entry:
93;CHECK-LABEL:       prevent_o7_in_call_delay_slot:
94;CHECK:       add %i0, 2, %o5
95;CHECK:       add %i0, 3, %o7
96;CHECK:       add %o5, %o7, %o0
97;CHECK:       call bar
98;CHECK-NEXT:  nop
99  %0 = add nsw i32 %i0, 2
100  %1 = add nsw i32 %i0, 3
101  tail call void asm sideeffect "", "r,r,~{l0},~{l1},~{l2},~{l3},~{l4},~{l5},~{l6},~{l7},~{i0},~{i1},~{i2},~{i3},~{i4},~{i5},~{i6},~{i7},~{o0},~{o1},~{o2},~{o3},~{o4},~{o6},~{g1},~{g2},~{g3},~{g4},~{g5},~{g6},~{g7}"(i32 %0, i32 %1)
102  %2 = add nsw i32 %0, %1
103  %3 = tail call i32 @bar(i32 %2)
104  ret i32 %3
105}
106
107
108declare i32 @func(i32*)
109
110
111define i32 @restore_add(i32 %a, i32 %b) {
112entry:
113;CHECK-LABEL:  restore_add:
114;CHECK:  ret
115;CHECK:  restore %o0, %i1, %o0
116  %0 = tail call i32 @bar(i32 %a) nounwind
117  %1 = add nsw i32 %0, %b
118  ret i32 %1
119}
120
121define i32 @restore_add_imm(i32 %a) {
122entry:
123;CHECK-LABEL:  restore_add_imm:
124;CHECK:  ret
125;CHECK:  restore %o0, 20, %o0
126  %0 = tail call i32 @bar(i32 %a) nounwind
127  %1 = add nsw i32 %0, 20
128  ret i32 %1
129}
130
131define i32 @restore_or(i32 %a) {
132entry:
133;CHECK-LABEL:  restore_or:
134;CHECK:  ret
135;CHECK:  restore %g0, %o0, %o0
136  %0 = tail call i32 @bar(i32 %a) nounwind
137  ret i32 %0
138}
139
140define i32 @restore_or_imm(i32 %a) {
141entry:
142;CHECK-LABEL:  restore_or_imm:
143;CHECK:  or %o0, 20, %i0
144;CHECK:  ret
145;CHECK-NOT:  restore %g0, %g0, %g0
146;CHECK:  restore
147  %0 = tail call i32 @bar(i32 %a) nounwind
148  %1 = or i32 %0, 20
149  ret i32 %1
150}
151
152
153define i32 @restore_sethi(i32 %a) {
154entry:
155;CHECK-LABEL: restore_sethi:
156;CHECK-NOT: sethi  3
157;CHECK: restore %g0, 3072, %o0
158  %0 = tail call i32 @bar(i32 %a) nounwind
159  %1 = icmp ne i32 %0, 0
160  %2 = select i1 %1, i32 3072, i32 0
161  ret i32 %2
162}
163
164define i32 @restore_sethi_3bit(i32 %a) {
165entry:
166;CHECK-LABEL: restore_sethi_3bit:
167;CHECK: sethi  6
168;CHECK-NOT: restore %g0, 6144, %o0
169  %0 = tail call i32 @bar(i32 %a) nounwind
170  %1 = icmp ne i32 %0, 0
171  %2 = select i1 %1, i32 6144, i32 0
172  ret i32 %2
173}
174
175define i32 @restore_sethi_large(i32 %a) {
176entry:
177;CHECK-LABEL: restore_sethi_large:
178;CHECK: sethi  4000, %i0
179;CHECK-NOT: restore %g0, %g0, %g0
180;CHECK:     restore
181  %0 = tail call i32 @bar(i32 %a) nounwind
182  %1 = icmp ne i32 %0, 0
183  %2 = select i1 %1, i32 4096000, i32 0
184  ret i32 %2
185}
186
187