• Home
  • Line#
  • Scopes#
  • Navigate#
  • Raw
  • Download
1; Test 128-bit addition in which the second operand is variable.
2;
3; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 | FileCheck %s
4; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z196 | FileCheck %s
5
6declare i128 *@foo()
7
8; Test register addition.
9define void @f1(i128 *%ptr) {
10; CHECK-LABEL: f1:
11; CHECK: algr
12; CHECK: alcgr
13; CHECK: br %r14
14  %value = load i128 , i128 *%ptr
15  %add = add i128 %value, %value
16  store i128 %add, i128 *%ptr
17  ret void
18}
19
20; Test memory addition with no offset.  Making the load of %a volatile
21; should force the memory operand to be %b.
22define void @f2(i128 *%aptr, i64 %addr) {
23; CHECK-LABEL: f2:
24; CHECK: alg {{%r[0-5]}}, 8(%r3)
25; CHECK: alcg {{%r[0-5]}}, 0(%r3)
26; CHECK: br %r14
27  %bptr = inttoptr i64 %addr to i128 *
28  %a = load volatile i128 , i128 *%aptr
29  %b = load i128 , i128 *%bptr
30  %add = add i128 %a, %b
31  store i128 %add, i128 *%aptr
32  ret void
33}
34
35; Test the highest aligned offset that is in range of both ALG and ALCG.
36define void @f3(i128 *%aptr, i64 %base) {
37; CHECK-LABEL: f3:
38; CHECK: alg {{%r[0-5]}}, 524280(%r3)
39; CHECK: alcg {{%r[0-5]}}, 524272(%r3)
40; CHECK: br %r14
41  %addr = add i64 %base, 524272
42  %bptr = inttoptr i64 %addr to i128 *
43  %a = load volatile i128 , i128 *%aptr
44  %b = load i128 , i128 *%bptr
45  %add = add i128 %a, %b
46  store i128 %add, i128 *%aptr
47  ret void
48}
49
50; Test the next doubleword up, which requires separate address logic for ALG.
51define void @f4(i128 *%aptr, i64 %base) {
52; CHECK-LABEL: f4:
53; CHECK: lgr [[BASE:%r[1-5]]], %r3
54; CHECK: agfi [[BASE]], 524288
55; CHECK: alg {{%r[0-5]}}, 0([[BASE]])
56; CHECK: alcg {{%r[0-5]}}, 524280(%r3)
57; CHECK: br %r14
58  %addr = add i64 %base, 524280
59  %bptr = inttoptr i64 %addr to i128 *
60  %a = load volatile i128 , i128 *%aptr
61  %b = load i128 , i128 *%bptr
62  %add = add i128 %a, %b
63  store i128 %add, i128 *%aptr
64  ret void
65}
66
67; Test the next doubleword after that, which requires separate logic for
68; both instructions.  It would be better to create an anchor at 524288
69; that both instructions can use, but that isn't implemented yet.
70define void @f5(i128 *%aptr, i64 %base) {
71; CHECK-LABEL: f5:
72; CHECK: alg {{%r[0-5]}}, 0({{%r[1-5]}})
73; CHECK: alcg {{%r[0-5]}}, 0({{%r[1-5]}})
74; CHECK: br %r14
75  %addr = add i64 %base, 524288
76  %bptr = inttoptr i64 %addr to i128 *
77  %a = load volatile i128 , i128 *%aptr
78  %b = load i128 , i128 *%bptr
79  %add = add i128 %a, %b
80  store i128 %add, i128 *%aptr
81  ret void
82}
83
84; Test the lowest displacement that is in range of both ALG and ALCG.
85define void @f6(i128 *%aptr, i64 %base) {
86; CHECK-LABEL: f6:
87; CHECK: alg {{%r[0-5]}}, -524280(%r3)
88; CHECK: alcg {{%r[0-5]}}, -524288(%r3)
89; CHECK: br %r14
90  %addr = add i64 %base, -524288
91  %bptr = inttoptr i64 %addr to i128 *
92  %a = load volatile i128 , i128 *%aptr
93  %b = load i128 , i128 *%bptr
94  %add = add i128 %a, %b
95  store i128 %add, i128 *%aptr
96  ret void
97}
98
99; Test the next doubleword down, which is out of range of the ALCG.
100define void @f7(i128 *%aptr, i64 %base) {
101; CHECK-LABEL: f7:
102; CHECK: alg {{%r[0-5]}}, -524288(%r3)
103; CHECK: alcg {{%r[0-5]}}, 0({{%r[1-5]}})
104; CHECK: br %r14
105  %addr = add i64 %base, -524296
106  %bptr = inttoptr i64 %addr to i128 *
107  %a = load volatile i128 , i128 *%aptr
108  %b = load i128 , i128 *%bptr
109  %add = add i128 %a, %b
110  store i128 %add, i128 *%aptr
111  ret void
112}
113
114; Check that additions of spilled values can use ALG and ALCG rather than
115; ALGR and ALCGR.
116define void @f8(i128 *%ptr0) {
117; CHECK-LABEL: f8:
118; CHECK: brasl %r14, foo@PLT
119; CHECK: alg {{%r[0-9]+}}, {{[0-9]+}}(%r15)
120; CHECK: alcg {{%r[0-9]+}}, {{[0-9]+}}(%r15)
121; CHECK: br %r14
122  %ptr1 = getelementptr i128, i128 *%ptr0, i128 2
123  %ptr2 = getelementptr i128, i128 *%ptr0, i128 4
124  %ptr3 = getelementptr i128, i128 *%ptr0, i128 6
125  %ptr4 = getelementptr i128, i128 *%ptr0, i128 8
126
127  %val0 = load i128 , i128 *%ptr0
128  %val1 = load i128 , i128 *%ptr1
129  %val2 = load i128 , i128 *%ptr2
130  %val3 = load i128 , i128 *%ptr3
131  %val4 = load i128 , i128 *%ptr4
132
133  %retptr = call i128 *@foo()
134
135  %ret = load i128 , i128 *%retptr
136  %add0 = add i128 %ret, %val0
137  %add1 = add i128 %add0, %val1
138  %add2 = add i128 %add1, %val2
139  %add3 = add i128 %add2, %val3
140  %add4 = add i128 %add3, %val4
141  store i128 %add4, i128 *%retptr
142
143  ret void
144}
145