1; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - | FileCheck %s 2 3define i32 @f1(i32 %a) { 4; CHECK-LABEL: f1: 5; CHECK: mvns r0, r0 6 %tmp = xor i32 4294967295, %a 7 ret i32 %tmp 8} 9 10define i32 @f2(i32 %a) { 11; CHECK-LABEL: f2: 12; CHECK: mvns r0, r0 13 %tmp = xor i32 %a, 4294967295 14 ret i32 %tmp 15} 16 17define i32 @f5(i32 %a) { 18; CHECK-LABEL: f5: 19; CHECK: mvn.w r0, r0, lsl #5 20 %tmp = shl i32 %a, 5 21 %tmp1 = xor i32 %tmp, 4294967295 22 ret i32 %tmp1 23} 24 25define i32 @f6(i32 %a) { 26; CHECK-LABEL: f6: 27; CHECK: mvn.w r0, r0, lsr #6 28 %tmp = lshr i32 %a, 6 29 %tmp1 = xor i32 %tmp, 4294967295 30 ret i32 %tmp1 31} 32 33define i32 @f7(i32 %a) { 34; CHECK-LABEL: f7: 35; CHECK: mvn.w r0, r0, asr #7 36 %tmp = ashr i32 %a, 7 37 %tmp1 = xor i32 %tmp, 4294967295 38 ret i32 %tmp1 39} 40 41define i32 @f8(i32 %a) { 42; CHECK-LABEL: f8: 43; CHECK: mvn.w r0, r0, ror #8 44 %l8 = shl i32 %a, 24 45 %r8 = lshr i32 %a, 8 46 %tmp = or i32 %l8, %r8 47 %tmp1 = xor i32 %tmp, 4294967295 48 ret i32 %tmp1 49} 50