• Home
  • Line#
  • Scopes#
  • Navigate#
  • Raw
  • Download
1; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7-avx -mattr=+avx -x86-experimental-vector-widening-legalization | FileCheck %s
2
3; Check that we perform a scalar XOR on i32.
4
5; CHECK: pull_bitcast
6; CHECK: xorl
7; CHECK: ret
8define void @pull_bitcast (<4 x i8>* %pA, <4 x i8>* %pB) {
9  %A = load <4 x i8>, <4 x i8>* %pA
10  %B = load <4 x i8>, <4 x i8>* %pB
11  %C = xor <4 x i8> %A, %B
12  store <4 x i8> %C, <4 x i8>* %pA
13  ret void
14}
15
16; CHECK: multi_use_swizzle
17; CHECK: pshufd
18; CHECK-NEXT: pshufd
19; CHECK-NEXT: pblendw
20; CHECK-NEXT: pshufd
21; CHECK-NEXT: pshufd
22; CHECK-NEXT: pxor
23; CHECK-NEXT: ret
24define <4 x i32> @multi_use_swizzle (<4 x i32>* %pA, <4 x i32>* %pB) {
25  %A = load <4 x i32>, <4 x i32>* %pA
26  %B = load <4 x i32>, <4 x i32>* %pB
27  %S = shufflevector <4 x i32> %A, <4 x i32> %B, <4 x i32> <i32 1, i32 1, i32 5, i32 6>
28  %S1 = shufflevector <4 x i32> %S, <4 x i32> undef, <4 x i32> <i32 1, i32 3, i32 2, i32 2>
29  %S2 = shufflevector <4 x i32> %S, <4 x i32> undef, <4 x i32> <i32 2, i32 1, i32 0, i32 2>
30  %R = xor <4 x i32> %S1, %S2
31  ret <4 x i32> %R
32}
33
34; CHECK: pull_bitcast2
35; CHECK: xorl
36; CHECK: ret
37define <4 x i8> @pull_bitcast2 (<4 x i8>* %pA, <4 x i8>* %pB, <4 x i8>* %pC) {
38  %A = load <4 x i8>, <4 x i8>* %pA
39  store <4 x i8> %A, <4 x i8>* %pC
40  %B = load <4 x i8>, <4 x i8>* %pB
41  %C = xor <4 x i8> %A, %B
42  store <4 x i8> %C, <4 x i8>* %pA
43  ret <4 x i8> %C
44}
45
46
47
48; CHECK: reverse_1
49; CHECK-NOT: pshufd
50; CHECK: ret
51define <4 x i32> @reverse_1 (<4 x i32>* %pA, <4 x i32>* %pB) {
52  %A = load <4 x i32>, <4 x i32>* %pA
53  %B = load <4 x i32>, <4 x i32>* %pB
54  %S = shufflevector <4 x i32> %A, <4 x i32> %B, <4 x i32> <i32 1, i32 0, i32 3, i32 2>
55  %S1 = shufflevector <4 x i32> %S, <4 x i32> undef, <4 x i32> <i32 1, i32 0, i32 3, i32 2>
56  ret <4 x i32> %S1
57}
58
59
60; CHECK: no_reverse_shuff
61; CHECK: pshufd
62; CHECK: ret
63define <4 x i32> @no_reverse_shuff (<4 x i32>* %pA, <4 x i32>* %pB) {
64  %A = load <4 x i32>, <4 x i32>* %pA
65  %B = load <4 x i32>, <4 x i32>* %pB
66  %S = shufflevector <4 x i32> %A, <4 x i32> %B, <4 x i32> <i32 1, i32 0, i32 3, i32 2>
67  %S1 = shufflevector <4 x i32> %S, <4 x i32> undef, <4 x i32> <i32 3, i32 2, i32 3, i32 2>
68  ret <4 x i32> %S1
69}
70