1; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=core-avx2 -mattr=+avx2 | FileCheck %s 2 3; CHECK: vpandn 4; CHECK: vpandn %ymm 5; CHECK: ret 6define <4 x i64> @vpandn(<4 x i64> %a, <4 x i64> %b) nounwind uwtable readnone ssp { 7entry: 8 ; Force the execution domain with an add. 9 %a2 = add <4 x i64> %a, <i64 1, i64 1, i64 1, i64 1> 10 %y = xor <4 x i64> %a2, <i64 -1, i64 -1, i64 -1, i64 -1> 11 %x = and <4 x i64> %a, %y 12 ret <4 x i64> %x 13} 14 15; CHECK: vpand 16; CHECK: vpand %ymm 17; CHECK: ret 18define <4 x i64> @vpand(<4 x i64> %a, <4 x i64> %b) nounwind uwtable readnone ssp { 19entry: 20 ; Force the execution domain with an add. 21 %a2 = add <4 x i64> %a, <i64 1, i64 1, i64 1, i64 1> 22 %x = and <4 x i64> %a2, %b 23 ret <4 x i64> %x 24} 25 26; CHECK: vpor 27; CHECK: vpor %ymm 28; CHECK: ret 29define <4 x i64> @vpor(<4 x i64> %a, <4 x i64> %b) nounwind uwtable readnone ssp { 30entry: 31 ; Force the execution domain with an add. 32 %a2 = add <4 x i64> %a, <i64 1, i64 1, i64 1, i64 1> 33 %x = or <4 x i64> %a2, %b 34 ret <4 x i64> %x 35} 36 37; CHECK: vpxor 38; CHECK: vpxor %ymm 39; CHECK: ret 40define <4 x i64> @vpxor(<4 x i64> %a, <4 x i64> %b) nounwind uwtable readnone ssp { 41entry: 42 ; Force the execution domain with an add. 43 %a2 = add <4 x i64> %a, <i64 1, i64 1, i64 1, i64 1> 44 %x = xor <4 x i64> %a2, %b 45 ret <4 x i64> %x 46} 47 48; CHECK: vpblendvb 49; CHECK: vpblendvb %ymm 50; CHECK: ret 51define <32 x i8> @vpblendvb(<32 x i1> %cond, <32 x i8> %x, <32 x i8> %y) { 52 %min = select <32 x i1> %cond, <32 x i8> %x, <32 x i8> %y 53 ret <32 x i8> %min 54} 55 56define <8 x i32> @allOnes() nounwind { 57; CHECK: vpcmpeqd 58; CHECK-NOT: vinsert 59 ret <8 x i32> <i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1> 60} 61 62define <16 x i16> @allOnes2() nounwind { 63; CHECK: vpcmpeqd 64; CHECK-NOT: vinsert 65 ret <16 x i16> <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1> 66} 67