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1; RUN: llc < %s -mtriple=i686-apple-darwin -mcpu=knl | FileCheck -check-prefix=X32 %s
2; RUN: llc < %s -mtriple=i386-pc-win32 -mcpu=knl | FileCheck -check-prefix=X32 %s
3; RUN: llc < %s -mtriple=x86_64-win32 -mcpu=knl | FileCheck -check-prefix=WIN64 %s
4; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl | FileCheck -check-prefix=X64 %s
5
6declare <16 x float> @func_float16_ptr(<16 x float>, <16 x float> *)
7declare <16 x float> @func_float16(<16 x float>, <16 x float>)
8declare i32 @func_int(i32, i32)
9
10; WIN64-LABEL: testf16_inp
11; WIN64: vaddps  {{.*}}, {{%zmm[0-1]}}
12; WIN64: leaq    {{.*}}(%rsp), %rcx
13; WIN64: call
14; WIN64: ret
15
16; X32-LABEL: testf16_inp
17; X32: vaddps  {{.*}}, {{%zmm[0-1]}}
18; Push is not deemed profitable if we're realigning the stack.
19; X32: {{pushl|movl}}   %eax
20; X32: call
21; X32: ret
22
23; X64-LABEL: testf16_inp
24; X64: vaddps  {{.*}}, {{%zmm[0-1]}}
25; X64: leaq    {{.*}}(%rsp), %rdi
26; X64: call
27; X64: ret
28
29;test calling conventions - input parameters
30define <16 x float> @testf16_inp(<16 x float> %a, <16 x float> %b) nounwind {
31  %y = alloca <16 x float>, align 16
32  %x = fadd <16 x float> %a, %b
33  %1 = call intel_ocl_bicc <16 x float> @func_float16_ptr(<16 x float> %x, <16 x float>* %y)
34  %2 = load <16 x float>, <16 x float>* %y, align 16
35  %3 = fadd <16 x float> %2, %1
36  ret <16 x float> %3
37}
38
39;test calling conventions - preserved registers
40
41; preserved zmm16-
42; WIN64-LABEL: testf16_regs
43; WIN64: call
44; WIN64: vaddps  %zmm16, %zmm0, %zmm0
45; WIN64: ret
46
47; preserved zmm16-
48; X64-LABEL: testf16_regs
49; X64: call
50; X64: vaddps  %zmm16, %zmm0, %zmm0
51; X64: ret
52
53define <16 x float> @testf16_regs(<16 x float> %a, <16 x float> %b) nounwind {
54  %y = alloca <16 x float>, align 16
55  %x = fadd <16 x float> %a, %b
56  %1 = call intel_ocl_bicc <16 x float> @func_float16_ptr(<16 x float> %x, <16 x float>* %y)
57  %2 = load <16 x float>, <16 x float>* %y, align 16
58  %3 = fadd <16 x float> %1, %b
59  %4 = fadd <16 x float> %2, %3
60  ret <16 x float> %4
61}
62
63; test calling conventions - prolog and epilog
64; WIN64-LABEL: test_prolog_epilog
65; WIN64: vmovups %zmm21, {{.*(%rbp).*}}     # 64-byte Spill
66; WIN64: vmovups %zmm6, {{.*(%rbp).*}}     # 64-byte Spill
67; WIN64: call
68; WIN64: vmovups {{.*(%rbp).*}}, %zmm6      # 64-byte Reload
69; WIN64: vmovups {{.*(%rbp).*}}, %zmm21     # 64-byte Reload
70
71; X64-LABEL: test_prolog_epilog
72; X64:  kmovq   %k7, {{.*}}(%rsp)         ## 8-byte Folded Spill
73; X64:  kmovq   %k6, {{.*}}(%rsp)         ## 8-byte Folded Spill
74; X64:  kmovq   %k5, {{.*}}(%rsp)         ## 8-byte Folded Spill
75; X64:  kmovq   %k4, {{.*}}(%rsp)         ## 8-byte Folded Spill
76; X64: vmovups %zmm31, {{.*}}(%rsp)  ## 64-byte Spill
77; X64: vmovups %zmm16, {{.*}}(%rsp)  ## 64-byte Spill
78; X64: call
79; X64: vmovups {{.*}}(%rsp), %zmm16 ## 64-byte Reload
80; X64: vmovups {{.*}}(%rsp), %zmm31 ## 64-byte Reload
81define intel_ocl_bicc <16 x float> @test_prolog_epilog(<16 x float> %a, <16 x float> %b) nounwind {
82   %c = call <16 x float> @func_float16(<16 x float> %a, <16 x float> %b)
83   ret <16 x float> %c
84}
85
86
87declare <16 x float> @func_float16_mask(<16 x float>, <16 x i1>)
88
89; X64-LABEL: testf16_inp_mask
90; X64: kmovw   %edi, %k1
91; X64: call
92define <16 x float> @testf16_inp_mask(<16 x float> %a, i16 %mask)  {
93  %imask = bitcast i16 %mask to <16 x i1>
94  %1 = call intel_ocl_bicc <16 x float> @func_float16_mask(<16 x float> %a, <16 x i1> %imask)
95  ret <16 x float> %1
96}
97
98; X64-LABEL: test_prolog_epilog_with_mask
99; X64: kxorw   %k{{.*}}, %k{{.*}}, %k1
100; X64: call
101define intel_ocl_bicc <16 x float> @test_prolog_epilog_with_mask(<16 x float> %a, <16 x i32> %x1, <16 x i32>%x2, <16 x i1> %mask) nounwind {
102   %cmp_res = icmp eq <16 x i32>%x1, %x2
103   %mask1 = xor <16 x i1> %cmp_res, %mask
104   %c = call intel_ocl_bicc <16 x float> @func_float16_mask(<16 x float> %a, <16 x i1>%mask1)
105   ret <16 x float> %c
106}
107