1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl | FileCheck %s 3 4define <16 x i32> @select00(i32 %a, <16 x i32> %b) nounwind { 5; CHECK-LABEL: select00: 6; CHECK: ## BB#0: 7; CHECK-NEXT: vpxord %zmm1, %zmm1, %zmm1 8; CHECK-NEXT: cmpl $255, %edi 9; CHECK-NEXT: je LBB0_2 10; CHECK-NEXT: ## BB#1: 11; CHECK-NEXT: vmovaps %zmm0, %zmm1 12; CHECK-NEXT: LBB0_2: 13; CHECK-NEXT: vpxord %zmm1, %zmm0, %zmm0 14; CHECK-NEXT: retq 15 %cmpres = icmp eq i32 %a, 255 16 %selres = select i1 %cmpres, <16 x i32> zeroinitializer, <16 x i32> %b 17 %res = xor <16 x i32> %b, %selres 18 ret <16 x i32> %res 19} 20 21define <8 x i64> @select01(i32 %a, <8 x i64> %b) nounwind { 22; CHECK-LABEL: select01: 23; CHECK: ## BB#0: 24; CHECK-NEXT: vpxord %zmm1, %zmm1, %zmm1 25; CHECK-NEXT: cmpl $255, %edi 26; CHECK-NEXT: je LBB1_2 27; CHECK-NEXT: ## BB#1: 28; CHECK-NEXT: vmovaps %zmm0, %zmm1 29; CHECK-NEXT: LBB1_2: 30; CHECK-NEXT: vpxorq %zmm1, %zmm0, %zmm0 31; CHECK-NEXT: retq 32 %cmpres = icmp eq i32 %a, 255 33 %selres = select i1 %cmpres, <8 x i64> zeroinitializer, <8 x i64> %b 34 %res = xor <8 x i64> %b, %selres 35 ret <8 x i64> %res 36} 37 38define float @select02(float %a, float %b, float %c, float %eps) { 39; CHECK-LABEL: select02: 40; CHECK: ## BB#0: 41; CHECK-NEXT: vcmpless %xmm0, %xmm3, %k1 42; CHECK-NEXT: vmovss %xmm2, %xmm0, %xmm1 {%k1} 43; CHECK-NEXT: vmovaps %zmm1, %zmm0 44; CHECK-NEXT: retq 45 %cmp = fcmp oge float %a, %eps 46 %cond = select i1 %cmp, float %c, float %b 47 ret float %cond 48} 49 50define double @select03(double %a, double %b, double %c, double %eps) { 51; CHECK-LABEL: select03: 52; CHECK: ## BB#0: 53; CHECK-NEXT: vcmplesd %xmm0, %xmm3, %k1 54; CHECK-NEXT: vmovsd %xmm2, %xmm0, %xmm1 {%k1} 55; CHECK-NEXT: vmovaps %zmm1, %zmm0 56; CHECK-NEXT: retq 57 %cmp = fcmp oge double %a, %eps 58 %cond = select i1 %cmp, double %c, double %b 59 ret double %cond 60} 61 62define <16 x double> @select04(<16 x double> %a, <16 x double> %b) { 63; CHECK-LABEL: select04: 64; CHECK: ## BB#0: 65; CHECK-NEXT: vmovaps %zmm3, %zmm1 66; CHECK-NEXT: retq 67 %sel = select <16 x i1> <i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false>, <16 x double> %a, <16 x double> %b 68 ret <16 x double> %sel 69} 70 71define i8 @select05(i8 %a.0, i8 %m) { 72; CHECK-LABEL: select05: 73; CHECK: ## BB#0: 74; CHECK-NEXT: orl %esi, %edi 75; CHECK-NEXT: movl %edi, %eax 76; CHECK-NEXT: retq 77 %mask = bitcast i8 %m to <8 x i1> 78 %a = bitcast i8 %a.0 to <8 x i1> 79 %r = select <8 x i1> %mask, <8 x i1> <i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1>, <8 x i1> %a 80 %res = bitcast <8 x i1> %r to i8 81 ret i8 %res; 82} 83 84define i8 @select05_mem(<8 x i1>* %a.0, <8 x i1>* %m) { 85; CHECK-LABEL: select05_mem: 86; CHECK: ## BB#0: 87; CHECK-NEXT: movzbl (%rsi), %eax 88; CHECK-NEXT: kmovw %eax, %k0 89; CHECK-NEXT: movzbl (%rdi), %eax 90; CHECK-NEXT: kmovw %eax, %k1 91; CHECK-NEXT: korw %k1, %k0, %k0 92; CHECK-NEXT: kmovw %k0, %eax 93; CHECK-NEXT: ## kill: %AL<def> %AL<kill> %EAX<kill> 94; CHECK-NEXT: retq 95 %mask = load <8 x i1> , <8 x i1>* %m 96 %a = load <8 x i1> , <8 x i1>* %a.0 97 %r = select <8 x i1> %mask, <8 x i1> <i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1>, <8 x i1> %a 98 %res = bitcast <8 x i1> %r to i8 99 ret i8 %res; 100} 101 102define i8 @select06(i8 %a.0, i8 %m) { 103; CHECK-LABEL: select06: 104; CHECK: ## BB#0: 105; CHECK-NEXT: andl %esi, %edi 106; CHECK-NEXT: movl %edi, %eax 107; CHECK-NEXT: retq 108 %mask = bitcast i8 %m to <8 x i1> 109 %a = bitcast i8 %a.0 to <8 x i1> 110 %r = select <8 x i1> %mask, <8 x i1> %a, <8 x i1> zeroinitializer 111 %res = bitcast <8 x i1> %r to i8 112 ret i8 %res; 113} 114 115define i8 @select06_mem(<8 x i1>* %a.0, <8 x i1>* %m) { 116; CHECK-LABEL: select06_mem: 117; CHECK: ## BB#0: 118; CHECK-NEXT: movzbl (%rsi), %eax 119; CHECK-NEXT: kmovw %eax, %k0 120; CHECK-NEXT: movzbl (%rdi), %eax 121; CHECK-NEXT: kmovw %eax, %k1 122; CHECK-NEXT: kandw %k1, %k0, %k0 123; CHECK-NEXT: kmovw %k0, %eax 124; CHECK-NEXT: ## kill: %AL<def> %AL<kill> %EAX<kill> 125; CHECK-NEXT: retq 126 %mask = load <8 x i1> , <8 x i1>* %m 127 %a = load <8 x i1> , <8 x i1>* %a.0 128 %r = select <8 x i1> %mask, <8 x i1> %a, <8 x i1> zeroinitializer 129 %res = bitcast <8 x i1> %r to i8 130 ret i8 %res; 131} 132define i8 @select07(i8 %a.0, i8 %b.0, i8 %m) { 133; CHECK-LABEL: select07: 134; CHECK: ## BB#0: 135; CHECK-NEXT: kmovw %edx, %k0 136; CHECK-NEXT: kmovw %edi, %k1 137; CHECK-NEXT: kmovw %esi, %k2 138; CHECK-NEXT: kandw %k0, %k1, %k1 139; CHECK-NEXT: knotw %k0, %k0 140; CHECK-NEXT: kandw %k0, %k2, %k0 141; CHECK-NEXT: korw %k0, %k1, %k0 142; CHECK-NEXT: kmovw %k0, %eax 143; CHECK-NEXT: ## kill: %AL<def> %AL<kill> %EAX<kill> 144; CHECK-NEXT: retq 145 %mask = bitcast i8 %m to <8 x i1> 146 %a = bitcast i8 %a.0 to <8 x i1> 147 %b = bitcast i8 %b.0 to <8 x i1> 148 %r = select <8 x i1> %mask, <8 x i1> %a, <8 x i1> %b 149 %res = bitcast <8 x i1> %r to i8 150 ret i8 %res; 151} 152