1; RUN: llc < %s -march=x86-64 -mcpu=corei7-avx | FileCheck %s 2 3 4define <4 x double> @test_x86_avx_blend_pd_256(<4 x double> %a0) { 5 %1 = call <4 x double> @llvm.x86.avx.blend.pd.256(<4 x double> %a0, <4 x double> %a0, i32 7) 6 ret <4 x double> %1 7} 8; CHECK-LABEL: test_x86_avx_blend_pd_256 9; CHECK-NOT: vblendpd 10; CHECK: ret 11 12 13define <8 x float> @test_x86_avx_blend_ps_256(<8 x float> %a0) { 14 %1 = call <8 x float> @llvm.x86.avx.blend.ps.256(<8 x float> %a0, <8 x float> %a0, i32 7) 15 ret <8 x float> %1 16} 17; CHECK-LABEL: test_x86_avx_blend_ps_256 18; CHECK-NOT: vblendps 19; CHECK: ret 20 21 22define <4 x double> @test2_x86_avx_blend_pd_256(<4 x double> %a0, <4 x double> %a1) { 23 %1 = call <4 x double> @llvm.x86.avx.blend.pd.256(<4 x double> %a0, <4 x double> %a1, i32 0) 24 ret <4 x double> %1 25} 26; CHECK-LABEL: test2_x86_avx_blend_pd_256 27; CHECK-NOT: vblendpd 28; CHECK: ret 29 30 31define <8 x float> @test2_x86_avx_blend_ps_256(<8 x float> %a0, <8 x float> %a1) { 32 %1 = call <8 x float> @llvm.x86.avx.blend.ps.256(<8 x float> %a0, <8 x float> %a1, i32 0) 33 ret <8 x float> %1 34} 35; CHECK-LABEL: test2_x86_avx_blend_ps_256 36; CHECK-NOT: vblendps 37; CHECK: ret 38 39 40define <4 x double> @test3_x86_avx_blend_pd_256(<4 x double> %a0, <4 x double> %a1) { 41 %1 = call <4 x double> @llvm.x86.avx.blend.pd.256(<4 x double> %a0, <4 x double> %a1, i32 -1) 42 ret <4 x double> %1 43} 44; CHECK-LABEL: test3_x86_avx_blend_pd_256 45; CHECK-NOT: vblendpd 46; CHECK: ret 47 48 49define <8 x float> @test3_x86_avx_blend_ps_256(<8 x float> %a0, <8 x float> %a1) { 50 %1 = call <8 x float> @llvm.x86.avx.blend.ps.256(<8 x float> %a0, <8 x float> %a1, i32 -1) 51 ret <8 x float> %1 52} 53; CHECK-LABEL: test3_x86_avx_blend_ps_256 54; CHECK-NOT: vblendps 55; CHECK: ret 56 57 58declare <4 x double> @llvm.x86.avx.blend.pd.256(<4 x double>, <4 x double>, i32) 59declare <8 x float> @llvm.x86.avx.blend.ps.256(<8 x float>, <8 x float>, i32) 60 61