• Home
  • Line#
  • Scopes#
  • Navigate#
  • Raw
  • Download
1; RUN: llc -march=x86-64 < %s > /dev/null
2
3; ScalarEvolution misses an opportunity to fold ((trunc x) + (trunc -x) + y),
4; but LSR should tolerate this.
5; rdar://7886751
6
7target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
8target triple = "x86_64-apple-darwin11.0"
9
10define fastcc void @formatValue(i64 %arg5) nounwind {
11bb12:                                             ; preds = %bb11
12  %t = trunc i64 %arg5 to i32                   ; <i32> [#uses=1]
13  %t13 = sub i64 0, %arg5                       ; <i64> [#uses=1]
14  %t14 = and i64 %t13, 4294967295             ; <i64> [#uses=1]
15  br label %bb15
16
17bb15:                                             ; preds = %bb21, %bb12
18  %t16 = phi i64 [ 0, %bb12 ], [ %t23, %bb15 ] ; <i64> [#uses=2]
19  %t17 = mul i64 %t14, %t16                 ; <i64> [#uses=1]
20  %t18 = add i64 undef, %t17                  ; <i64> [#uses=1]
21  %t19 = trunc i64 %t18 to i32                ; <i32> [#uses=1]
22  %t22 = icmp eq i32 %t19, %t               ; <i1> [#uses=1]
23  %t23 = add i64 %t16, 1                      ; <i64> [#uses=1]
24  br i1 %t22, label %bb24, label %bb15
25
26bb24:                                             ; preds = %bb21, %bb11
27  unreachable
28}
29
30; ScalarEvolution should be able to correctly expand the crazy addrec here.
31; PR6914
32
33define void @int323() nounwind {
34entry:
35  br label %for.cond
36
37for.cond:                                         ; preds = %lbl_264, %for.inc, %entry
38  %g_263.tmp.1 = phi i8 [ undef, %entry ], [ %g_263.tmp.1, %for.cond ]
39  %p_95.addr.0 = phi i8 [ 0, %entry ], [ %add, %for.cond ]
40  %add = add i8 %p_95.addr.0, 1                   ; <i8> [#uses=1]
41  br i1 undef, label %for.cond, label %lbl_264
42
43lbl_264:                                          ; preds = %if.end, %lbl_264.preheader
44  %g_263.tmp.0 = phi i8 [ %g_263.tmp.1, %for.cond ] ; <i8> [#uses=1]
45  %tmp7 = load i16, i16* undef                         ; <i16> [#uses=1]
46  %conv8 = trunc i16 %tmp7 to i8                  ; <i8> [#uses=1]
47  %mul.i = mul i8 %p_95.addr.0, %p_95.addr.0      ; <i8> [#uses=1]
48  %mul.i18 = mul i8 %mul.i, %conv8                ; <i8> [#uses=1]
49  %tobool12 = icmp eq i8 %mul.i18, 0              ; <i1> [#uses=1]
50  unreachable
51}
52
53; LSR ends up going into conservative pruning mode; don't prune the solution
54; so far that it becomes unsolvable though.
55; PR7077
56
57%struct.Bu = type { i32, i32, i32 }
58
59define void @_Z3fooP2Bui(%struct.Bu* nocapture %bu) {
60entry:
61  br label %for.body
62
63for.body:                                         ; preds = %for.inc131, %entry
64  %indvar = phi i64 [ %indvar.next, %for.inc131 ], [ 0, %entry ] ; <i64> [#uses=3]
65  br i1 undef, label %for.inc131, label %lor.lhs.false
66
67lor.lhs.false:                                    ; preds = %for.body
68  %tmp15 = add i64 %indvar, 1                     ; <i64> [#uses=1]
69  %tmp17 = add i64 %indvar, 2                      ; <i64> [#uses=1]
70  %tmp19 = add i64 %indvar, 3                      ; <i64> [#uses=1]
71  %tmp21 = add i64 %indvar, 4                      ; <i64> [#uses=1]
72  %tmp23 = add i64 %indvar, 5                      ; <i64> [#uses=1]
73  %tmp25 = add i64 %indvar, 6                      ; <i64> [#uses=1]
74  %tmp27 = add i64 %indvar, 7                      ; <i64> [#uses=1]
75  %tmp29 = add i64 %indvar, 8                      ; <i64> [#uses=1]
76  %tmp31 = add i64 %indvar, 9                      ; <i64> [#uses=1]
77  %tmp35 = add i64 %indvar, 11                     ; <i64> [#uses=1]
78  %tmp37 = add i64 %indvar, 12                     ; <i64> [#uses=1]
79  %tmp39 = add i64 %indvar, 13                     ; <i64> [#uses=1]
80  %tmp41 = add i64 %indvar, 14                     ; <i64> [#uses=1]
81  %tmp43 = add i64 %indvar, 15                     ; <i64> [#uses=1]
82  %tmp45 = add i64 %indvar, 16                     ; <i64> [#uses=1]
83  %tmp47 = add i64 %indvar, 17                     ; <i64> [#uses=1]
84  %mul = trunc i64 %indvar to i32                  ; <i32> [#uses=1]
85  %add22 = trunc i64 %tmp15 to i32                ; <i32> [#uses=1]
86  %add28 = trunc i64 %tmp17 to i32                ; <i32> [#uses=1]
87  %add34 = trunc i64 %tmp19 to i32                ; <i32> [#uses=1]
88  %add40 = trunc i64 %tmp21 to i32                ; <i32> [#uses=1]
89  %add46 = trunc i64 %tmp23 to i32                ; <i32> [#uses=1]
90  %add52 = trunc i64 %tmp25 to i32                ; <i32> [#uses=1]
91  %add58 = trunc i64 %tmp27 to i32                ; <i32> [#uses=1]
92  %add64 = trunc i64 %tmp29 to i32                ; <i32> [#uses=1]
93  %add70 = trunc i64 %tmp31 to i32                ; <i32> [#uses=1]
94  %add82 = trunc i64 %tmp35 to i32                ; <i32> [#uses=1]
95  %add88 = trunc i64 %tmp37 to i32                ; <i32> [#uses=1]
96  %add94 = trunc i64 %tmp39 to i32                ; <i32> [#uses=1]
97  %add100 = trunc i64 %tmp41 to i32               ; <i32> [#uses=1]
98  %add106 = trunc i64 %tmp43 to i32               ; <i32> [#uses=1]
99  %add112 = trunc i64 %tmp45 to i32               ; <i32> [#uses=1]
100  %add118 = trunc i64 %tmp47 to i32               ; <i32> [#uses=1]
101  %tmp10 = getelementptr %struct.Bu, %struct.Bu* %bu, i64 %indvar, i32 2 ; <i32*> [#uses=1]
102  %tmp11 = load i32, i32* %tmp10                       ; <i32> [#uses=0]
103  tail call void undef(i32 %add22)
104  tail call void undef(i32 %add28)
105  tail call void undef(i32 %add34)
106  tail call void undef(i32 %add40)
107  tail call void undef(i32 %add46)
108  tail call void undef(i32 %add52)
109  tail call void undef(i32 %add58)
110  tail call void undef(i32 %add64)
111  tail call void undef(i32 %add70)
112  tail call void undef(i32 %add82)
113  tail call void undef(i32 %add88)
114  tail call void undef(i32 %add94)
115  tail call void undef(i32 %add100)
116  tail call void undef(i32 %add106)
117  tail call void undef(i32 %add112)
118  tail call void undef(i32 %add118)
119  br label %for.body123
120
121for.body123:                                      ; preds = %for.body123, %lor.lhs.false
122  %j.03 = phi i32 [ 0, %lor.lhs.false ], [ %inc, %for.body123 ] ; <i32> [#uses=2]
123  %add129 = add i32 %mul, %j.03                   ; <i32> [#uses=1]
124  tail call void undef(i32 %add129)
125  %inc = add nsw i32 %j.03, 1                     ; <i32> [#uses=1]
126  br i1 undef, label %for.inc131, label %for.body123
127
128for.inc131:                                       ; preds = %for.body123, %for.body
129  %indvar.next = add i64 %indvar, 1               ; <i64> [#uses=1]
130  br i1 undef, label %for.end134, label %for.body
131
132for.end134:                                       ; preds = %for.inc131
133  ret void
134}
135
136; LSR needs to remember inserted instructions even in postinc mode, because
137; there could be multiple subexpressions within a single expansion which
138; require insert point adjustment.
139; PR7306
140
141define fastcc i32 @GetOptimum() nounwind {
142bb:
143  br label %bb1
144
145bb1:                                              ; preds = %bb1, %bb
146  %t = phi i32 [ 0, %bb ], [ %t2, %bb1 ]      ; <i32> [#uses=1]
147  %t2 = add i32 %t, undef                     ; <i32> [#uses=3]
148  br i1 undef, label %bb1, label %bb3
149
150bb3:                                              ; preds = %bb1
151  %t4 = add i32 undef, -1                       ; <i32> [#uses=1]
152  br label %bb5
153
154bb5:                                              ; preds = %bb16, %bb3
155  %t6 = phi i32 [ %t17, %bb16 ], [ 0, %bb3 ]  ; <i32> [#uses=3]
156  %t7 = add i32 undef, %t6                    ; <i32> [#uses=2]
157  %t8 = add i32 %t4, %t6                    ; <i32> [#uses=1]
158  br i1 undef, label %bb9, label %bb10
159
160bb9:                                              ; preds = %bb5
161  br label %bb10
162
163bb10:                                             ; preds = %bb9, %bb5
164  br i1 undef, label %bb11, label %bb16
165
166bb11:                                             ; preds = %bb10
167  %t12 = icmp ugt i32 %t7, %t2              ; <i1> [#uses=1]
168  %t13 = select i1 %t12, i32 %t2, i32 %t7 ; <i32> [#uses=1]
169  br label %bb14
170
171bb14:                                             ; preds = %bb11
172  store i32 %t13, i32* null
173  ret i32 %t8
174
175bb16:                                             ; preds = %bb10
176  %t17 = add i32 %t6, 1                       ; <i32> [#uses=1]
177  br label %bb5
178}
179