1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+sse | FileCheck %s --check-prefix=X64 3 4; NOTE: This should use IR equivalent to what is generated by clang/test/CodeGen/sse-builtins.c 5 6define <4 x float> @test_mm_cvtsi64_ss(<4 x float> %a0, i64 %a1) nounwind { 7; X64-LABEL: test_mm_cvtsi64_ss: 8; X64: # BB#0: 9; X64-NEXT: cvtsi2ssq %rdi, %xmm1 10; X64-NEXT: movss {{.*#+}} xmm0 = xmm1[0],xmm0[1,2,3] 11; X64-NEXT: retq 12 %cvt = sitofp i64 %a1 to float 13 %res = insertelement <4 x float> %a0, float %cvt, i32 0 14 ret <4 x float> %res 15} 16 17define i64 @test_mm_cvtss_si64(<4 x float> %a0) nounwind { 18; X64-LABEL: test_mm_cvtss_si64: 19; X64: # BB#0: 20; X64-NEXT: cvtss2si %xmm0, %rax 21; X64-NEXT: retq 22 %res = call i64 @llvm.x86.sse.cvtss2si64(<4 x float> %a0) 23 ret i64 %res 24} 25declare i64 @llvm.x86.sse.cvtss2si64(<4 x float>) nounwind readnone 26 27define i64 @test_mm_cvttss_si64(<4 x float> %a0) nounwind { 28; X64-LABEL: test_mm_cvttss_si64: 29; X64: # BB#0: 30; X64-NEXT: cvttss2si %xmm0, %rax 31; X64-NEXT: retq 32 %cvt = extractelement <4 x float> %a0, i32 0 33 %res = fptosi float %cvt to i64 34 ret i64 %res 35} 36