1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 | FileCheck %s 3 4; Test that we correctly fold a shuffle that performs a swizzle of another 5; shuffle node according to the rule 6; shuffle (shuffle (x, undef, M0), undef, M1) -> shuffle(x, undef, M2) 7; 8; We only do this if the resulting mask is legal to avoid introducing an 9; illegal shuffle that is expanded into a sub-optimal sequence of instructions 10; during lowering stage. 11 12define <4 x i32> @swizzle_1(<4 x i32> %v) { 13; CHECK-LABEL: swizzle_1: 14; CHECK: # BB#0: 15; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,0,3,2] 16; CHECK-NEXT: retq 17 %1 = shufflevector <4 x i32> %v, <4 x i32> undef, <4 x i32> <i32 3, i32 2, i32 0, i32 1> 18 %2 = shufflevector <4 x i32> %1, <4 x i32> undef, <4 x i32> <i32 3, i32 2, i32 0, i32 1> 19 ret <4 x i32> %2 20} 21 22define <4 x i32> @swizzle_2(<4 x i32> %v) { 23; CHECK-LABEL: swizzle_2: 24; CHECK: # BB#0: 25; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,1,3,0] 26; CHECK-NEXT: retq 27 %1 = shufflevector <4 x i32> %v, <4 x i32> undef, <4 x i32> <i32 3, i32 1, i32 0, i32 2> 28 %2 = shufflevector <4 x i32> %1, <4 x i32> undef, <4 x i32> <i32 3, i32 1, i32 0, i32 2> 29 ret <4 x i32> %2 30} 31 32define <4 x i32> @swizzle_3(<4 x i32> %v) { 33; CHECK-LABEL: swizzle_3: 34; CHECK: # BB#0: 35; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,0,3,2] 36; CHECK-NEXT: retq 37 %1 = shufflevector <4 x i32> %v, <4 x i32> undef, <4 x i32> <i32 2, i32 3, i32 1, i32 0> 38 %2 = shufflevector <4 x i32> %1, <4 x i32> undef, <4 x i32> <i32 2, i32 3, i32 1, i32 0> 39 ret <4 x i32> %2 40} 41 42define <4 x i32> @swizzle_4(<4 x i32> %v) { 43; CHECK-LABEL: swizzle_4: 44; CHECK: # BB#0: 45; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,1,0,2] 46; CHECK-NEXT: retq 47 %1 = shufflevector <4 x i32> %v, <4 x i32> undef, <4 x i32> <i32 2, i32 1, i32 3, i32 0> 48 %2 = shufflevector <4 x i32> %1, <4 x i32> undef, <4 x i32> <i32 2, i32 1, i32 3, i32 0> 49 ret <4 x i32> %2 50} 51 52define <4 x i32> @swizzle_5(<4 x i32> %v) { 53; CHECK-LABEL: swizzle_5: 54; CHECK: # BB#0: 55; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 56; CHECK-NEXT: retq 57 %1 = shufflevector <4 x i32> %v, <4 x i32> undef, <4 x i32> <i32 1, i32 2, i32 3, i32 0> 58 %2 = shufflevector <4 x i32> %1, <4 x i32> undef, <4 x i32> <i32 1, i32 2, i32 3, i32 0> 59 ret <4 x i32> %2 60} 61 62define <4 x i32> @swizzle_6(<4 x i32> %v) { 63; CHECK-LABEL: swizzle_6: 64; CHECK: # BB#0: 65; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,0,1,3] 66; CHECK-NEXT: retq 67 %1 = shufflevector <4 x i32> %v, <4 x i32> undef, <4 x i32> <i32 1, i32 2, i32 0, i32 3> 68 %2 = shufflevector <4 x i32> %1, <4 x i32> undef, <4 x i32> <i32 1, i32 2, i32 0, i32 3> 69 ret <4 x i32> %2 70} 71 72define <4 x i32> @swizzle_7(<4 x i32> %v) { 73; CHECK-LABEL: swizzle_7: 74; CHECK: # BB#0: 75; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,3,1] 76; CHECK-NEXT: retq 77 %1 = shufflevector <4 x i32> %v, <4 x i32> undef, <4 x i32> <i32 0, i32 3, i32 1, i32 2> 78 %2 = shufflevector <4 x i32> %1, <4 x i32> undef, <4 x i32> <i32 0, i32 3, i32 1, i32 2> 79 ret <4 x i32> %2 80} 81 82define <4 x i32> @swizzle_8(<4 x i32> %v) { 83; CHECK-LABEL: swizzle_8: 84; CHECK: # BB#0: 85; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,3,2,0] 86; CHECK-NEXT: retq 87 %1 = shufflevector <4 x i32> %v, <4 x i32> undef, <4 x i32> <i32 3, i32 0, i32 2, i32 1> 88 %2 = shufflevector <4 x i32> %1, <4 x i32> undef, <4 x i32> <i32 3, i32 0, i32 2, i32 1> 89 ret <4 x i32> %2 90} 91 92define <4 x i32> @swizzle_9(<4 x i32> %v) { 93; CHECK-LABEL: swizzle_9: 94; CHECK: # BB#0: 95; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 96; CHECK-NEXT: retq 97 %1 = shufflevector <4 x i32> %v, <4 x i32> undef, <4 x i32> <i32 3, i32 0, i32 1, i32 2> 98 %2 = shufflevector <4 x i32> %1, <4 x i32> undef, <4 x i32> <i32 3, i32 0, i32 1, i32 2> 99 ret <4 x i32> %2 100} 101 102define <4 x i32> @swizzle_10(<4 x i32> %v) { 103; CHECK-LABEL: swizzle_10: 104; CHECK: # BB#0: 105; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,2,0,3] 106; CHECK-NEXT: retq 107 %1 = shufflevector <4 x i32> %v, <4 x i32> undef, <4 x i32> <i32 2, i32 0, i32 1, i32 3> 108 %2 = shufflevector <4 x i32> %1, <4 x i32> undef, <4 x i32> <i32 2, i32 0, i32 1, i32 3> 109 ret <4 x i32> %2 110} 111 112define <4 x i32> @swizzle_11(<4 x i32> %v) { 113; CHECK-LABEL: swizzle_11: 114; CHECK: # BB#0: 115; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,2,1,0] 116; CHECK-NEXT: retq 117 %1 = shufflevector <4 x i32> %v, <4 x i32> undef, <4 x i32> <i32 2, i32 0, i32 3, i32 1> 118 %2 = shufflevector <4 x i32> %1, <4 x i32> undef, <4 x i32> <i32 2, i32 0, i32 3, i32 1> 119 ret <4 x i32> %2 120} 121 122define <4 x i32> @swizzle_12(<4 x i32> %v) { 123; CHECK-LABEL: swizzle_12: 124; CHECK: # BB#0: 125; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,3,1,2] 126; CHECK-NEXT: retq 127 %1 = shufflevector <4 x i32> %v, <4 x i32> undef, <4 x i32> <i32 0, i32 2, i32 3, i32 1> 128 %2 = shufflevector <4 x i32> %1, <4 x i32> undef, <4 x i32> <i32 0, i32 2, i32 3, i32 1> 129 ret <4 x i32> %2 130} 131 132define <4 x i32> @swizzle_13(<4 x i32> %v) { 133; CHECK-LABEL: swizzle_13: 134; CHECK: # BB#0: 135; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,2,1,0] 136; CHECK-NEXT: retq 137 %1 = shufflevector <4 x i32> %v, <4 x i32> undef, <4 x i32> <i32 1, i32 3, i32 0, i32 2> 138 %2 = shufflevector <4 x i32> %1, <4 x i32> undef, <4 x i32> <i32 1, i32 3, i32 0, i32 2> 139 ret <4 x i32> %2 140} 141 142define <4 x i32> @swizzle_14(<4 x i32> %v) { 143; CHECK-LABEL: swizzle_14: 144; CHECK: # BB#0: 145; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,0,2,1] 146; CHECK-NEXT: retq 147 %1 = shufflevector <4 x i32> %v, <4 x i32> undef, <4 x i32> <i32 1, i32 3, i32 2, i32 0> 148 %2 = shufflevector <4 x i32> %1, <4 x i32> undef, <4 x i32> <i32 1, i32 3, i32 2, i32 0> 149 ret <4 x i32> %2 150} 151 152define <4 x float> @swizzle_15(<4 x float> %v) { 153; CHECK-LABEL: swizzle_15: 154; CHECK: # BB#0: 155; CHECK-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,0,3,2] 156; CHECK-NEXT: retq 157 %1 = shufflevector <4 x float> %v, <4 x float> undef, <4 x i32> <i32 3, i32 2, i32 0, i32 1> 158 %2 = shufflevector <4 x float> %1, <4 x float> undef, <4 x i32> <i32 3, i32 2, i32 0, i32 1> 159 ret <4 x float> %2 160} 161 162define <4 x float> @swizzle_16(<4 x float> %v) { 163; CHECK-LABEL: swizzle_16: 164; CHECK: # BB#0: 165; CHECK-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,1,3,0] 166; CHECK-NEXT: retq 167 %1 = shufflevector <4 x float> %v, <4 x float> undef, <4 x i32> <i32 3, i32 1, i32 0, i32 2> 168 %2 = shufflevector <4 x float> %1, <4 x float> undef, <4 x i32> <i32 3, i32 1, i32 0, i32 2> 169 ret <4 x float> %2 170} 171 172define <4 x float> @swizzle_17(<4 x float> %v) { 173; CHECK-LABEL: swizzle_17: 174; CHECK: # BB#0: 175; CHECK-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,0,3,2] 176; CHECK-NEXT: retq 177 %1 = shufflevector <4 x float> %v, <4 x float> undef, <4 x i32> <i32 2, i32 3, i32 1, i32 0> 178 %2 = shufflevector <4 x float> %1, <4 x float> undef, <4 x i32> <i32 2, i32 3, i32 1, i32 0> 179 ret <4 x float> %2 180} 181 182define <4 x float> @swizzle_18(<4 x float> %v) { 183; CHECK-LABEL: swizzle_18: 184; CHECK: # BB#0: 185; CHECK-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,1,0,2] 186; CHECK-NEXT: retq 187 %1 = shufflevector <4 x float> %v, <4 x float> undef, <4 x i32> <i32 2, i32 1, i32 3, i32 0> 188 %2 = shufflevector <4 x float> %1, <4 x float> undef, <4 x i32> <i32 2, i32 1, i32 3, i32 0> 189 ret <4 x float> %2 190} 191 192define <4 x float> @swizzle_19(<4 x float> %v) { 193; CHECK-LABEL: swizzle_19: 194; CHECK: # BB#0: 195; CHECK-NEXT: shufpd {{.*#+}} xmm0 = xmm0[1,0] 196; CHECK-NEXT: retq 197 %1 = shufflevector <4 x float> %v, <4 x float> undef, <4 x i32> <i32 1, i32 2, i32 3, i32 0> 198 %2 = shufflevector <4 x float> %1, <4 x float> undef, <4 x i32> <i32 1, i32 2, i32 3, i32 0> 199 ret <4 x float> %2 200} 201 202define <4 x float> @swizzle_20(<4 x float> %v) { 203; CHECK-LABEL: swizzle_20: 204; CHECK: # BB#0: 205; CHECK-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0,1,3] 206; CHECK-NEXT: retq 207 %1 = shufflevector <4 x float> %v, <4 x float> undef, <4 x i32> <i32 1, i32 2, i32 0, i32 3> 208 %2 = shufflevector <4 x float> %1, <4 x float> undef, <4 x i32> <i32 1, i32 2, i32 0, i32 3> 209 ret <4 x float> %2 210} 211 212define <4 x float> @swizzle_21(<4 x float> %v) { 213; CHECK-LABEL: swizzle_21: 214; CHECK: # BB#0: 215; CHECK-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2,3,1] 216; CHECK-NEXT: retq 217 %1 = shufflevector <4 x float> %v, <4 x float> undef, <4 x i32> <i32 0, i32 3, i32 1, i32 2> 218 %2 = shufflevector <4 x float> %1, <4 x float> undef, <4 x i32> <i32 0, i32 3, i32 1, i32 2> 219 ret <4 x float> %2 220} 221 222define <4 x float> @swizzle_22(<4 x float> %v) { 223; CHECK-LABEL: swizzle_22: 224; CHECK: # BB#0: 225; CHECK-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,3,2,0] 226; CHECK-NEXT: retq 227 %1 = shufflevector <4 x float> %v, <4 x float> undef, <4 x i32> <i32 3, i32 0, i32 2, i32 1> 228 %2 = shufflevector <4 x float> %1, <4 x float> undef, <4 x i32> <i32 3, i32 0, i32 2, i32 1> 229 ret <4 x float> %2 230} 231 232define <4 x float> @swizzle_23(<4 x float> %v) { 233; CHECK-LABEL: swizzle_23: 234; CHECK: # BB#0: 235; CHECK-NEXT: shufpd {{.*#+}} xmm0 = xmm0[1,0] 236; CHECK-NEXT: retq 237 %1 = shufflevector <4 x float> %v, <4 x float> undef, <4 x i32> <i32 3, i32 0, i32 1, i32 2> 238 %2 = shufflevector <4 x float> %1, <4 x float> undef, <4 x i32> <i32 3, i32 0, i32 1, i32 2> 239 ret <4 x float> %2 240} 241 242define <4 x float> @swizzle_24(<4 x float> %v) { 243; CHECK-LABEL: swizzle_24: 244; CHECK: # BB#0: 245; CHECK-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,2,0,3] 246; CHECK-NEXT: retq 247 %1 = shufflevector <4 x float> %v, <4 x float> undef, <4 x i32> <i32 2, i32 0, i32 1, i32 3> 248 %2 = shufflevector <4 x float> %1, <4 x float> undef, <4 x i32> <i32 2, i32 0, i32 1, i32 3> 249 ret <4 x float> %2 250} 251 252define <4 x float> @swizzle_25(<4 x float> %v) { 253; CHECK-LABEL: swizzle_25: 254; CHECK: # BB#0: 255; CHECK-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,2,1,0] 256; CHECK-NEXT: retq 257 %1 = shufflevector <4 x float> %v, <4 x float> undef, <4 x i32> <i32 2, i32 0, i32 3, i32 1> 258 %2 = shufflevector <4 x float> %1, <4 x float> undef, <4 x i32> <i32 2, i32 0, i32 3, i32 1> 259 ret <4 x float> %2 260} 261 262define <4 x float> @swizzle_26(<4 x float> %v) { 263; CHECK-LABEL: swizzle_26: 264; CHECK: # BB#0: 265; CHECK-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,3,1,2] 266; CHECK-NEXT: retq 267 %1 = shufflevector <4 x float> %v, <4 x float> undef, <4 x i32> <i32 0, i32 2, i32 3, i32 1> 268 %2 = shufflevector <4 x float> %1, <4 x float> undef, <4 x i32> <i32 0, i32 2, i32 3, i32 1> 269 ret <4 x float> %2 270} 271 272define <4 x float> @swizzle_27(<4 x float> %v) { 273; CHECK-LABEL: swizzle_27: 274; CHECK: # BB#0: 275; CHECK-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,2,1,0] 276; CHECK-NEXT: retq 277 %1 = shufflevector <4 x float> %v, <4 x float> undef, <4 x i32> <i32 1, i32 3, i32 0, i32 2> 278 %2 = shufflevector <4 x float> %1, <4 x float> undef, <4 x i32> <i32 1, i32 3, i32 0, i32 2> 279 ret <4 x float> %2 280} 281 282define <4 x float> @swizzle_28(<4 x float> %v) { 283; CHECK-LABEL: swizzle_28: 284; CHECK: # BB#0: 285; CHECK-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,0,2,1] 286; CHECK-NEXT: retq 287 %1 = shufflevector <4 x float> %v, <4 x float> undef, <4 x i32> <i32 1, i32 3, i32 2, i32 0> 288 %2 = shufflevector <4 x float> %1, <4 x float> undef, <4 x i32> <i32 1, i32 3, i32 2, i32 0> 289 ret <4 x float> %2 290} 291 292define <4 x float> @swizzle_29(<4 x float> %v) { 293; CHECK-LABEL: swizzle_29: 294; CHECK: # BB#0: 295; CHECK-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,3,2,0] 296; CHECK-NEXT: retq 297 %1 = shufflevector <4 x float> %v, <4 x float> undef, <4 x i32> <i32 3, i32 1, i32 2, i32 0> 298 %2 = shufflevector <4 x float> %1, <4 x float> undef, <4 x i32> <i32 1, i32 0, i32 2, i32 3> 299 ret <4 x float> %2 300} 301 302; Make sure that we combine the shuffles from each function below into a single 303; legal shuffle (either pshuflw or pshufb depending on the masks). 304 305define <8 x i16> @swizzle_30(<8 x i16> %v) { 306; CHECK-LABEL: swizzle_30: 307; CHECK: # BB#0: 308; CHECK-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[1,3,2,0,4,5,6,7] 309; CHECK-NEXT: retq 310 %1 = shufflevector <8 x i16> %v, <8 x i16> undef, <8 x i32> <i32 3, i32 1, i32 2, i32 0, i32 7, i32 5, i32 6, i32 4> 311 %2 = shufflevector <8 x i16> %1, <8 x i16> undef, <8 x i32> <i32 1, i32 0, i32 2, i32 3, i32 7, i32 5, i32 6, i32 4> 312 ret <8 x i16> %2 313} 314 315define <8 x i16> @swizzle_31(<8 x i16> %v) { 316; CHECK-LABEL: swizzle_31: 317; CHECK: # BB#0: 318; CHECK-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[1,3,2,0,4,5,6,7] 319; CHECK-NEXT: retq 320 %1 = shufflevector <8 x i16> %v, <8 x i16> undef, <8 x i32> <i32 3, i32 0, i32 2, i32 1, i32 7, i32 5, i32 6, i32 4> 321 %2 = shufflevector <8 x i16> %1, <8 x i16> undef, <8 x i32> <i32 3, i32 0, i32 2, i32 1, i32 7, i32 5, i32 6, i32 4> 322 ret <8 x i16> %2 323} 324 325define <8 x i16> @swizzle_32(<8 x i16> %v) { 326; CHECK-LABEL: swizzle_32: 327; CHECK: # BB#0: 328; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,0,2,3] 329; CHECK-NEXT: retq 330 %1 = shufflevector <8 x i16> %v, <8 x i16> undef, <8 x i32> <i32 1, i32 2, i32 3, i32 0, i32 7, i32 5, i32 6, i32 4> 331 %2 = shufflevector <8 x i16> %1, <8 x i16> undef, <8 x i32> <i32 1, i32 2, i32 3, i32 0, i32 7, i32 5, i32 6, i32 4> 332 ret <8 x i16> %2 333} 334 335define <8 x i16> @swizzle_33(<8 x i16> %v) { 336; CHECK-LABEL: swizzle_33: 337; CHECK: # BB#0: 338; CHECK-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[2,1,3,0,4,5,6,7] 339; CHECK-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,5,7,6,4] 340; CHECK-NEXT: retq 341 %1 = shufflevector <8 x i16> %v, <8 x i16> undef, <8 x i32> <i32 4, i32 6, i32 5, i32 7, i32 2, i32 3, i32 1, i32 0> 342 %2 = shufflevector <8 x i16> %1, <8 x i16> undef, <8 x i32> <i32 4, i32 6, i32 5, i32 7, i32 2, i32 3, i32 1, i32 0> 343 ret <8 x i16> %2 344} 345 346define <8 x i16> @swizzle_34(<8 x i16> %v) { 347; CHECK-LABEL: swizzle_34: 348; CHECK: # BB#0: 349; CHECK-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[1,3,0,2,4,5,6,7] 350; CHECK-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,7,6,4,5] 351; CHECK-NEXT: retq 352 %1 = shufflevector <8 x i16> %v, <8 x i16> undef, <8 x i32> <i32 4, i32 7, i32 6, i32 5, i32 1, i32 2, i32 0, i32 3> 353 %2 = shufflevector <8 x i16> %1, <8 x i16> undef, <8 x i32> <i32 4, i32 7, i32 6, i32 5, i32 1, i32 2, i32 0, i32 3> 354 ret <8 x i16> %2 355} 356 357define <8 x i16> @swizzle_35(<8 x i16> %v) { 358; CHECK-LABEL: swizzle_35: 359; CHECK: # BB#0: 360; CHECK-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[2,1,0,3,4,5,6,7] 361; CHECK-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,5,7,6] 362; CHECK-NEXT: retq 363 %1 = shufflevector <8 x i16> %v, <8 x i16> undef, <8 x i32> <i32 7, i32 4, i32 6, i32 5, i32 1, i32 3, i32 0, i32 2> 364 %2 = shufflevector <8 x i16> %1, <8 x i16> undef, <8 x i32> <i32 7, i32 4, i32 6, i32 5, i32 1, i32 3, i32 0, i32 2> 365 ret <8 x i16> %2 366} 367 368define <8 x i16> @swizzle_36(<8 x i16> %v) { 369; CHECK-LABEL: swizzle_36: 370; CHECK: # BB#0: 371; CHECK-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,3,2,1,4,5,6,7] 372; CHECK-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,6,5,7] 373; CHECK-NEXT: retq 374 %1 = shufflevector <8 x i16> %v, <8 x i16> undef, <8 x i32> <i32 4, i32 6, i32 7, i32 5, i32 0, i32 1, i32 3, i32 2> 375 %2 = shufflevector <8 x i16> %1, <8 x i16> undef, <8 x i32> <i32 4, i32 6, i32 7, i32 5, i32 0, i32 1, i32 3, i32 2> 376 ret <8 x i16> %2 377} 378 379define <8 x i16> @swizzle_37(<8 x i16> %v) { 380; CHECK-LABEL: swizzle_37: 381; CHECK: # BB#0: 382; CHECK-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,7,6,5] 383; CHECK-NEXT: retq 384 %1 = shufflevector <8 x i16> %v, <8 x i16> undef, <8 x i32> <i32 1, i32 0, i32 3, i32 2, i32 7, i32 5, i32 6, i32 4> 385 %2 = shufflevector <8 x i16> %1, <8 x i16> undef, <8 x i32> <i32 1, i32 0, i32 3, i32 2, i32 7, i32 4, i32 6, i32 5> 386 ret <8 x i16> %2 387} 388 389define <8 x i16> @swizzle_38(<8 x i16> %v) { 390; CHECK-LABEL: swizzle_38: 391; CHECK: # BB#0: 392; CHECK-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[2,1,0,3,4,5,6,7] 393; CHECK-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,5,4,6,7] 394; CHECK-NEXT: retq 395 %1 = shufflevector <8 x i16> %v, <8 x i16> undef, <8 x i32> <i32 5, i32 6, i32 4, i32 7, i32 0, i32 2, i32 1, i32 3> 396 %2 = shufflevector <8 x i16> %1, <8 x i16> undef, <8 x i32> <i32 5, i32 6, i32 4, i32 7, i32 0, i32 2, i32 1, i32 3> 397 ret <8 x i16> %2 398} 399 400define <8 x i16> @swizzle_39(<8 x i16> %v) { 401; CHECK-LABEL: swizzle_39: 402; CHECK: # BB#0: 403; CHECK-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[2,3,1,0,4,5,6,7] 404; CHECK-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,7,6,4,5] 405; CHECK-NEXT: retq 406 %1 = shufflevector <8 x i16> %v, <8 x i16> undef, <8 x i32> <i32 5, i32 4, i32 6, i32 7, i32 3, i32 2, i32 1, i32 0> 407 %2 = shufflevector <8 x i16> %1, <8 x i16> undef, <8 x i32> <i32 5, i32 4, i32 6, i32 7, i32 3, i32 2, i32 1, i32 0> 408 ret <8 x i16> %2 409} 410 411define <8 x i16> @swizzle_40(<8 x i16> %v) { 412; CHECK-LABEL: swizzle_40: 413; CHECK: # BB#0: 414; CHECK-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[3,1,2,0,4,5,6,7] 415; CHECK-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,6,5,7] 416; CHECK-NEXT: retq 417 %1 = shufflevector <8 x i16> %v, <8 x i16> undef, <8 x i32> <i32 6, i32 4, i32 7, i32 5, i32 1, i32 0, i32 3, i32 2> 418 %2 = shufflevector <8 x i16> %1, <8 x i16> undef, <8 x i32> <i32 6, i32 4, i32 7, i32 5, i32 1, i32 0, i32 3, i32 2> 419 ret <8 x i16> %2 420} 421 422define <8 x i16> @swizzle_41(<8 x i16> %v) { 423; CHECK-LABEL: swizzle_41: 424; CHECK: # BB#0: 425; CHECK-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[3,2,1,0,4,5,6,7] 426; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,1,3,2] 427; CHECK-NEXT: retq 428 %1 = shufflevector <8 x i16> %v, <8 x i16> undef, <8 x i32> <i32 6, i32 7, i32 5, i32 4, i32 0, i32 1, i32 3, i32 2> 429 %2 = shufflevector <8 x i16> %1, <8 x i16> undef, <8 x i32> <i32 6, i32 7, i32 5, i32 4, i32 0, i32 1, i32 3, i32 2> 430 ret <8 x i16> %2 431} 432 433define <8 x i16> @swizzle_42(<8 x i16> %v) { 434; CHECK-LABEL: swizzle_42: 435; CHECK: # BB#0: 436; CHECK-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,5,4,7,6] 437; CHECK-NEXT: retq 438 %1 = shufflevector <8 x i16> %v, <8 x i16> undef, <8 x i32> <i32 0, i32 1, i32 3, i32 2, i32 7, i32 6, i32 4, i32 5> 439 %2 = shufflevector <8 x i16> %1, <8 x i16> undef, <8 x i32> <i32 0, i32 1, i32 3, i32 2, i32 7, i32 6, i32 4, i32 5> 440 ret <8 x i16> %2 441} 442