1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE2 3; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX1 4; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx2 | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX2 5 6define <8 x i32> @a(<8 x i32> %a) nounwind { 7; SSE-LABEL: a: 8; SSE: # BB#0: 9; SSE-NEXT: pslld $16, %xmm0 10; SSE-NEXT: psrad $16, %xmm0 11; SSE-NEXT: pslld $16, %xmm1 12; SSE-NEXT: psrad $16, %xmm1 13; SSE-NEXT: retq 14; 15; AVX1-LABEL: a: 16; AVX1: # BB#0: 17; AVX1-NEXT: vpslld $16, %xmm0, %xmm1 18; AVX1-NEXT: vpsrad $16, %xmm1, %xmm1 19; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 20; AVX1-NEXT: vpslld $16, %xmm0, %xmm0 21; AVX1-NEXT: vpsrad $16, %xmm0, %xmm0 22; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 23; AVX1-NEXT: retq 24; 25; AVX2-LABEL: a: 26; AVX2: # BB#0: 27; AVX2-NEXT: vpslld $16, %ymm0, %ymm0 28; AVX2-NEXT: vpsrad $16, %ymm0, %ymm0 29; AVX2-NEXT: retq 30 %b = trunc <8 x i32> %a to <8 x i16> 31 %c = sext <8 x i16> %b to <8 x i32> 32 ret <8 x i32> %c 33} 34 35define <3 x i32> @b(<3 x i32> %a) nounwind { 36; SSE-LABEL: b: 37; SSE: # BB#0: 38; SSE-NEXT: pslld $16, %xmm0 39; SSE-NEXT: psrad $16, %xmm0 40; SSE-NEXT: retq 41; 42; AVX-LABEL: b: 43; AVX: # BB#0: 44; AVX-NEXT: vpslld $16, %xmm0, %xmm0 45; AVX-NEXT: vpsrad $16, %xmm0, %xmm0 46; AVX-NEXT: retq 47 %b = trunc <3 x i32> %a to <3 x i16> 48 %c = sext <3 x i16> %b to <3 x i32> 49 ret <3 x i32> %c 50} 51 52define <1 x i32> @c(<1 x i32> %a) nounwind { 53; ALL-LABEL: c: 54; ALL: # BB#0: 55; ALL-NEXT: movswl %di, %eax 56; ALL-NEXT: retq 57 %b = trunc <1 x i32> %a to <1 x i16> 58 %c = sext <1 x i16> %b to <1 x i32> 59 ret <1 x i32> %c 60} 61 62define <8 x i32> @d(<8 x i32> %a) nounwind { 63; SSE-LABEL: d: 64; SSE: # BB#0: 65; SSE-NEXT: movaps {{.*#+}} xmm2 = [65535,0,65535,0,65535,0,65535,0] 66; SSE-NEXT: andps %xmm2, %xmm0 67; SSE-NEXT: andps %xmm2, %xmm1 68; SSE-NEXT: retq 69; 70; AVX1-LABEL: d: 71; AVX1: # BB#0: 72; AVX1-NEXT: vandps {{.*}}(%rip), %ymm0, %ymm0 73; AVX1-NEXT: retq 74; 75; AVX2-LABEL: d: 76; AVX2: # BB#0: 77; AVX2-NEXT: vpxor %ymm1, %ymm1, %ymm1 78; AVX2-NEXT: vpblendw {{.*#+}} ymm0 = ymm0[0],ymm1[1],ymm0[2],ymm1[3],ymm0[4],ymm1[5],ymm0[6],ymm1[7],ymm0[8],ymm1[9],ymm0[10],ymm1[11],ymm0[12],ymm1[13],ymm0[14],ymm1[15] 79; AVX2-NEXT: retq 80 %b = trunc <8 x i32> %a to <8 x i16> 81 %c = zext <8 x i16> %b to <8 x i32> 82 ret <8 x i32> %c 83} 84 85define <3 x i32> @e(<3 x i32> %a) nounwind { 86; SSE-LABEL: e: 87; SSE: # BB#0: 88; SSE-NEXT: andps {{.*}}(%rip), %xmm0 89; SSE-NEXT: retq 90; 91; AVX-LABEL: e: 92; AVX: # BB#0: 93; AVX-NEXT: vpxor %xmm1, %xmm1, %xmm1 94; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3],xmm0[4],xmm1[5],xmm0[6,7] 95; AVX-NEXT: retq 96 %b = trunc <3 x i32> %a to <3 x i16> 97 %c = zext <3 x i16> %b to <3 x i32> 98 ret <3 x i32> %c 99} 100 101define <1 x i32> @f(<1 x i32> %a) nounwind { 102; ALL-LABEL: f: 103; ALL: # BB#0: 104; ALL-NEXT: movzwl %di, %eax 105; ALL-NEXT: retq 106 %b = trunc <1 x i32> %a to <1 x i16> 107 %c = zext <1 x i16> %b to <1 x i32> 108 ret <1 x i32> %c 109} 110